FR3036845B1 - Procede de transfert d'une couche d'un substrat monocristallin - Google Patents

Procede de transfert d'une couche d'un substrat monocristallin

Info

Publication number
FR3036845B1
FR3036845B1 FR1554818A FR1554818A FR3036845B1 FR 3036845 B1 FR3036845 B1 FR 3036845B1 FR 1554818 A FR1554818 A FR 1554818A FR 1554818 A FR1554818 A FR 1554818A FR 3036845 B1 FR3036845 B1 FR 3036845B1
Authority
FR
France
Prior art keywords
transferring
layer
monocrystalline substrate
monocrystalline
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1554818A
Other languages
English (en)
Other versions
FR3036845A1 (fr
Inventor
Ludovic Ecarnot
Nicolas Daval
Mohamed Nadia Ben
Francois Boedt
Carole David
Isabelle Guerin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Priority to FR1554818A priority Critical patent/FR3036845B1/fr
Priority to TW105114614A priority patent/TWI608520B/zh
Priority to JP2016096375A priority patent/JP2016222525A/ja
Priority to US15/159,646 priority patent/US9768057B2/en
Priority to CN201610357371.4A priority patent/CN106409692B/zh
Priority to EP16171740.0A priority patent/EP3098839B1/fr
Priority to ES16171740T priority patent/ES2788148T3/es
Publication of FR3036845A1 publication Critical patent/FR3036845A1/fr
Application granted granted Critical
Publication of FR3036845B1 publication Critical patent/FR3036845B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B28WORKING CEMENT, CLAY, OR STONE
    • B28DWORKING STONE OR STONE-LIKE MATERIALS
    • B28D5/00Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Recrystallisation Techniques (AREA)
FR1554818A 2015-05-28 2015-05-28 Procede de transfert d'une couche d'un substrat monocristallin Active FR3036845B1 (fr)

Priority Applications (7)

Application Number Priority Date Filing Date Title
FR1554818A FR3036845B1 (fr) 2015-05-28 2015-05-28 Procede de transfert d'une couche d'un substrat monocristallin
TW105114614A TWI608520B (zh) 2015-05-28 2016-05-11 用於單晶底材之層移轉方法及在底材上包含單晶層之結構
JP2016096375A JP2016222525A (ja) 2015-05-28 2016-05-12 単結晶基板から層を移動させるための方法
US15/159,646 US9768057B2 (en) 2015-05-28 2016-05-19 Method for transferring a layer from a single-crystal substrate
CN201610357371.4A CN106409692B (zh) 2015-05-28 2016-05-26 用于从单晶衬底转移层的方法
EP16171740.0A EP3098839B1 (fr) 2015-05-28 2016-05-27 Procédé de transfert d'une couche d'un substrat monocristallin
ES16171740T ES2788148T3 (es) 2015-05-28 2016-05-27 Procedimiento para transferir una capa desde un sustrato monocristalino

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1554818A FR3036845B1 (fr) 2015-05-28 2015-05-28 Procede de transfert d'une couche d'un substrat monocristallin

Publications (2)

Publication Number Publication Date
FR3036845A1 FR3036845A1 (fr) 2016-12-02
FR3036845B1 true FR3036845B1 (fr) 2017-05-26

Family

ID=54066018

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1554818A Active FR3036845B1 (fr) 2015-05-28 2015-05-28 Procede de transfert d'une couche d'un substrat monocristallin

Country Status (7)

Country Link
US (1) US9768057B2 (fr)
EP (1) EP3098839B1 (fr)
JP (1) JP2016222525A (fr)
CN (1) CN106409692B (fr)
ES (1) ES2788148T3 (fr)
FR (1) FR3036845B1 (fr)
TW (1) TWI608520B (fr)

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2681472B1 (fr) 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
US20030087503A1 (en) 1994-03-10 2003-05-08 Canon Kabushiki Kaisha Process for production of semiconductor substrate
JP3827167B2 (ja) * 1995-03-20 2006-09-27 東芝セラミックス株式会社 傾斜表面シリコンウエハの表面構造の形成方法
JP4947248B2 (ja) * 2001-09-14 2012-06-06 Dowaエレクトロニクス株式会社 ノッチ付き化合物半導体ウエハ
JP2004119943A (ja) * 2002-09-30 2004-04-15 Renesas Technology Corp 半導体ウェハおよびその製造方法
JP4034682B2 (ja) * 2002-10-21 2008-01-16 株式会社東芝 半導体ウェーハ及び半導体ウェーハ製造方法
US7148559B2 (en) * 2003-06-20 2006-12-12 International Business Machines Corporation Substrate engineering for optimum CMOS device performance
FR2894067B1 (fr) * 2005-11-28 2008-02-15 Soitec Silicon On Insulator Procede de collage par adhesion moleculaire
US7601271B2 (en) * 2005-11-28 2009-10-13 S.O.I.Tec Silicon On Insulator Technologies Process and equipment for bonding by molecular adhesion
JP2008205218A (ja) * 2007-02-20 2008-09-04 Covalent Materials Corp 半導体基板
FR2922681A1 (fr) * 2007-10-23 2009-04-24 Soitec Silicon On Insulator Procede de detachement d'un substrat.
DE102008026784A1 (de) 2008-06-04 2009-12-10 Siltronic Ag Epitaxierte Siliciumscheibe mit <110>-Kristallorientierung und Verfahren zu ihrer Herstellung
JP5544986B2 (ja) * 2010-04-01 2014-07-09 信越半導体株式会社 貼り合わせsoiウェーハの製造方法、及び貼り合わせsoiウェーハ
FR2980279B1 (fr) * 2011-09-20 2013-10-11 Soitec Silicon On Insulator Procede de fabrication d'une structure composite a separer par exfoliation
US8557632B1 (en) * 2012-04-09 2013-10-15 Monolithic 3D Inc. Method for fabrication of a semiconductor device and structure

Also Published As

Publication number Publication date
EP3098839B1 (fr) 2020-03-04
US20160351438A1 (en) 2016-12-01
JP2016222525A (ja) 2016-12-28
ES2788148T3 (es) 2020-10-20
TWI608520B (zh) 2017-12-11
FR3036845A1 (fr) 2016-12-02
CN106409692B (zh) 2019-02-05
EP3098839A1 (fr) 2016-11-30
CN106409692A (zh) 2017-02-15
TW201703110A (zh) 2017-01-16
US9768057B2 (en) 2017-09-19

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