FR2976712B1 - Element de memoire non-volatile - Google Patents

Element de memoire non-volatile

Info

Publication number
FR2976712B1
FR2976712B1 FR1155192A FR1155192A FR2976712B1 FR 2976712 B1 FR2976712 B1 FR 2976712B1 FR 1155192 A FR1155192 A FR 1155192A FR 1155192 A FR1155192 A FR 1155192A FR 2976712 B1 FR2976712 B1 FR 2976712B1
Authority
FR
France
Prior art keywords
coupled
memory element
transistor
storage node
volatile memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1155192A
Other languages
English (en)
Other versions
FR2976712A1 (fr
Inventor
Yoann Guillemenet
Lionel Torres
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Centre National de la Recherche Scientifique CNRS
Universite Montpellier 2 Sciences et Techniques
Original Assignee
Centre National de la Recherche Scientifique CNRS
Universite Montpellier 2 Sciences et Techniques
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Centre National de la Recherche Scientifique CNRS, Universite Montpellier 2 Sciences et Techniques filed Critical Centre National de la Recherche Scientifique CNRS
Priority to FR1155192A priority Critical patent/FR2976712B1/fr
Priority to EP12730846.8A priority patent/EP2721614B1/fr
Priority to PCT/EP2012/061268 priority patent/WO2012171989A2/fr
Priority to US14/126,067 priority patent/US9117521B2/en
Publication of FR2976712A1 publication Critical patent/FR2976712A1/fr
Application granted granted Critical
Publication of FR2976712B1 publication Critical patent/FR2976712B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
    • G11C14/0054—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell
    • G11C14/0081—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell and the nonvolatile element is a magnetic RAM [MRAM] element or ferromagnetic cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
    • G11C14/0054—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell
    • G11C14/009—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell and the nonvolatile element is a resistive RAM element, i.e. programmable resistors, e.g. formed of phase change or chalcogenide material
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/106—Data output latches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)

Abstract

L'invention concerne un élément de mémoire non volatile comprenant : des premier et deuxième transistors (106, 108) formant un inverseur (104) couplé entre un premier noeud de mémorisation (112) et une sortie (110) de l'élément de mémoire ; un troisième transistor (116) couplé entre le premier noeud de mémorisation (112) et une première tension d'alimentation (GND, V ) et comprenant une borne de commande couplée à ladite sortie ; un premier élément à commutation de résistance (102) couplé en série avec le troisième transistor et programmé pour avoir l'une d'une première et d'une deuxième résistance (R , R ) représentant un bit de donnée non volatile ; et un quatrième transistor (118) couplé entre le noeud de mémorisation (112) et une deuxième tension d'alimentation (V , GND).
FR1155192A 2011-06-15 2011-06-15 Element de memoire non-volatile Expired - Fee Related FR2976712B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR1155192A FR2976712B1 (fr) 2011-06-15 2011-06-15 Element de memoire non-volatile
EP12730846.8A EP2721614B1 (fr) 2011-06-15 2012-06-14 Élément de mémoire non volatile
PCT/EP2012/061268 WO2012171989A2 (fr) 2011-06-15 2012-06-14 Élément de mémoire non volatile
US14/126,067 US9117521B2 (en) 2011-06-15 2012-06-14 Memory cell with volatile and non-volatile storage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1155192A FR2976712B1 (fr) 2011-06-15 2011-06-15 Element de memoire non-volatile

Publications (2)

Publication Number Publication Date
FR2976712A1 FR2976712A1 (fr) 2012-12-21
FR2976712B1 true FR2976712B1 (fr) 2014-01-31

Family

ID=46420090

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1155192A Expired - Fee Related FR2976712B1 (fr) 2011-06-15 2011-06-15 Element de memoire non-volatile

Country Status (4)

Country Link
US (1) US9117521B2 (fr)
EP (1) EP2721614B1 (fr)
FR (1) FR2976712B1 (fr)
WO (1) WO2012171989A2 (fr)

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FR2970589B1 (fr) 2011-01-19 2013-02-15 Centre Nat Rech Scient Cellule mémoire volatile/non volatile
FR2970593B1 (fr) * 2011-01-19 2013-08-02 Centre Nat Rech Scient Cellule mémoire volatile/non volatile compacte
FR2976712B1 (fr) 2011-06-15 2014-01-31 Centre Nat Rech Scient Element de memoire non-volatile
FR2976711B1 (fr) 2011-06-15 2014-01-31 Centre Nat Rech Scient Cellule memoire avec memorisation volatile et non volatile
US10056907B1 (en) * 2011-07-29 2018-08-21 Crossbar, Inc. Field programmable gate array utilizing two-terminal non-volatile memory
FR2990089B1 (fr) * 2012-04-27 2014-04-11 Commissariat Energie Atomique Dispositif logique reprogrammable resistant aux rayonnements.
WO2014036510A1 (fr) * 2012-09-01 2014-03-06 Purdue Research Foundation Commutateur de spin non volatil
FR3004577A1 (fr) 2013-04-15 2014-10-17 Commissariat Energie Atomique
FR3004576B1 (fr) 2013-04-15 2019-11-29 Commissariat A L'energie Atomique Et Aux Energies Alternatives Cellule memoire avec memorisation de donnees non volatile
FR3008219B1 (fr) 2013-07-05 2016-12-09 Commissariat Energie Atomique Dispositif a memoire non volatile
US9384812B2 (en) * 2014-01-28 2016-07-05 Qualcomm Incorporated Three-phase GSHE-MTJ non-volatile flip-flop
TWI573395B (zh) * 2015-03-10 2017-03-01 新唐科技股份有限公司 輸入輸出緩衝電路
KR20160122885A (ko) * 2015-04-14 2016-10-25 에스케이하이닉스 주식회사 전자장치
US9851738B2 (en) 2015-08-13 2017-12-26 Arm Ltd. Programmable voltage reference
US9748943B2 (en) 2015-08-13 2017-08-29 Arm Ltd. Programmable current for correlated electron switch
US9979385B2 (en) 2015-10-05 2018-05-22 Arm Ltd. Circuit and method for monitoring correlated electron switches
US9805795B2 (en) 2016-01-08 2017-10-31 Samsung Electronics Co., Ltd. Zero leakage, high noise margin coupled giant spin hall based retention latch
US10199105B2 (en) 2016-05-12 2019-02-05 Crossbar, Inc. Non-volatile resistive memory configuration cell for field programmable gate array
CN108694983B (zh) * 2017-04-11 2021-03-30 财团法人交大思源基金会 非挥发性记忆体及其操作方法
US10790002B2 (en) 2018-06-21 2020-09-29 Samsung Electronics Co., Ltd. Giant spin hall-based compact neuromorphic cell optimized for differential read inference
JP2023034195A (ja) * 2021-08-30 2023-03-13 キオクシア株式会社 フリップフロップ回路、及び非同期受け回路

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DE19548053A1 (de) 1995-12-21 1997-07-03 Siemens Ag Verfahren zum Betrieb einer SRAM MOS-Transistor Speicherzelle
US6172899B1 (en) 1998-05-08 2001-01-09 Micron Technology. Inc. Static-random-access-memory cell
JP3983969B2 (ja) 2000-03-08 2007-09-26 株式会社東芝 不揮発性半導体記憶装置
JP3834787B2 (ja) 2001-11-22 2006-10-18 インターナショナル・ビジネス・マシーンズ・コーポレーション 不揮発性ラッチ回路
US6687154B2 (en) 2002-02-25 2004-02-03 Aplus Flash Technology, Inc. Highly-integrated flash memory and mask ROM array architecture
AU2003220785A1 (en) 2002-04-10 2003-10-20 Matsushita Electric Industrial Co., Ltd. Non-volatile flip-flop
KR100479810B1 (ko) 2002-12-30 2005-03-31 주식회사 하이닉스반도체 불휘발성 메모리 장치
US7335906B2 (en) * 2003-04-03 2008-02-26 Kabushiki Kaisha Toshiba Phase change memory device
DE102005001667B4 (de) 2005-01-13 2011-04-21 Qimonda Ag Nichtflüchtige Speicherzelle zum Speichern eines Datums in einer integrierten Schaltung
US7764081B1 (en) 2005-08-05 2010-07-27 Xilinx, Inc. Programmable logic device (PLD) with memory refresh based on single event upset (SEU) occurrence to maintain soft error immunity
US7599210B2 (en) 2005-08-19 2009-10-06 Sony Corporation Nonvolatile memory cell, storage device and nonvolatile logic circuit
DE102005049232A1 (de) 2005-10-14 2007-04-26 Infineon Technologies Ag Integrierter Schaltkreis und Verfahren zum Betreiben eines integrierten Schaltkreises
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US8773896B2 (en) 2012-05-18 2014-07-08 Alexander Mikhailovich Shukh Nonvolatile latch circuit

Also Published As

Publication number Publication date
EP2721614B1 (fr) 2017-09-13
US20140269003A1 (en) 2014-09-18
WO2012171989A3 (fr) 2013-02-07
EP2721614A2 (fr) 2014-04-23
FR2976712A1 (fr) 2012-12-21
WO2012171989A2 (fr) 2012-12-20
US9117521B2 (en) 2015-08-25

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