FR2976711B1 - Cellule memoire avec memorisation volatile et non volatile - Google Patents
Cellule memoire avec memorisation volatile et non volatileInfo
- Publication number
- FR2976711B1 FR2976711B1 FR1155191A FR1155191A FR2976711B1 FR 2976711 B1 FR2976711 B1 FR 2976711B1 FR 1155191 A FR1155191 A FR 1155191A FR 1155191 A FR1155191 A FR 1155191A FR 2976711 B1 FR2976711 B1 FR 2976711B1
- Authority
- FR
- France
- Prior art keywords
- volatile
- memory cell
- memorization
- vdd
- gnd
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000008878 coupling Effects 0.000 abstract 1
- 238000010168 coupling process Methods 0.000 abstract 1
- 238000005859 coupling reaction Methods 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0023—Address circuits or decoders
- G11C13/0028—Word-line or row circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
- G11C14/0054—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
- G11C14/0054—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell
- G11C14/0081—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell and the nonvolatile element is a magnetic RAM [MRAM] element or ferromagnetic cell
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
- G11C14/0054—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell
- G11C14/009—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell and the nonvolatile element is a resistive RAM element, i.e. programmable resistors, e.g. formed of phase change or chalcogenide material
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Static Random-Access Memory (AREA)
- Read Only Memory (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1155191A FR2976711B1 (fr) | 2011-06-15 | 2011-06-15 | Cellule memoire avec memorisation volatile et non volatile |
US14/126,051 US9053782B2 (en) | 2011-06-15 | 2012-06-14 | Memory cell with volatile and non-volatile storage |
EP12730845.0A EP2721612B1 (fr) | 2011-06-15 | 2012-06-14 | Cellule de mémoire comprenant une mémoire volatile et une mémoire non volatile |
PCT/EP2012/061267 WO2012171988A1 (fr) | 2011-06-15 | 2012-06-14 | Cellule de mémoire comprenant une mémoire volatile et une mémoire non volatile |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1155191A FR2976711B1 (fr) | 2011-06-15 | 2011-06-15 | Cellule memoire avec memorisation volatile et non volatile |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2976711A1 FR2976711A1 (fr) | 2012-12-21 |
FR2976711B1 true FR2976711B1 (fr) | 2014-01-31 |
Family
ID=46420089
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1155191A Expired - Fee Related FR2976711B1 (fr) | 2011-06-15 | 2011-06-15 | Cellule memoire avec memorisation volatile et non volatile |
Country Status (4)
Country | Link |
---|---|
US (1) | US9053782B2 (fr) |
EP (1) | EP2721612B1 (fr) |
FR (1) | FR2976711B1 (fr) |
WO (1) | WO2012171988A1 (fr) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2970589B1 (fr) | 2011-01-19 | 2013-02-15 | Centre Nat Rech Scient | Cellule mémoire volatile/non volatile |
FR2990089B1 (fr) * | 2012-04-27 | 2014-04-11 | Commissariat Energie Atomique | Dispositif logique reprogrammable resistant aux rayonnements. |
FR3004577A1 (fr) | 2013-04-15 | 2014-10-17 | Commissariat Energie Atomique | |
FR3004576B1 (fr) | 2013-04-15 | 2019-11-29 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Cellule memoire avec memorisation de donnees non volatile |
FR3008219B1 (fr) | 2013-07-05 | 2016-12-09 | Commissariat Energie Atomique | Dispositif a memoire non volatile |
FR3047136B1 (fr) | 2016-01-27 | 2018-02-16 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Sauvegarde de donnees dans un circuit asynchrone |
TWI686930B (zh) * | 2017-04-11 | 2020-03-01 | 國立交通大學 | 非揮發性記憶體及其操作方法 |
EP3540738B1 (fr) * | 2018-03-15 | 2020-12-30 | Karlsruher Institut für Technologie | Bascule bistable non volatile multi-bits |
CN110544499B (zh) * | 2018-05-28 | 2021-07-13 | 联华电子股份有限公司 | 静态随机存取存储器结构 |
US11182686B2 (en) * | 2019-03-01 | 2021-11-23 | Samsung Electronics Co., Ltd | 4T4R ternary weight cell with high on/off ratio background |
Family Cites Families (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4006469A (en) | 1975-12-16 | 1977-02-01 | International Business Machines Corporation | Data storage cell with transistors operating at different threshold voltages |
DE19548053A1 (de) * | 1995-12-21 | 1997-07-03 | Siemens Ag | Verfahren zum Betrieb einer SRAM MOS-Transistor Speicherzelle |
US6172899B1 (en) | 1998-05-08 | 2001-01-09 | Micron Technology. Inc. | Static-random-access-memory cell |
JP3983969B2 (ja) | 2000-03-08 | 2007-09-26 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JP3834787B2 (ja) | 2001-11-22 | 2006-10-18 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 不揮発性ラッチ回路 |
US6687154B2 (en) | 2002-02-25 | 2004-02-03 | Aplus Flash Technology, Inc. | Highly-integrated flash memory and mask ROM array architecture |
CN100337333C (zh) * | 2002-04-10 | 2007-09-12 | 松下电器产业株式会社 | 非易失性触发器 |
JP3875139B2 (ja) | 2002-04-24 | 2007-01-31 | Necエレクトロニクス株式会社 | 不揮発性半導体記憶装置、そのデータ書き込み制御方法およびプログラム |
KR100479810B1 (ko) * | 2002-12-30 | 2005-03-31 | 주식회사 하이닉스반도체 | 불휘발성 메모리 장치 |
US7335906B2 (en) | 2003-04-03 | 2008-02-26 | Kabushiki Kaisha Toshiba | Phase change memory device |
DE102005001667B4 (de) * | 2005-01-13 | 2011-04-21 | Qimonda Ag | Nichtflüchtige Speicherzelle zum Speichern eines Datums in einer integrierten Schaltung |
US7764081B1 (en) | 2005-08-05 | 2010-07-27 | Xilinx, Inc. | Programmable logic device (PLD) with memory refresh based on single event upset (SEU) occurrence to maintain soft error immunity |
US7599210B2 (en) * | 2005-08-19 | 2009-10-06 | Sony Corporation | Nonvolatile memory cell, storage device and nonvolatile logic circuit |
DE102005049232A1 (de) | 2005-10-14 | 2007-04-26 | Infineon Technologies Ag | Integrierter Schaltkreis und Verfahren zum Betreiben eines integrierten Schaltkreises |
JP5311784B2 (ja) | 2006-10-11 | 2013-10-09 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US7692954B2 (en) * | 2007-03-12 | 2010-04-06 | International Business Machines Corporation | Apparatus and method for integrating nonvolatile memory capability within SRAM devices |
WO2009031231A1 (fr) * | 2007-09-07 | 2009-03-12 | Renesas Technology Corp. | Dispositif à semi-conducteur |
US7791941B2 (en) * | 2007-10-26 | 2010-09-07 | Micron Technology, Inc. | Non-volatile SRAM cell |
WO2009072511A1 (fr) | 2007-12-06 | 2009-06-11 | Nec Corporation | Circuit de verrouillage non volatil |
US20090190409A1 (en) | 2008-01-28 | 2009-07-30 | Rok Dittrich | Integrated Circuit, Cell Arrangement, Method for Operating an Integrated Circuit and for Operating a Cell Arrangement, Memory Module |
US7760538B1 (en) * | 2008-03-04 | 2010-07-20 | Xilinx, Inc. | Non-volatile SRAM cell |
US7796417B1 (en) * | 2008-04-14 | 2010-09-14 | Altera Corporation | Memory circuits having programmable non-volatile resistors |
US20090268513A1 (en) | 2008-04-29 | 2009-10-29 | Luca De Ambroggi | Memory device with different types of phase change memory |
US7961502B2 (en) | 2008-12-04 | 2011-06-14 | Qualcomm Incorporated | Non-volatile state retention latch |
US8194438B2 (en) | 2009-02-12 | 2012-06-05 | Seagate Technology Llc | nvSRAM having variable magnetic resistors |
US8605490B2 (en) * | 2009-10-12 | 2013-12-10 | Micron Technology, Inc. | Non-volatile SRAM cell that incorporates phase-change memory into a CMOS process |
JP5359798B2 (ja) | 2009-11-10 | 2013-12-04 | ソニー株式会社 | メモリデバイスおよびその読み出し方法 |
KR20110057601A (ko) | 2009-11-24 | 2011-06-01 | 삼성전자주식회사 | 비휘발성 논리 회로, 상기 비휘발성 논리 회로를 포함하는 집적 회로 및 상기 집적 회로의 동작 방법 |
EP2534583A1 (fr) | 2009-12-01 | 2012-12-19 | Queen's University At Kingston | Procédé et système pour architecture informatique reconfigurable au moment de l'exécution |
FR2966636B1 (fr) | 2010-10-26 | 2012-12-14 | Centre Nat Rech Scient | Element magnetique inscriptible |
FR2970589B1 (fr) | 2011-01-19 | 2013-02-15 | Centre Nat Rech Scient | Cellule mémoire volatile/non volatile |
FR2976712B1 (fr) | 2011-06-15 | 2014-01-31 | Centre Nat Rech Scient | Element de memoire non-volatile |
TWI429062B (zh) * | 2011-06-15 | 2014-03-01 | Ind Tech Res Inst | 非揮發性靜態隨機存取式記憶胞以及記憶體電路 |
US8773896B2 (en) | 2012-05-18 | 2014-07-08 | Alexander Mikhailovich Shukh | Nonvolatile latch circuit |
-
2011
- 2011-06-15 FR FR1155191A patent/FR2976711B1/fr not_active Expired - Fee Related
-
2012
- 2012-06-14 WO PCT/EP2012/061267 patent/WO2012171988A1/fr active Application Filing
- 2012-06-14 US US14/126,051 patent/US9053782B2/en active Active
- 2012-06-14 EP EP12730845.0A patent/EP2721612B1/fr active Active
Also Published As
Publication number | Publication date |
---|---|
FR2976711A1 (fr) | 2012-12-21 |
US20140167816A1 (en) | 2014-06-19 |
EP2721612A1 (fr) | 2014-04-23 |
WO2012171988A1 (fr) | 2012-12-20 |
EP2721612B1 (fr) | 2018-07-04 |
US9053782B2 (en) | 2015-06-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PLFP | Fee payment |
Year of fee payment: 6 |
|
PLFP | Fee payment |
Year of fee payment: 7 |
|
PLFP | Fee payment |
Year of fee payment: 8 |
|
PLFP | Fee payment |
Year of fee payment: 9 |
|
ST | Notification of lapse |
Effective date: 20210205 |