FR2968128B1 - Cellule precaracterisee pour circuit intégré - Google Patents
Cellule precaracterisee pour circuit intégréInfo
- Publication number
- FR2968128B1 FR2968128B1 FR1059777A FR1059777A FR2968128B1 FR 2968128 B1 FR2968128 B1 FR 2968128B1 FR 1059777 A FR1059777 A FR 1059777A FR 1059777 A FR1059777 A FR 1059777A FR 2968128 B1 FR2968128 B1 FR 2968128B1
- Authority
- FR
- France
- Prior art keywords
- precaracterized
- cell
- integrated circuit
- integrated
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/118—Masterslice integrated circuits
- H01L27/11803—Masterslice integrated circuits using field effect technology
- H01L27/11807—CMOS gate arrays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
- H01L23/5286—Arrangements of power or ground buses
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR1059777A FR2968128B1 (fr) | 2010-11-26 | 2010-11-26 | Cellule precaracterisee pour circuit intégré |
| US13/238,655 US8963210B2 (en) | 2010-11-26 | 2011-09-21 | Standard cell for integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR1059777A FR2968128B1 (fr) | 2010-11-26 | 2010-11-26 | Cellule precaracterisee pour circuit intégré |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2968128A1 FR2968128A1 (fr) | 2012-06-01 |
| FR2968128B1 true FR2968128B1 (fr) | 2013-01-04 |
Family
ID=44144817
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR1059777A Expired - Fee Related FR2968128B1 (fr) | 2010-11-26 | 2010-11-26 | Cellule precaracterisee pour circuit intégré |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8963210B2 (fr) |
| FR (1) | FR2968128B1 (fr) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9431383B2 (en) * | 2014-07-22 | 2016-08-30 | Samsung Electronics Co., Ltd. | Integrated circuit, semiconductor device based on integrated circuit, and standard cell library |
| KR101958421B1 (ko) * | 2014-07-22 | 2019-03-14 | 삼성전자 주식회사 | 집적 회로, 상기 집적 회로에 따른 반도체 소자 및 표준 셀 라이브러리 |
| US9780082B2 (en) * | 2015-03-12 | 2017-10-03 | Samsung Electronics Co., Ltd. | Semiconductor device, layout system, and standard cell library |
| US9748226B1 (en) * | 2016-02-27 | 2017-08-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Decoupling capacitor |
| US9985014B2 (en) | 2016-09-15 | 2018-05-29 | Qualcomm Incorporated | Minimum track standard cell circuits for reduced area |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0369163A (ja) * | 1989-08-08 | 1991-03-25 | Nec Corp | 半導体集積回路装置 |
| US5420447A (en) * | 1993-01-29 | 1995-05-30 | Sgs-Thomson Microelectronics, Inc. | Double buffer base gate array cell |
| JPH0758301A (ja) * | 1993-08-13 | 1995-03-03 | Oki Electric Ind Co Ltd | 半導体集積回路装置 |
| US5923060A (en) * | 1996-09-27 | 1999-07-13 | In-Chip Systems, Inc. | Reduced area gate array cell design based on shifted placement of alternate rows of cells |
| JPH10335613A (ja) * | 1997-05-27 | 1998-12-18 | Mitsubishi Electric Corp | 半導体集積回路装置 |
| JP3647323B2 (ja) * | 1999-07-30 | 2005-05-11 | 富士通株式会社 | 半導体集積回路 |
| JP2001352047A (ja) * | 2000-06-05 | 2001-12-21 | Oki Micro Design Co Ltd | 半導体集積回路 |
| FR2851060A1 (fr) * | 2003-02-11 | 2004-08-13 | St Microelectronics Sa | Circuit a regulateur de tension integre et son procede de fabrication |
| US7084464B2 (en) * | 2003-07-10 | 2006-08-01 | Stmicroelectronics, Inc. | Library of cells for use in designing sets of domino logic circuits in a standard cell library, or the like, and method for using same |
| JP2006237564A (ja) * | 2005-01-31 | 2006-09-07 | Renesas Technology Corp | 半導体装置及びその製造方法並びに半導体集積回路 |
| JP4781040B2 (ja) * | 2005-08-05 | 2011-09-28 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置 |
| KR100704380B1 (ko) * | 2005-12-06 | 2007-04-09 | 한국전자통신연구원 | 반도체 소자 제조 방법 |
| US7943967B2 (en) * | 2006-03-09 | 2011-05-17 | Tela Innovations, Inc. | Semiconductor device and associated layouts including diffusion contact placement restriction based on relation to linear conductive segments |
| US7888706B2 (en) * | 2006-05-31 | 2011-02-15 | Infineon Technologies Ag | High-efficiency filler cell with switchable, integrated buffer capacitance for high frequency applications |
| JP2008004790A (ja) * | 2006-06-23 | 2008-01-10 | Oki Electric Ind Co Ltd | スタンダードセル |
-
2010
- 2010-11-26 FR FR1059777A patent/FR2968128B1/fr not_active Expired - Fee Related
-
2011
- 2011-09-21 US US13/238,655 patent/US8963210B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| FR2968128A1 (fr) | 2012-06-01 |
| US20120132963A1 (en) | 2012-05-31 |
| US8963210B2 (en) | 2015-02-24 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |
Effective date: 20150731 |