FR2533780B1 - Circuit de mise hors fonction de sortie active - Google Patents

Circuit de mise hors fonction de sortie active

Info

Publication number
FR2533780B1
FR2533780B1 FR8315246A FR8315246A FR2533780B1 FR 2533780 B1 FR2533780 B1 FR 2533780B1 FR 8315246 A FR8315246 A FR 8315246A FR 8315246 A FR8315246 A FR 8315246A FR 2533780 B1 FR2533780 B1 FR 2533780B1
Authority
FR
France
Prior art keywords
active output
output disabled
disabled circuit
circuit
active
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR8315246A
Other languages
English (en)
French (fr)
Other versions
FR2533780A1 (fr
Inventor
Sing Y Wong
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Monolithic Memories Inc
Original Assignee
Monolithic Memories Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Monolithic Memories Inc filed Critical Monolithic Memories Inc
Publication of FR2533780A1 publication Critical patent/FR2533780A1/fr
Application granted granted Critical
Publication of FR2533780B1 publication Critical patent/FR2533780B1/fr
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/0823—Multistate logic
    • H03K19/0826—Multistate logic one of the states being the high impedance or floating state

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
FR8315246A 1982-09-28 1983-09-26 Circuit de mise hors fonction de sortie active Expired FR2533780B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US42535282A 1982-09-28 1982-09-28

Publications (2)

Publication Number Publication Date
FR2533780A1 FR2533780A1 (fr) 1984-03-30
FR2533780B1 true FR2533780B1 (fr) 1989-11-03

Family

ID=23686179

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8315246A Expired FR2533780B1 (fr) 1982-09-28 1983-09-26 Circuit de mise hors fonction de sortie active

Country Status (5)

Country Link
JP (1) JPS5980022A (nl)
DE (1) DE3335133A1 (nl)
FR (1) FR2533780B1 (nl)
GB (1) GB2128432B (nl)
NL (1) NL193012C (nl)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4683383A (en) * 1984-07-19 1987-07-28 Tandem Computers Incorporated Driver circuit for a three-state gate array using low driving current
US4801825A (en) * 1987-07-06 1989-01-31 Motorola, Inc. Three level state logic circuit having improved high voltage to high output impedance transition
US4849659A (en) * 1987-12-15 1989-07-18 North American Philips Corporation, Signetics Division Emitter-coupled logic circuit with three-state capability
JP2806623B2 (ja) * 1990-11-06 1998-09-30 日本電気アイシーマイコンシステム株式会社 Ｔｔｌ出力回路

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS582437B2 (ja) * 1978-11-25 1983-01-17 富士通株式会社 スリ−ステイト出力回路
US4311927A (en) * 1979-07-18 1982-01-19 Fairchild Camera & Instrument Corp. Transistor logic tristate device with reduced output capacitance
JPS57129029A (en) * 1981-02-02 1982-08-10 Hitachi Ltd Three-state circuit
JPS57141129A (en) * 1981-02-26 1982-09-01 Toshiba Corp Semiconductor circuit

Also Published As

Publication number Publication date
NL8302933A (nl) 1984-04-16
GB2128432A (en) 1984-04-26
NL193012B (nl) 1998-03-02
DE3335133A1 (de) 1984-03-29
GB8321748D0 (en) 1983-09-14
JPS5980022A (ja) 1984-05-09
DE3335133C2 (nl) 1993-01-14
GB2128432B (en) 1986-07-30
NL193012C (nl) 1998-07-03
FR2533780A1 (fr) 1984-03-30

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Legal Events

Date Code Title Description
TP Transmission of property
ST Notification of lapse
ST Notification of lapse