FR2414227A1 - Unite arithmetique et logique d'un systeme de traitement de donnees - Google Patents

Unite arithmetique et logique d'un systeme de traitement de donnees

Info

Publication number
FR2414227A1
FR2414227A1 FR7900272A FR7900272A FR2414227A1 FR 2414227 A1 FR2414227 A1 FR 2414227A1 FR 7900272 A FR7900272 A FR 7900272A FR 7900272 A FR7900272 A FR 7900272A FR 2414227 A1 FR2414227 A1 FR 2414227A1
Authority
FR
France
Prior art keywords
arithmetic
logical unit
data processing
processing system
operations
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7900272A
Other languages
English (en)
Other versions
FR2414227B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of FR2414227A1 publication Critical patent/FR2414227A1/fr
Application granted granted Critical
Publication of FR2414227B1 publication Critical patent/FR2414227B1/fr
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/01Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising
    • G06F5/012Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising in floating-point computations
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804Details
    • G06F2207/3808Details concerning the type of numbers or the way they are handled
    • G06F2207/3812Devices capable of handling different types of numbers
    • G06F2207/382Reconfigurable for different fixed word lengths
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804Details
    • G06F2207/3808Details concerning the type of numbers or the way they are handled
    • G06F2207/3828Multigauge devices, i.e. capable of handling packed numbers without unpacking them

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Computational Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)

Abstract

L'INVENTION CONCERNE UNE UNITE ARITHMETIQUE ET LOGIQUE MICROPROGRAMMABLE. L'INVENTION COMPREND UNE PARTIE DE COMMANDE MICROPROGRAMMABLE, DE PARTIE DE TRAITEMENT COMPORTANT PLUSIEURS ETAGES DE PASTILLES DE MICROPROCESSEUR POUR EFFECTUER DES OPERATIONS EN VIRGULE FLOTTANTE SUR DES MANTISSES ET EXPOSANTS D'OPERANDES, AINSI QUE DES CIRCUITS DE COMMANDE ASSURANT SELECTIVEMENT UNE LIAISON OU UNE SEPARATION DES PARTIES DE TRAITEMENT POUR LES FAIRE OPERER COMME UNE SEULE UNITE OU BIEN COMME DEUX UNITES EN VUE D'AUGMENTER L'EFFICACITE D'EXECUTION D'OPERATIONS ARITHMETIQUES. APPLICATION AUX OPERATIONS EN VIRGULE FLOTTANTE.
FR7900272A 1978-01-05 1979-01-05 Unite arithmetique et logique d'un systeme de traitement de donnees Expired FR2414227B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/867,242 US4161784A (en) 1978-01-05 1978-01-05 Microprogrammable floating point arithmetic unit capable of performing arithmetic operations on long and short operands

Publications (2)

Publication Number Publication Date
FR2414227A1 true FR2414227A1 (fr) 1979-08-03
FR2414227B1 FR2414227B1 (fr) 1987-12-31

Family

ID=25349402

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7900272A Expired FR2414227B1 (fr) 1978-01-05 1979-01-05 Unite arithmetique et logique d'un systeme de traitement de donnees

Country Status (7)

Country Link
US (1) US4161784A (fr)
JP (1) JPS5498146A (fr)
AU (1) AU518371B2 (fr)
CA (1) CA1120594A (fr)
DE (1) DE2900324A1 (fr)
FR (1) FR2414227B1 (fr)
GB (1) GB2015783B (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0609673A1 (fr) * 1993-01-30 1994-08-10 Motorola, Inc. Système d'addition de mantisse pour un additionneur à virgule d'attente

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Also Published As

Publication number Publication date
AU518371B2 (en) 1981-09-24
FR2414227B1 (fr) 1987-12-31
GB2015783B (en) 1982-05-19
GB2015783A (en) 1979-09-12
JPS618446B2 (fr) 1986-03-14
US4161784A (en) 1979-07-17
JPS5498146A (en) 1979-08-02
CA1120594A (fr) 1982-03-23
DE2900324C2 (fr) 1989-01-19
DE2900324A1 (de) 1979-07-19
AU4304579A (en) 1979-07-12

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