JPS5481045A - Data processor - Google Patents

Data processor

Info

Publication number
JPS5481045A
JPS5481045A JP14913177A JP14913177A JPS5481045A JP S5481045 A JPS5481045 A JP S5481045A JP 14913177 A JP14913177 A JP 14913177A JP 14913177 A JP14913177 A JP 14913177A JP S5481045 A JPS5481045 A JP S5481045A
Authority
JP
Japan
Prior art keywords
register
information
address
stored
register group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14913177A
Other languages
Japanese (ja)
Other versions
JPS6058487B2 (en
Inventor
Seiichiro Yamamoto
Nobuhiro Koyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP52149131A priority Critical patent/JPS6058487B2/en
Publication of JPS5481045A publication Critical patent/JPS5481045A/en
Publication of JPS6058487B2 publication Critical patent/JPS6058487B2/en
Expired legal-status Critical Current

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  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE: To decrease the operation processing time and to obtain the data processor of low cost, in the control system controlling a plurality of terminals with one instruction at the same time.
CONSTITUTION: When the operation for the register R1 of the first operand and the register R2 for the second operand designated with the fields 1a and 1b of the operation register 1 is made, the information of the field 1a is delivered to the first register group 3a through the selector 2, the register group 3a reads out R1 by taking this as the address and delivers it to the operator unit 5. Simultaneously, the information of the filed 1b is directly delivered to the register group 3b and the register group 3b reads out R2 as the address and delivers it to the operating unit 5. This operation is parallelly operated. The operating unit 5 performs the operation designated with the register 1 and the result of operation is stored to the register of the same address for the both of the register groups 3a and 3b, but since the register R2 is stored, the address information of the register group 3a is stored, then it is selected to the information of the field 1b. Thus, two operands can simultaneously be read out.
COPYRIGHT: (C)1979,JPO&Japio
JP52149131A 1977-12-12 1977-12-12 data processing equipment Expired JPS6058487B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52149131A JPS6058487B2 (en) 1977-12-12 1977-12-12 data processing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52149131A JPS6058487B2 (en) 1977-12-12 1977-12-12 data processing equipment

Publications (2)

Publication Number Publication Date
JPS5481045A true JPS5481045A (en) 1979-06-28
JPS6058487B2 JPS6058487B2 (en) 1985-12-20

Family

ID=15468404

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52149131A Expired JPS6058487B2 (en) 1977-12-12 1977-12-12 data processing equipment

Country Status (1)

Country Link
JP (1) JPS6058487B2 (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5599647A (en) * 1979-01-24 1980-07-29 Nec Corp Data processor
JPS58114235A (en) * 1981-12-28 1983-07-07 Fujitsu Ltd Two-dimensional data converting and operating circuit
JPS6017538A (en) * 1983-07-11 1985-01-29 Hitachi Ltd Instruction processing device
JPS61292741A (en) * 1985-06-20 1986-12-23 Nec Corp General-purpose register
JPS62109122A (en) * 1985-11-08 1987-05-20 Nec Corp Information processor
JPS6344235A (en) * 1986-08-08 1988-02-25 Hitachi Ltd Data processor
JPH02301829A (en) * 1989-05-17 1990-12-13 Mitsubishi Electric Corp Information processor

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50139640A (en) * 1974-04-24 1975-11-08

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50139640A (en) * 1974-04-24 1975-11-08

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5599647A (en) * 1979-01-24 1980-07-29 Nec Corp Data processor
JPS6211381B2 (en) * 1979-01-24 1987-03-12 Nippon Electric Co
JPS58114235A (en) * 1981-12-28 1983-07-07 Fujitsu Ltd Two-dimensional data converting and operating circuit
JPH029364B2 (en) * 1981-12-28 1990-03-01 Fujitsu Ltd
JPS6017538A (en) * 1983-07-11 1985-01-29 Hitachi Ltd Instruction processing device
JPS61292741A (en) * 1985-06-20 1986-12-23 Nec Corp General-purpose register
JPS62109122A (en) * 1985-11-08 1987-05-20 Nec Corp Information processor
JPS6344235A (en) * 1986-08-08 1988-02-25 Hitachi Ltd Data processor
JPH02301829A (en) * 1989-05-17 1990-12-13 Mitsubishi Electric Corp Information processor

Also Published As

Publication number Publication date
JPS6058487B2 (en) 1985-12-20

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