FI20011610A0 - Menetelmä ja laite jakolaskun suorittamiseksi - Google Patents

Menetelmä ja laite jakolaskun suorittamiseksi

Info

Publication number
FI20011610A0
FI20011610A0 FI20011610A FI20011610A FI20011610A0 FI 20011610 A0 FI20011610 A0 FI 20011610A0 FI 20011610 A FI20011610 A FI 20011610A FI 20011610 A FI20011610 A FI 20011610A FI 20011610 A0 FI20011610 A0 FI 20011610A0
Authority
FI
Finland
Prior art keywords
division calculation
division
calculation
Prior art date
Application number
FI20011610A
Other languages
English (en)
Swedish (sv)
Inventor
Jaakko Vihriaelae
Original Assignee
Nokia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Corp filed Critical Nokia Corp
Priority to FI20011610A priority Critical patent/FI20011610A0/fi
Publication of FI20011610A0 publication Critical patent/FI20011610A0/fi
Priority to CNB028154665A priority patent/CN100524199C/zh
Priority to US10/484,163 priority patent/US20040167956A1/en
Priority to EP02748905A priority patent/EP1421471A1/en
Priority to PCT/FI2002/000654 priority patent/WO2003014914A1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/535—Dividing only
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/02—Digital function generators
    • G06F1/03—Digital function generators working, at least partly, by table look-up
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2101/00—Indexing scheme relating to the type of digital function generated
    • G06F2101/12—Reciprocal functions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/535—Indexing scheme relating to groups G06F7/535 - G06F7/5375
    • G06F2207/5354—Using table lookup, e.g. for digit selection in division by digit recurrence
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/535—Indexing scheme relating to groups G06F7/535 - G06F7/5375
    • G06F2207/5356—Via reciprocal, i.e. calculate reciprocal only, or calculate reciprocal first and then the quotient from the reciprocal and the numerator

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Complex Calculations (AREA)
  • Error Detection And Correction (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
FI20011610A 2001-08-07 2001-08-07 Menetelmä ja laite jakolaskun suorittamiseksi FI20011610A0 (fi)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FI20011610A FI20011610A0 (fi) 2001-08-07 2001-08-07 Menetelmä ja laite jakolaskun suorittamiseksi
CNB028154665A CN100524199C (zh) 2001-08-07 2002-08-06 执行除法的方法和装置
US10/484,163 US20040167956A1 (en) 2001-08-07 2002-08-06 Method and apparatus for executing division
EP02748905A EP1421471A1 (en) 2001-08-07 2002-08-06 Method and apparatus for executing division
PCT/FI2002/000654 WO2003014914A1 (en) 2001-08-07 2002-08-06 Method and apparatus for executing division

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI20011610A FI20011610A0 (fi) 2001-08-07 2001-08-07 Menetelmä ja laite jakolaskun suorittamiseksi

Publications (1)

Publication Number Publication Date
FI20011610A0 true FI20011610A0 (fi) 2001-08-07

Family

ID=8561712

Family Applications (1)

Application Number Title Priority Date Filing Date
FI20011610A FI20011610A0 (fi) 2001-08-07 2001-08-07 Menetelmä ja laite jakolaskun suorittamiseksi

Country Status (5)

Country Link
US (1) US20040167956A1 (fi)
EP (1) EP1421471A1 (fi)
CN (1) CN100524199C (fi)
FI (1) FI20011610A0 (fi)
WO (1) WO2003014914A1 (fi)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NZ524378A (en) * 2003-02-24 2004-12-24 Tait Electronics Ltd Binary shift and subtract divider for phase lock loops
US7167891B2 (en) * 2003-03-21 2007-01-23 Intel Corporation Narrow data path for very high radix division
US7467174B2 (en) * 2004-09-23 2008-12-16 Wisconsin Alumni Research Foundation Processing unit having decimal floating-point divider using Newton-Raphson iteration
US20060179092A1 (en) * 2005-02-10 2006-08-10 Schmookler Martin S System and method for executing fixed point divide operations using a floating point multiply-add pipeline
US7895250B2 (en) 2005-05-25 2011-02-22 Qualcomm Incorporated Fixed point integer division techniques for AC/DC prediction in video coding devices
CN100367191C (zh) * 2005-09-22 2008-02-06 上海广电（集团）有限公司中央研究院 一种快速流水线型除法器
FR2895105A1 (fr) * 2005-12-20 2007-06-22 St Microelectronics Sa Procede pour diviser un nombre par une fraction ayant au numerateur un nombre en forme de puissance de 2
EP2375751A1 (en) 2010-04-12 2011-10-12 Panasonic Corporation Complexity reduction of edge-detection based spatial interpolation
KR20120027827A (ko) * 2010-09-13 2012-03-22 한국전자통신연구원 디바이더 및 그것의 동작 방법
CN102508633B (zh) * 2011-12-02 2014-10-22 四川和芯微电子股份有限公司 除法器逻辑电路及实现除法器逻辑电路的方法
CN103699356B (zh) * 2012-09-27 2016-09-21 任光前 一种并行除法计算器
CN104731551B (zh) * 2013-12-23 2018-02-16 浙江大华技术股份有限公司 基于fpga进行除法操作的方法及装置
US9524143B2 (en) 2014-06-26 2016-12-20 Arm Limited Apparatus and method for efficient division performance
JP2016062404A (ja) * 2014-09-19 2016-04-25 サンケン電気株式会社 演算処理方法及び演算処理装置
WO2018149995A1 (en) * 2017-02-16 2018-08-23 Telefonaktiebolaget Lm Ericsson (Publ) Filter apparatus and methods
CN111385578B (zh) * 2018-12-28 2021-06-01 北京图森智途科技有限公司 一种应用于fpga的数据解压缩方法、成像设备和汽车
CN112256235A (zh) * 2020-10-28 2021-01-22 Oppo广东移动通信有限公司 除运算方法及除法器、除法装置、电子设备、存储介质

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60142738A (ja) * 1983-12-30 1985-07-27 Hitachi Ltd 内挿近似を使用する除算装置
US4991132A (en) * 1987-12-17 1991-02-05 Matsushita Electric Industrial Co., Ltd. Apparatus for executing division by high-speed convergence processing
US4916531A (en) * 1988-03-23 1990-04-10 Data Translation, Inc. Color video processing circuitry
US5020017A (en) * 1989-04-10 1991-05-28 Motorola, Inc. Method and apparatus for obtaining the quotient of two numbers within one clock cycle
JP3199371B2 (ja) * 1990-07-30 2001-08-20 松下電器産業株式会社 丸め装置
US5862059A (en) * 1995-07-19 1999-01-19 National Semiconductor Corporation Table compression using bipartite tables
US5825681A (en) * 1996-01-24 1998-10-20 Alliance Semiconductor Corporation Divider/multiplier circuit having high precision mode
US6282556B1 (en) * 1999-10-08 2001-08-28 Sony Corporation Of Japan High performance pipelined data path for a media processor
US7191204B1 (en) * 1999-12-22 2007-03-13 Wataru Ogata Computing system using newton-raphson method
US7058675B1 (en) * 2000-09-28 2006-06-06 Altera Corporation Apparatus and method for implementing efficient arithmetic circuits in programmable logic devices
US6782405B1 (en) * 2001-06-07 2004-08-24 Southern Methodist University Method and apparatus for performing division and square root functions using a multiplier and a multipartite table
US7130876B2 (en) * 2001-11-30 2006-10-31 General Instrument Corporation Systems and methods for efficient quantization
US7065546B2 (en) * 2002-04-09 2006-06-20 Sony Electronics Inc. Method of performing quantization within a multimedia bitstream utilizing division-free instructions

Also Published As

Publication number Publication date
CN1539102A (zh) 2004-10-20
WO2003014914A1 (en) 2003-02-20
US20040167956A1 (en) 2004-08-26
EP1421471A1 (en) 2004-05-26
CN100524199C (zh) 2009-08-05

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