ES539033A0 - Una instalacion de tratamiento de datos que incluye una pluralidad de dispositivos multiprocesadores. - Google Patents

Una instalacion de tratamiento de datos que incluye una pluralidad de dispositivos multiprocesadores.

Info

Publication number: ES539033A0
Authority: ES; Spain
Prior art keywords: data processing; processing facility; multiprocessor devices; multiprocessor; devices
Prior art date: 1983-12-26
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Granted

Application number

ES539033A

Other languages

English (en)

Other versions

ES8602272A1 (es

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Fujitsu Ltd

Original Assignee

Fujitsu Ltd

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1983-12-26

Filing date

1984-12-24

Publication date

1985-11-16

1983-12-26 Priority claimed from JP58247391A external-priority patent/JPS60136850A/ja

1983-12-27 Priority claimed from JP25192383A external-priority patent/JPS60140454A/ja

1984-02-25 Priority claimed from JP3496484A external-priority patent/JPS60178566A/ja

1984-12-24 Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd

1985-11-16 Publication of ES539033A0 publication Critical patent/ES539033A0/es

1985-11-16 Publication of ES8602272A1 publication Critical patent/ES8602272A1/es

Status Expired legal-status Critical Current

Links

Classifications

- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
- G06F13/1652—Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
- G06F13/1657—Access to multiple memories
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
Physics & Mathematics (AREA)
General Engineering & Computer Science (AREA)
General Physics & Mathematics (AREA)
Multi Processors (AREA)

ES539033A 1983-12-26 1984-12-24 Una instalacion de tratamiento de datos que incluye una pluralidad de dispositivos multiprocesadores. Expired ES8602272A1 (es)

Applications Claiming Priority (3)

Application Number	Priority Date	Filing Date	Title
JP58247391A JPS60136850A (ja)	1983-12-26	1983-12-26	マルチプロセッサ・システム
JP25192383A JPS60140454A (ja)	1983-12-27	1983-12-27	記憶部制御装置
JP3496484A JPS60178566A (ja)	1984-02-25	1984-02-25	アクセス制御方式

Publications (2)

Publication Number	Publication Date
ES539033A0 true ES539033A0 (es)	1985-11-16
ES8602272A1 ES8602272A1 (es)	1985-11-16

Family

ID=27288592

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
ES539033A Expired ES8602272A1 (es)	1983-12-26	1984-12-24	Una instalacion de tratamiento de datos que incluye una pluralidad de dispositivos multiprocesadores.

Country Status (8)

Country	Link
US (1)	US4718006A (es)
EP (1)	EP0147295B1 (es)
KR (1)	KR890004995B1 (es)
AU (1)	AU554059B2 (es)
BR (1)	BR8406678A (es)
CA (1)	CA1221464A (es)
DE (1)	DE3484235D1 (es)
ES (1)	ES8602272A1 (es)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5228127A (en) *	1985-06-24	1993-07-13	Fujitsu Limited	Clustered multiprocessor system with global controller connected to each cluster memory control unit for directing order from processor to different cluster processors
JPS62197858A (ja) *	1986-02-26	1987-09-01	Hitachi Ltd	システム間デ−タベ−ス共用方式
JPS62206658A (ja) *	1986-03-07	1987-09-11	Hitachi Ltd	記憶管理装置
JPH01169565A (ja) *	1987-12-24	1989-07-04	Fujitsu Ltd	マルチプロセッサ制御方式
US5214769A (en) *	1987-12-24	1993-05-25	Fujitsu Limited	Multiprocessor control system
JPH0731622B2 (ja) *	1988-05-06	1995-04-10	富士通株式会社	メモリアクセス制御方法
US5218688A (en) *	1988-05-06	1993-06-08	Fujitsu Limited	Data processing system with memory-access priority control
US5043874A (en) *	1989-02-03	1991-08-27	Digital Equipment Corporation	Memory configuration for use with means for interfacing a system control unit for a multi-processor system with the system main memory
US5239629A (en) *	1989-12-29	1993-08-24	Supercomputer Systems Limited Partnership	Dedicated centralized signaling mechanism for selectively signaling devices in a multiprocessor system
US5193187A (en) *	1989-12-29	1993-03-09	Supercomputer Systems Limited Partnership	Fast interrupt mechanism for interrupting processors in parallel in a multiprocessor system wherein processors are assigned process ID numbers
US5197130A (en) *	1989-12-29	1993-03-23	Supercomputer Systems Limited Partnership	Cluster architecture for a highly parallel scalar/vector multiprocessor system
US5680574A (en)	1990-02-26	1997-10-21	Hitachi, Ltd.	Data distribution utilizing a master disk unit for fetching and for writing to remaining disk units
US6728832B2 (en) *	1990-02-26	2004-04-27	Hitachi, Ltd.	Distribution of I/O requests across multiple disk units
EP0495167A3 (en) *	1991-01-16	1996-03-06	Ibm	Multiple asynchronous request handling
JP2587586B2 (ja)	1994-05-25	1997-03-05	甲府日本電気株式会社	データ転送方法
JP2731761B2 (ja) *	1995-08-29	1998-03-25	甲府日本電気株式会社	ネットワーク制御装置
DE19606629A1 (de) *	1996-02-22	1997-08-28	Siemens Nixdorf Inf Syst	Mehrprozessor-Zentraleinheit
US6073209A (en) *	1997-03-31	2000-06-06	Ark Research Corporation	Data storage controller providing multiple hosts with access to multiple storage subsystems
US7071946B2 (en) *	1997-12-30	2006-07-04	Micron Technology, Inc.	Accelerated graphics port for a multiple memory controller computer system
US6892266B2 (en) *	2000-11-15	2005-05-10	Texas Instruments Incorporated	Multicore DSP device having coupled subsystem memory buses for global DMA access
US7133942B2 (en) *	2001-12-07	2006-11-07	International Business Machines Corporation	Sequence-preserving multiprocessing system with multimode TDM buffer
US7017017B2 (en) *	2002-11-08	2006-03-21	Intel Corporation	Memory controllers with interleaved mirrored memory modes
KR20210046348A (ko) *	2019-10-18	2021-04-28	삼성전자주식회사	복수의 프로세서들에 유연하게 메모리를 할당하기 위한 메모리 시스템 및 그것의 동작 방법

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
FR2119187A5 (es) *	1970-12-23	1972-08-04	Constr Telephoniques
US4257099A (en) *	1975-10-14	1981-03-17	Texas Instruments Incorporated	Communication bus coupler
DE2546202A1 (de) *	1975-10-15	1977-04-28	Siemens Ag	Rechnersystem aus mehreren miteinander verbundenen und zusammenwirkenden einzelrechnern und verfahren zum betrieb des rechnersystems
US4400771A (en) *	1975-12-04	1983-08-23	Tokyo Shibaura Electric Co., Ltd.	Multi-processor system with programmable memory-access priority control
FR2412122A1 (fr) *	1977-12-15	1979-07-13	Materiel Telephonique	Agencement d'interconnexion pour microprocesseurs de commande d'un ensemble complexe
JPS564854A (en) *	1979-06-22	1981-01-19	Fanuc Ltd	Control system for plural microprocessors
US4342083A (en) *	1980-02-05	1982-07-27	The Bendix Corporation	Communication system for a multiple-computer system
US4363093A (en) *	1980-03-10	1982-12-07	International Business Machines Corporation	Processor intercommunication system
US4451880A (en) *	1980-10-31	1984-05-29	Honeywell Information Systems Inc.	Memory controller with interleaved queuing apparatus
CA1187198A (en) *	1981-06-15	1985-05-14	Takashi Chiba	System for controlling access to channel buffers
DE3140310C1 (de) *	1981-10-10	1983-04-07	Telefonbau Und Normalzeit Gmbh, 6000 Frankfurt	Schaltungsanordnung zur Speicherung von eine Datenverarbeitungseinrichtung weiterzugebenden Daten
US4495567A (en) *	1981-10-15	1985-01-22	Codex Corporation	Multiprocessor/multimemory control system
US4473878A (en) *	1981-11-23	1984-09-25	Motorola, Inc.	Memory management unit
US4663706A (en) *	1982-10-28	1987-05-05	Tandem Computers Incorporated	Multiprocessor multisystem communications network
DE3302831A1 (de) *	1983-01-28	1984-08-02	Standard Elektrik Lorenz Ag, 7000 Stuttgart	Schaltungsanordnung fuer den speicherzugriff in einem mehrrechnersystem
JPH078139B2 (ja) *	1983-09-02	1995-01-30	キヤノン株式会社	高圧電源
DE3421384A1 (de) *	1984-06-08	1985-12-12	Standard Elektrik Lorenz Ag, 7000 Stuttgart	Vorrichtung zum zusammenbau von elektronenstrahlerzeugern

1984
- 1984-12-12 CA CA000469910A patent/CA1221464A/en not_active Expired
- 1984-12-17 US US06/682,316 patent/US4718006A/en not_active Expired - Lifetime
- 1984-12-17 DE DE8484402614T patent/DE3484235D1/de not_active Expired - Fee Related
- 1984-12-17 EP EP84402614A patent/EP0147295B1/en not_active Expired - Lifetime
- 1984-12-18 AU AU36857/84A patent/AU554059B2/en not_active Ceased
- 1984-12-21 BR BR8406678A patent/BR8406678A/pt not_active IP Right Cessation
- 1984-12-21 KR KR1019840008243A patent/KR890004995B1/ko not_active IP Right Cessation
- 1984-12-24 ES ES539033A patent/ES8602272A1/es not_active Expired

Also Published As

Publication number	Publication date
KR850004820A (ko)	1985-07-27
EP0147295B1 (en)	1991-03-06
CA1221464A (en)	1987-05-05
AU554059B2 (en)	1986-08-07
EP0147295A2 (en)	1985-07-03
US4718006A (en)	1988-01-05
AU3685784A (en)	1985-07-04
EP0147295A3 (en)	1987-11-19
ES8602272A1 (es)	1985-11-16
KR890004995B1 (ko)	1989-12-04
BR8406678A (pt)	1985-10-22
DE3484235D1 (de)	1991-04-11

Publication	Publication Date	Title
ES539033A0 (es)	1985-11-16	Una instalacion de tratamiento de datos que incluye una pluralidad de dispositivos multiprocesadores.
ES518678A0 (es)	1984-06-01	Una instalacion de tratamiento de datos por ordenadores multiples.
DE3580778D1 (de)	1991-01-17	Datenverarbeitungsvorrichtung.
ES526438A0 (es)	1984-08-01	Una instalacion de tratamiento de datos,en particular capaz de compartir una pluralidad de sistemas operativos
DE3481233D1 (de)	1990-03-08	Pipelineverarbeitungseinheit.
DE3482010D1 (de)	1990-05-23	Datenverwaltungsgeraet.
DE2920490A1 (de)	1979-11-29	Datenverarbeitungssystem
DK3879A (da)	1979-07-24	Databehandlingsanlaeg
DK164420C (da)	1992-11-16	Multiprocessordatamatsystem
DE3486390D1 (de)	1995-07-13	Bildverarbeitungsgerät.
KR850006738A (ko)	1985-10-16	데이타 처리 시스템
NL192144B (nl)	1996-10-01	Informatieverwerkende inrichting.
ES492247A0 (es)	1981-06-01	Un sistema de tratamiento de datos
DE3177233D1 (de)	1990-12-20	Datenverarbeitungssystem.
DE3581007D1 (de)	1991-02-07	Wortverarbeitungsgeraet.
NL193227B (nl)	1998-11-02	Informatie-verwerkende inrichting.
ES525537A0 (es)	1984-06-16	Dispositivo de interrupciones de entrada-salida en una instalacion de tratamiento de datos
DE3484147D1 (de)	1991-04-04	Rechnersystem.
NO842698L (no)	1985-01-07	Anordning for informasjonsbehandling
DE3855605D1 (de)	1996-11-14	Datenverarbeitungsvorrichtung
DE3483013D1 (de)	1990-09-27	Simultaner gebrauch mehrerer sprachen in datenverarbeitungssystemen.
DE3484784D1 (de)	1991-08-14	Datenverarbeitungsanlage mit einem zeichengenerator.
NL193804B (nl)	2000-07-03	Storingsveilige gegevensverwerkende inrichting.
DK3979A (da)	1979-07-24	Databehandlingsanlaeg
DE3485191D1 (de)	1991-11-28	Musterdatenverarbeitungsanlage.