ES486724A1 - Disposicion de control de configuracion de almacenaje prin- cipal para un sistema de tratamiento de datos - Google Patents
Disposicion de control de configuracion de almacenaje prin- cipal para un sistema de tratamiento de datosInfo
- Publication number
- ES486724A1 ES486724A1 ES486724A ES486724A ES486724A1 ES 486724 A1 ES486724 A1 ES 486724A1 ES 486724 A ES486724 A ES 486724A ES 486724 A ES486724 A ES 486724A ES 486724 A1 ES486724 A1 ES 486724A1
- Authority
- ES
- Spain
- Prior art keywords
- configuration
- main storage
- unit
- configuration data
- control system
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0646—Configuration or reconfiguration
- G06F12/0653—Configuration or reconfiguration with centralised address assignment
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Controls And Circuits For Display Device (AREA)
- Executing Machine-Instructions (AREA)
- Bus Control (AREA)
- Memory System (AREA)
Abstract
Disposición de control de configuración de almacenaje principal para un sistema de tratamiento de datos, que está provisto de una unidad principal de almacenaje, comprendiendo un almacenaje principal compuesto de una pluralidad de unidades de configuración y un controlador principal de almacenaje para seleccionar una de las unidades de configuración del almacenaje principal y lectura y escrita controladores de información respecto a la unidad de configuración seleccionada, y una unidad central de tratamiento, comprendiendo el sistema de control de configuración de almacenaje principal; un medio de almacenaje de información de selección de unidad de configuración recargable, para dar salida a datos de configuración de acuerdo con una dirección desde la unidad de tratamiento central; y un controlador de selección de unidad de configuración para escribir, en el medio de almacenaje de información de selección de unidad de configuración, datos de configuración, previstas fuera de la unidad de almacenaje principal y controlando la lectura del medio de almacenaje de información de selección de configuración de acuerdo con la dirección desde la unidad central de tratamiento; caracterizada porque los datos de configuración se escriben por el controlador de selección de unidad de configuración en el medio de almacenaje de información de selección de unidad de configuración en el medio de almacenaje de información de selección de unidad de configuración y se les de ello de acuerdo con la dirección desde la unidad de tratamiento central para seleccionar una de las unidades de configuración del almacenaje para un acceso a ella.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15482778A JPS5580164A (en) | 1978-12-13 | 1978-12-13 | Main memory constitution control system |
Publications (1)
Publication Number | Publication Date |
---|---|
ES486724A1 true ES486724A1 (es) | 1980-09-16 |
Family
ID=15592738
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES486724A Expired ES486724A1 (es) | 1978-12-13 | 1979-12-10 | Disposicion de control de configuracion de almacenaje prin- cipal para un sistema de tratamiento de datos |
Country Status (6)
Country | Link |
---|---|
US (1) | US4562532A (es) |
JP (1) | JPS5580164A (es) |
AU (1) | AU532288B2 (es) |
CA (1) | CA1152212A (es) |
DE (1) | DE2949768C2 (es) |
ES (1) | ES486724A1 (es) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5740790A (en) * | 1980-08-25 | 1982-03-06 | Fujitsu Ltd | Storage control system |
IT1153611B (it) * | 1982-11-04 | 1987-01-14 | Honeywell Inf Systems | Procedimento di mappatura della memoria in sistema di elaborazione dati |
US4630230A (en) * | 1983-04-25 | 1986-12-16 | Cray Research, Inc. | Solid state storage device |
US4829467A (en) * | 1984-12-21 | 1989-05-09 | Canon Kabushiki Kaisha | Memory controller including a priority order determination circuit |
US4658359A (en) * | 1984-12-31 | 1987-04-14 | The United States Of America As Represented By The Secretary Of The Navy | Method for managing redundant resources in a complex avionics communication system |
US4744025A (en) * | 1985-05-02 | 1988-05-10 | Digital Equipment Corporation | Arrangement for expanding memory capacity |
CA1234224A (en) * | 1985-05-28 | 1988-03-15 | Boleslav Sykora | Computer memory management system |
JPS6219904A (ja) * | 1985-07-18 | 1987-01-28 | Diesel Kiki Co Ltd | マイクロプロセツサを用いた制御装置 |
JPS62124689A (ja) * | 1985-11-25 | 1987-06-05 | Nec Corp | プログラマブルチツプセレクト信号発生回路 |
US4740916A (en) * | 1985-12-19 | 1988-04-26 | International Business Machines Corporation | Reconfigurable contiguous address space memory system including serially connected variable capacity memory modules and a split address bus |
US4980850A (en) * | 1987-05-14 | 1990-12-25 | Digital Equipment Corporation | Automatic sizing memory system with multiplexed configuration signals at memory modules |
US5115511A (en) * | 1987-09-08 | 1992-05-19 | Siemens Ak. | Arrangement for loading the parameters into active modules in a computer system |
US5268319A (en) | 1988-06-08 | 1993-12-07 | Eliyahou Harari | Highly compact EPROM and flash EEPROM devices |
US5142638A (en) * | 1989-02-07 | 1992-08-25 | Cray Research, Inc. | Apparatus for sharing memory in a multiprocessor system |
DE69024086T2 (de) | 1989-04-13 | 1996-06-20 | Sundisk Corp | EEprom-System mit Blocklöschung |
US5168555A (en) * | 1989-09-06 | 1992-12-01 | Unisys Corporation | Initial program load control |
CA2028551A1 (en) * | 1989-11-03 | 1991-05-04 | John S. Thayer | Data destination facility |
US5179686A (en) * | 1990-08-16 | 1993-01-12 | Ncr Corporation | Method for automatically detecting the size of a memory by performing a memory warp operation |
US5206952A (en) * | 1990-09-12 | 1993-04-27 | Cray Research, Inc. | Fault tolerant networking architecture |
US6230233B1 (en) | 1991-09-13 | 2001-05-08 | Sandisk Corporation | Wear leveling techniques for flash EEPROM systems |
WO1993022726A1 (en) * | 1992-05-04 | 1993-11-11 | Compaq Computer Corporation | Single map data destination facility |
US5537646A (en) * | 1992-11-19 | 1996-07-16 | The United States Of America As Represented By The Secretary Of The Navy | Apparatus initialized for selected device based upon timing, interrupt, and DMA control commands within configuration data passed from processor to transfer data to selected device |
US5446860A (en) * | 1993-01-11 | 1995-08-29 | Hewlett-Packard Company | Apparatus for determining a computer memory configuration of memory modules using presence detect bits shifted serially into a configuration register |
US5341494A (en) * | 1993-02-12 | 1994-08-23 | Compaq Computer Corporation | Memory accessing system with an interface and memory selection unit utilizing write protect and strobe signals |
US5586300A (en) * | 1994-07-20 | 1996-12-17 | Emc Corporation | Flexible addressing memory controller wherein multiple memory modules may be accessed according to comparison of configuration addresses |
US6047361A (en) * | 1996-08-21 | 2000-04-04 | International Business Machines Corporation | Memory control device, with a common synchronous interface coupled thereto, for accessing asynchronous memory devices and different synchronous devices |
US6314489B1 (en) * | 1998-07-10 | 2001-11-06 | Nortel Networks Limited | Methods and systems for storing cell data using a bank of cell buffers |
US6694385B1 (en) * | 1999-09-10 | 2004-02-17 | Texas Instruments Incorporated | Configuration bus reconfigurable/reprogrammable interface for expanded direct memory access processor |
CN100483552C (zh) * | 2002-10-28 | 2009-04-29 | 桑迪士克股份有限公司 | 在非易失性存储***中执行自动磨损平衡的方法 |
US6928511B2 (en) * | 2003-03-03 | 2005-08-09 | High Tech Computer, Corp. | Method and system for managing virtual memory |
CN106547719A (zh) * | 2016-09-26 | 2017-03-29 | 中国电子科技集团公司第二十九研究所 | 一种***通信和控制处理同步方法 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3902164A (en) * | 1972-07-21 | 1975-08-26 | Ibm | Method and means for reducing the amount of address translation in a virtual memory data processing system |
JPS532296B2 (es) * | 1973-03-19 | 1978-01-26 | ||
FR130806A (es) * | 1973-11-21 | |||
DE2364408C3 (de) * | 1973-12-22 | 1979-06-07 | Olympia Werke Ag, 2940 Wilhelmshaven | Schaltungsanordnung zur Adressierung der Speicherplätze eines aus mehreren Chips bestehenden Speichers |
CA1053352A (en) * | 1974-11-12 | 1979-04-24 | Scott A. Inrig | Method for providing a substitute memory module in a data processing system |
US3967104A (en) * | 1974-11-26 | 1976-06-29 | Texas Instruments Incorporated | Direct and indirect addressing in an electronic digital calculator |
DE2524802A1 (de) * | 1975-06-04 | 1976-12-16 | Siemens Ag | Arbeitsspeicheranordnung |
US4028684A (en) * | 1975-10-16 | 1977-06-07 | Bell Telephone Laboratories, Incorporated | Memory patching circuit with repatching capability |
US4149244A (en) * | 1976-06-07 | 1979-04-10 | Amdahl Corporation | Data processing system including a program-executing secondary system controlling a program-executing primary system |
US4244032A (en) * | 1977-12-16 | 1981-01-06 | Oliver Douglas E | Apparatus for programming a PROM by propagating data words from an address bus to the PROM data terminals |
US4223381A (en) * | 1978-06-30 | 1980-09-16 | Harris Corporation | Lookahead memory address control system |
US4320453A (en) * | 1978-11-02 | 1982-03-16 | Digital House, Ltd. | Dual sequencer microprocessor |
US4281379A (en) * | 1978-12-18 | 1981-07-28 | Mcdonnell Douglas Corporation | Computer driven control system for a numerically controlled machine tool |
US4394734A (en) * | 1980-12-29 | 1983-07-19 | International Business Machines Corp. | Programmable peripheral processing controller |
-
1978
- 1978-12-13 JP JP15482778A patent/JPS5580164A/ja active Pending
-
1979
- 1979-12-06 AU AU53530/79A patent/AU532288B2/en not_active Ceased
- 1979-12-10 ES ES486724A patent/ES486724A1/es not_active Expired
- 1979-12-11 DE DE2949768A patent/DE2949768C2/de not_active Expired
- 1979-12-13 CA CA000341797A patent/CA1152212A/en not_active Expired
-
1982
- 1982-05-24 US US06/381,554 patent/US4562532A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE2949768C2 (de) | 1986-09-11 |
US4562532A (en) | 1985-12-31 |
AU532288B2 (en) | 1983-09-22 |
CA1152212A (en) | 1983-08-16 |
AU5353079A (en) | 1980-06-19 |
DE2949768A1 (de) | 1980-06-19 |
JPS5580164A (en) | 1980-06-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FD1A | Patent lapsed |
Effective date: 19970203 |