JPS5729164A - Computer system - Google Patents

Abstract

PURPOSE:To set the number of protection blocks optionally by suppressing the writing of written data supplied from a data bus when a write inhibition signal is supplied via a write inhibition signal bus. CONSTITUTION:A CPU1 selects a storage device 5 on the basis of a write and read address supplied via an address bus 2, and indicates the reading and writing of data by a write and read signal supplied via a control signal bus 3. In this case, when write and read addresses from the CPU1 are included in protection addresses preset for memory protection, an address comparator 18 supplies a write inhibition signal to a write inhibition signal bus 19, and this signal is used to send the indication of the write inhibition of written data to the device 5. Consequently, the device 5 suppresses the writing of the written data by a write and indication signal supplied from the CPU1 via the bus 3 when the write and read indication signal shows the indication of writing.