ES2164738T3 - Procedimiento para efectuar el encapsulado de un modulo de chip de microcircuito integrado para una tarjeta y dispositivo para la realizacion del procedimiento. - Google Patents
Procedimiento para efectuar el encapsulado de un modulo de chip de microcircuito integrado para una tarjeta y dispositivo para la realizacion del procedimiento.Info
- Publication number
- ES2164738T3 ES2164738T3 ES95119841T ES95119841T ES2164738T3 ES 2164738 T3 ES2164738 T3 ES 2164738T3 ES 95119841 T ES95119841 T ES 95119841T ES 95119841 T ES95119841 T ES 95119841T ES 2164738 T3 ES2164738 T3 ES 2164738T3
- Authority
- ES
- Spain
- Prior art keywords
- procedure
- card
- module
- encapsulate
- performance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000008021 deposition Effects 0.000 abstract 1
- 230000001681 protective effect Effects 0.000 abstract 1
- 229920002994 synthetic fiber Polymers 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Credit Cards Or The Like (AREA)
- Measurement Of The Respiration, Hearing Ability, Form, And Blood Characteristics Of Living Organisms (AREA)
Abstract
EN UN PROCEDIMIENTO PARA EL ENCAPSULADO EN UNA CARA DE UN MODULO DE TARJETA DE CHIP CON MASA DE FUNDICION LIQUIDA Y ENDURECIBLE, SE SUJETA UNA MASA DE FUNDICION QUE PENETRA EN ABERTURAS QUE PASAN A TRAVES DE LAS SUPERFICIES DE CONTACTO DEL MODULO DE TARJETA DE CHIP BAJO CIERRE DE LAS ABERTURAS MEDIANTE RADIACION Y SE EVITA LA APARICION EN LAS DESEMBOCADURAS DE LAS ABERTURAS QUE SE ABREN EN LA SUPERFICIE DE CONTACTO. EN EL DISPOSITIVO PREVISTO PARA LA REALIZACION DEL PROCEDIMIENTO SE DISPONE DE UNA SUPERFICIE (10) DE SOPORTE EN UN APOYO (C) POSICIONABLE SOBRE LA SUPERFICIE (10) DENTRO DE LA ZONA DE ENCAPSULADO CON LA SUPERFICIE (9) DE CONTACTO, DISPONIENDOSE DE UN ESPACIO (2, 2A) HUECO Y AL MENOS HABIENDOSE PREVISTO UNA FUENTE (4) DE RADIACION DIRIGIBLE SOBRE EL SOPORTE (C), EN EL CUAL ES SUJETABLE UNA MASA DE FUNDICION QUE PENETRA AL MENOS EN LAS ABERTURAS (L) MEDIANTE RADIACION ENDURECEDORA.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE4444812A DE4444812C1 (de) | 1994-12-15 | 1994-12-15 | Verfahren zum Verkappen eines Chipkartenmoduls und Vorrichtung zum Durchführen des Verfahrens |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2164738T3 true ES2164738T3 (es) | 2002-03-01 |
Family
ID=6535956
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES95119841T Expired - Lifetime ES2164738T3 (es) | 1994-12-15 | 1995-12-15 | Procedimiento para efectuar el encapsulado de un modulo de chip de microcircuito integrado para una tarjeta y dispositivo para la realizacion del procedimiento. |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP0717370B1 (es) |
CN (1) | CN1050224C (es) |
AT (1) | ATE207225T1 (es) |
DE (2) | DE4444812C1 (es) |
ES (1) | ES2164738T3 (es) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7479653B2 (en) | 2003-12-04 | 2009-01-20 | Henkel Ag & Co Kgaa | UV curable protective encapsulant |
DE102019219230A1 (de) * | 2019-12-10 | 2021-06-10 | Robert Bosch Gmbh | Verfahren zur Ausbildung eines Elektronikmodules |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6086850A (ja) * | 1983-10-18 | 1985-05-16 | Dainippon Printing Co Ltd | Icカ−ド |
JPS60142488A (ja) * | 1983-12-28 | 1985-07-27 | Dainippon Printing Co Ltd | Icカ−ド |
JPS63149191A (ja) * | 1986-12-15 | 1988-06-21 | 日立マクセル株式会社 | Icカ−ド |
US5115545A (en) * | 1989-03-28 | 1992-05-26 | Matsushita Electric Industrial Co., Ltd. | Apparatus for connecting semiconductor devices to wiring boards |
-
1994
- 1994-12-15 DE DE4444812A patent/DE4444812C1/de not_active Expired - Fee Related
-
1995
- 1995-12-15 CN CN95121694A patent/CN1050224C/zh not_active Expired - Fee Related
- 1995-12-15 ES ES95119841T patent/ES2164738T3/es not_active Expired - Lifetime
- 1995-12-15 AT AT95119841T patent/ATE207225T1/de not_active IP Right Cessation
- 1995-12-15 EP EP95119841A patent/EP0717370B1/de not_active Expired - Lifetime
- 1995-12-15 DE DE59509718T patent/DE59509718D1/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN1130804A (zh) | 1996-09-11 |
EP0717370B1 (de) | 2001-10-17 |
DE4444812C1 (de) | 1996-05-15 |
EP0717370A2 (de) | 1996-06-19 |
CN1050224C (zh) | 2000-03-08 |
DE59509718D1 (de) | 2001-11-22 |
ATE207225T1 (de) | 2001-11-15 |
EP0717370A3 (de) | 1997-02-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
ES2163114T3 (es) | Modulo electronico sin contacto para tarjeta o etiqueta. | |
KR970705803A (ko) | 무 접촉 스마트 카드용 스카트 카드 모듈을 제조하기 위한 방법(process for producing a smart card module for contactless smart cards) | |
ATE167319T1 (de) | Basis folie für chip karte | |
ES2125649T3 (es) | Elemento de soporte para circuito integrado. | |
SE8104663L (sv) | Berelement for en ic-modul | |
KR930022510A (ko) | 테스트 접촉부만을 가지는 반도체 장치 제조 방법 | |
EP2244245A3 (en) | Light emitting device and display apparatus of light emitting devices | |
CA2112343A1 (en) | Semiconductor Laser Device | |
MY125460A (en) | Semiconductor device | |
ES2105131T3 (es) | Dispositivo abrasivo. | |
MX9709940A (es) | Chip para tarjeta electronica revestida con una capa de material aislante, y una tarjeta electronica que comprende este chip. | |
DE69019298D1 (de) | IC-Karte mit integriertem Schaltkreismodul. | |
EP0393584A3 (en) | High frequency semiconductor device | |
TW350101B (en) | A semiconductor device grinding method | |
ES2164738T3 (es) | Procedimiento para efectuar el encapsulado de un modulo de chip de microcircuito integrado para una tarjeta y dispositivo para la realizacion del procedimiento. | |
WO2001082376A8 (fr) | Dispositif a semi-conducteur | |
DE60230919D1 (de) | Chip karte mit einem grossflächigen modul | |
EP0715353A3 (en) | Plate for a semiconductor chip | |
ATE126616T1 (de) | Trägerelement für integrierte halbleiter- schaltkreise, insbesondere zum einbau in chip- karten. | |
ATE550734T1 (de) | Chipkarte | |
PT724228E (pt) | Metodo para montagem de um modulo electronico no corpo de um cartao | |
EP0720241A3 (en) | Structure of and method for manufacturing an LED | |
TW370698B (en) | Package with carrier | |
TW452196U (en) | Improved structure of heat sink having integrated circuit device of plastic ball grid array type | |
RU99100202A (ru) | Способ изготовления несущего элемента для полупроводниковых чипов |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
FG2A | Definitive protection |
Ref document number: 717370 Country of ref document: ES |