ES2142371T3 - Metodo para la produccion de tarjetas de identidad dotadas de modulos electronicos. - Google Patents
Metodo para la produccion de tarjetas de identidad dotadas de modulos electronicos.Info
- Publication number
- ES2142371T3 ES2142371T3 ES94116834T ES94116834T ES2142371T3 ES 2142371 T3 ES2142371 T3 ES 2142371T3 ES 94116834 T ES94116834 T ES 94116834T ES 94116834 T ES94116834 T ES 94116834T ES 2142371 T3 ES2142371 T3 ES 2142371T3
- Authority
- ES
- Spain
- Prior art keywords
- electronic modules
- production
- manufacturing
- chip cards
- identity cards
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
- G06K19/07747—Mounting details of integrated circuit chips at least one of the integrated circuit chips being mounted as a module
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45014—Ribbon connectors, e.g. rectangular cross-section
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Theoretical Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Credit Cards Or The Like (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
LA INVENCION SE REFIERE A UN PROCEDIMIENTO PARA LA ELABORACION DE TARJETAS DE CHIP CON MODULOS ELECTRONICOS. A PARTIR DEL ESTADO TECNOLOGICO SON CONOCIDAS LAS TARJETAS DE CHIP DE ACUERDO CON PROCEDIMIENTOS DE ELABORACION DIFERENTES, EN DONDE SE MUESTRA MEDIANTE UNA CONSTRUCCION ESPECIAL UN MODULO ELECTRONICO UTILIZADO DE FORMA RESPECTIVA. EN CONTRAPOSICION SE PROPONE UN PROCEDIMIENTO PARA LA ELABORACION DE TARJETAS DE CHIP CON MODULOS ELECTRONICOS, EN DONDE SE UTILIZA UN MODULO ELECTRONICO ESTANDARDIZADO, QUE SE ADAPTA EN UN ULTIMO TRAMO DE PROCEDIMIENTO A LA TECNICA DE ELABORACION DE LA TARJETA Y DE FORMA CORRESPONDIENTE A LA TECNICA ELEGIDA SE UNE CON EL CUERPO DE LA TARJETA.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE4336501A DE4336501A1 (de) | 1993-10-26 | 1993-10-26 | Verfahren zur Herstellung von Ausweiskarten mit elektronischen Modulen |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2142371T3 true ES2142371T3 (es) | 2000-04-16 |
Family
ID=6501052
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES94116834T Expired - Lifetime ES2142371T3 (es) | 1993-10-26 | 1994-10-25 | Metodo para la produccion de tarjetas de identidad dotadas de modulos electronicos. |
Country Status (7)
Country | Link |
---|---|
US (1) | US5615476A (es) |
EP (1) | EP0655705B1 (es) |
JP (1) | JP3947236B2 (es) |
AT (1) | ATE189932T1 (es) |
DE (2) | DE4336501A1 (es) |
ES (1) | ES2142371T3 (es) |
SG (1) | SG46270A1 (es) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09327990A (ja) * | 1996-06-11 | 1997-12-22 | Toshiba Corp | カード型記憶装置 |
DE19639025C2 (de) * | 1996-09-23 | 1999-10-28 | Siemens Ag | Chipmodul und Verfahren zur Herstellung eines Chipmoduls |
DE19732915C1 (de) * | 1997-07-30 | 1998-12-10 | Siemens Ag | Verfahren zur Herstellung eines Chipmoduls |
FR2779851B1 (fr) * | 1998-06-12 | 2002-11-29 | Gemplus Card Int | Procede de fabrication d'une carte a circuit integre et carte obtenue |
US6239976B1 (en) | 1998-11-24 | 2001-05-29 | Comsense Technologies, Ltd. | Reinforced micromodule |
DE19922473A1 (de) * | 1999-05-19 | 2000-11-30 | Giesecke & Devrient Gmbh | Chipträgermodul |
JP4749656B2 (ja) * | 2001-02-09 | 2011-08-17 | 台湾積體電路製造股▲ふん▼有限公司 | 半導体デバイスの製造方法及びこの方法により得られる半導体デバイス |
JP3739752B2 (ja) * | 2003-02-07 | 2006-01-25 | 株式会社 ハリーズ | ランダム周期変速可能な小片移載装置 |
US20050196604A1 (en) * | 2004-03-05 | 2005-09-08 | Unifoil Corporation | Metallization process and product produced thereby |
WO2006059732A1 (ja) * | 2004-12-03 | 2006-06-08 | Hallys Corporation | インターポーザ接合装置 |
CN101073297A (zh) * | 2004-12-03 | 2007-11-14 | 哈里斯股份有限公司 | 电子部件的制造方法及电子部件的制造装置 |
EP1876877B1 (en) | 2005-04-06 | 2010-08-25 | Hallys Corporation | Electronic component manufacturing apparatus |
JP5036541B2 (ja) * | 2005-04-18 | 2012-09-26 | 株式会社 ハリーズ | 電子部品及び、この電子部品の製造方法 |
EP2369904A1 (fr) * | 2010-03-16 | 2011-09-28 | Gemalto SA | Module électronique à contacts latéraux, dispositif le comportant et procédé de fabrication d'un tel module |
EP3836010B1 (en) | 2019-12-12 | 2024-07-24 | Fingerprint Cards Anacatum IP AB | A biometric sensor module for card integration |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3931922A (en) * | 1972-01-29 | 1976-01-13 | Ferranti, Limited | Apparatus for mounting semiconductor devices |
US4100675A (en) * | 1976-11-01 | 1978-07-18 | Mansol Ceramics Company | Novel method and apparatus for hermetic encapsulation for integrated circuits and the like |
DE3019207A1 (de) * | 1980-05-20 | 1981-11-26 | GAO Gesellschaft für Automation und Organisation mbH, 8000 München | Traegerelement fuer einen ic-chip |
DE3051195C2 (de) * | 1980-08-05 | 1997-08-28 | Gao Ges Automation Org | Trägerelement zum Einbau in Ausweiskarten |
DE3123198C2 (de) * | 1980-12-08 | 1993-10-07 | Gao Ges Automation Org | Trägerelemente für einen IC-Baustein |
DE3248385A1 (de) * | 1982-12-28 | 1984-06-28 | GAO Gesellschaft für Automation und Organisation mbH, 8000 München | Ausweiskarte mit integriertem schaltkreis |
US5057461A (en) * | 1987-03-19 | 1991-10-15 | Texas Instruments Incorporated | Method of mounting integrated circuit interconnect leads releasably on film |
JPH0821672B2 (ja) * | 1987-07-04 | 1996-03-04 | 株式会社堀場製作所 | イオン濃度測定用シート型電極の製造方法 |
FR2636453B1 (fr) * | 1988-09-14 | 1992-01-17 | Sgs Thomson Microelectronics | Procede d'encapsulation de circuits-integres notamment pour cartes a puces |
FR2659157B2 (fr) * | 1989-05-26 | 1994-09-30 | Lemaire Gerard | Procede de fabrication d'une carte dite carte a puce, et carte obtenue par ce procede. |
DE3924439A1 (de) * | 1989-07-24 | 1991-04-18 | Edgar Schneider | Traegerelement mit wenigstens einem integrierten schaltkreis, insbesondere zum einbau in chip-karten, sowie verfahren zur herstellung dieser traegerelemente |
JPH03125445A (ja) * | 1989-10-09 | 1991-05-28 | Shinko Electric Ind Co Ltd | バンプ付きtab用テープの製造方法 |
JPH02237044A (ja) * | 1990-02-23 | 1990-09-19 | Matsushita Electric Ind Co Ltd | 実装体の製造方法 |
FR2673017A1 (fr) * | 1991-02-18 | 1992-08-21 | Schlumberger Ind Sa | Procede de fabrication d'un module electronique pour carte a memoire et module electronique ainsi obtenu. |
-
1993
- 1993-10-26 DE DE4336501A patent/DE4336501A1/de not_active Ceased
-
1994
- 1994-10-25 AT AT94116834T patent/ATE189932T1/de not_active IP Right Cessation
- 1994-10-25 ES ES94116834T patent/ES2142371T3/es not_active Expired - Lifetime
- 1994-10-25 DE DE59409155T patent/DE59409155D1/de not_active Expired - Lifetime
- 1994-10-25 SG SG1996001829A patent/SG46270A1/en unknown
- 1994-10-25 EP EP94116834A patent/EP0655705B1/de not_active Expired - Lifetime
- 1994-10-25 US US08/328,652 patent/US5615476A/en not_active Expired - Lifetime
- 1994-10-26 JP JP26267194A patent/JP3947236B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US5615476A (en) | 1997-04-01 |
JP3947236B2 (ja) | 2007-07-18 |
ATE189932T1 (de) | 2000-03-15 |
JPH07214959A (ja) | 1995-08-15 |
DE59409155D1 (de) | 2000-03-30 |
EP0655705A3 (de) | 1997-04-09 |
EP0655705B1 (de) | 2000-02-23 |
EP0655705A2 (de) | 1995-05-31 |
SG46270A1 (en) | 1998-02-20 |
DE4336501A1 (de) | 1995-04-27 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FG2A | Definitive protection |
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