ES2113498T3 - Circuito de microprocesador con dos señales de temporizacion. - Google Patents
Circuito de microprocesador con dos señales de temporizacion.Info
- Publication number
- ES2113498T3 ES2113498T3 ES93309301T ES93309301T ES2113498T3 ES 2113498 T3 ES2113498 T3 ES 2113498T3 ES 93309301 T ES93309301 T ES 93309301T ES 93309301 T ES93309301 T ES 93309301T ES 2113498 T3 ES2113498 T3 ES 2113498T3
- Authority
- ES
- Spain
- Prior art keywords
- microprocessor
- frequency
- chosen
- microprocessor circuit
- timing signals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/08—Clock generators with changeable or programmable clock frequency
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microcomputers (AREA)
- Executing Machine-Instructions (AREA)
Abstract
SE PREVE UN CIRCUITO DE MICROPROCESADOR QUE PERMITE QUE LA VELOCIDAD DEL RELOJ DE MICROPROCESADOR INTERNO VARIE DEPENDIENDO DE UN REGISTRO QUE PUEDE SER PROGRAMADO POR PROGRAMA INFORMATICO. ADEMAS, EL CAMPO DE TRANSMISION DEL GENERADOR DE RELOJ INTERNO PUEDE SER VARIADO DE MANERA SIMILAR POR PROGRAMACION INFORMATICA. EL PROGRAMADOR O USUARIO DEL MICROPROCESADOR PUEDE CAMBIAR LA VELOCIDAD DE RELOJ INTERNO DE MANERA QUE EL MICROPROCESADOR OPERA EN UNA PRIMERA FRECUENCIA O EN UNA SEGUNDA FRECUENCIA DEPENDIENDO DE LOS REQUISITOS DE PRESTACION. UNA FRECUENCIA MAS BAJA DE OPERACION PUEDE SER ELEGIDA PARA UN CONSUMO DE ENERGIA BAJO Y EMI BAJO, MIENTRAS QUE UNA FRECUENCIA MAS ALTA DE OPERACION PUEDE SER ELEGIDA PARA APLICACIONES DE GRANDES PRESTACIONES E INTENSIVAS DE CALCULO.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US99747792A | 1992-12-28 | 1992-12-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2113498T3 true ES2113498T3 (es) | 1998-05-01 |
Family
ID=25544079
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES93309301T Expired - Lifetime ES2113498T3 (es) | 1992-12-28 | 1993-11-22 | Circuito de microprocesador con dos señales de temporizacion. |
Country Status (5)
Country | Link |
---|---|
US (1) | US5561792A (es) |
EP (1) | EP0613074B1 (es) |
JP (1) | JP3560997B2 (es) |
DE (1) | DE69317758T2 (es) |
ES (1) | ES2113498T3 (es) |
Families Citing this family (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2289147B (en) * | 1994-04-25 | 1998-04-15 | Advanced Risc Mach Ltd | Testing data processing apparatus |
US5752011A (en) | 1994-06-20 | 1998-05-12 | Thomas; C. Douglas | Method and system for controlling a processor's clock frequency in accordance with the processor's temperature |
US7167993B1 (en) | 1994-06-20 | 2007-01-23 | Thomas C Douglass | Thermal and power management for computer systems |
JP3468592B2 (ja) * | 1994-08-10 | 2003-11-17 | 富士通株式会社 | クロック信号発生回路 |
US5678065A (en) * | 1994-09-19 | 1997-10-14 | Advanced Micro Devices, Inc. | Computer system employing an enable line for selectively adjusting a peripheral bus clock frequency |
EP0809825A1 (en) * | 1995-02-14 | 1997-12-03 | Vlsi Technology, Inc. | Method and apparatus for reducing power consumption in digital electronic circuits |
US5805871A (en) * | 1995-07-21 | 1998-09-08 | Ricoh Company Ltd. | System and method for phase-synchronous, flexible-frequency clocking and messaging |
CN1192298C (zh) * | 1996-01-17 | 2005-03-09 | 德克萨斯仪器股份有限公司 | 按cpu活动调节cpu时钟频率而实时管理cpu温度和节电的方法和*** |
US5742832A (en) * | 1996-02-09 | 1998-04-21 | Advanced Micro Devices | Computer system with programmable driver output's strengths responsive to control signal matching preassigned address range |
US5815725A (en) * | 1996-04-03 | 1998-09-29 | Sun Microsystems, Inc. | Apparatus and method for reducing power consumption in microprocessors through selective gating of clock signals |
US5774704A (en) * | 1996-07-29 | 1998-06-30 | Silicon Graphics, Inc. | Apparatus and method for dynamic central processing unit clock adjustment |
US5768571A (en) * | 1996-08-29 | 1998-06-16 | Vlsi Technology, Inc. | System and method for altering the clock frequency to a logic controller controlling a logic device running at a fixed frequency slower than a computer system running the logic device |
US6014510A (en) * | 1996-11-27 | 2000-01-11 | International Business Machines Corporation | Method for performing timing analysis of a clock circuit |
US6185723B1 (en) * | 1996-11-27 | 2001-02-06 | International Business Machines Corporation | Method for performing timing analysis of a clock-shaping circuit |
US5774706A (en) * | 1996-12-13 | 1998-06-30 | International Business Machines Corporation | High speed PCI bus utilizing TTL compatible signaling |
US5732027A (en) * | 1996-12-30 | 1998-03-24 | Cypress Semiconductor Corporation | Memory having selectable output strength |
US5881297A (en) * | 1996-12-31 | 1999-03-09 | Intel Corporation | Apparatus and method for controlling clocking frequency in an integrated circuit |
US6161175A (en) * | 1997-04-16 | 2000-12-12 | Samsung Electronics Co., Ltd. | Computer system using software to establish set-up values of a central processing unit and a control method thereof |
US5918073A (en) * | 1997-06-27 | 1999-06-29 | Advanced Micro Devices, Inc. | System and method for equalizing data buffer storage and fetch rates of peripheral devices |
US5828870A (en) * | 1997-06-30 | 1998-10-27 | Adaptec, Inc. | Method and apparatus for controlling clock skew in an integrated circuit |
US6005429A (en) * | 1998-07-17 | 1999-12-21 | National Semiconductor Corporation | Icc current electromagnetic interference choke with multiple choking levels |
US6952783B2 (en) * | 2001-11-14 | 2005-10-04 | Intel Corporation | Multiple return terminal power supply methods and apparatus |
US7296170B1 (en) | 2004-01-23 | 2007-11-13 | Zilog, Inc. | Clock controller with clock source fail-safe logic |
JP2007525114A (ja) | 2004-01-29 | 2007-08-30 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | プログラマブルで一時停止可能なクロック発生ユニット |
US7434171B2 (en) * | 2004-03-25 | 2008-10-07 | Intel Corporation | Performance control apparatus |
US7888962B1 (en) | 2004-07-07 | 2011-02-15 | Cypress Semiconductor Corporation | Impedance matching circuit |
DE102005044115A1 (de) * | 2005-08-01 | 2007-02-15 | IHP GmbH - Innovations for High Performance Microelectronics/Institut für innovative Mikroelektronik | GALS-Schaltung und Verfahren zum Betrieb einer GALS-Schaltung |
US8036846B1 (en) | 2005-10-20 | 2011-10-11 | Cypress Semiconductor Corporation | Variable impedance sense architecture and method |
US7876133B1 (en) | 2006-09-27 | 2011-01-25 | Cypress Semiconductor Corporation | Output buffer circuit |
US7629828B1 (en) * | 2007-04-27 | 2009-12-08 | Zilog, Inc. | Glitch-free clock multiplexer that provides an output clock signal based on edge detection |
US8909961B2 (en) | 2011-11-29 | 2014-12-09 | Ati Technologies Ulc | Method and apparatus for adjusting power consumption level of an integrated circuit |
US9547329B2 (en) * | 2012-06-01 | 2017-01-17 | Igt | Digital spread spectrum technique for electromagnetic emission reduction |
US11848070B2 (en) * | 2021-11-10 | 2023-12-19 | Micron Technology, Inc. | Memory with DQS pulse control circuitry, and associated systems, devices, and methods |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4291242A (en) * | 1979-05-21 | 1981-09-22 | Motorola, Inc. | Driver circuit for use in an output buffer |
JPS63110811A (ja) * | 1986-10-28 | 1988-05-16 | Mitsubishi Electric Corp | クロツクジエネレ−タ |
EP0270296A3 (en) * | 1986-12-01 | 1990-02-07 | Fujitsu Limited | Semiconductor logic circuit |
JPH0815210B2 (ja) * | 1987-06-04 | 1996-02-14 | 日本電気株式会社 | マスタスライス方式集積回路 |
JPS6467940A (en) * | 1987-09-08 | 1989-03-14 | Mitsubishi Electric Corp | Semiconductor integrated circuit |
JP2614877B2 (ja) * | 1987-11-20 | 1997-05-28 | 株式会社日立製作所 | 半導体集積回路装置 |
JPH07114348B2 (ja) * | 1987-12-11 | 1995-12-06 | 日本電気株式会社 | 論理回路 |
US4816700A (en) * | 1987-12-16 | 1989-03-28 | Intel Corporation | Two-phase non-overlapping clock generator |
JPH01251738A (ja) * | 1988-03-31 | 1989-10-06 | Toshiba Corp | スタンダードセル |
JPH07120225B2 (ja) * | 1988-04-15 | 1995-12-20 | 富士通株式会社 | 半導体回路装置 |
JPH0229124A (ja) * | 1988-07-19 | 1990-01-31 | Toshiba Corp | スタンダードセル |
JPH0736422B2 (ja) * | 1988-08-19 | 1995-04-19 | 株式会社東芝 | クロック供給回路 |
US4965471A (en) * | 1989-06-26 | 1990-10-23 | Eastman Kodak Company | BI-CMOS clock driver with reduced crossover current |
US5001731A (en) * | 1989-10-02 | 1991-03-19 | Motorola, Inc. | Method and apparatus for eliminating clockskew race condition errors |
US5058132A (en) * | 1989-10-26 | 1991-10-15 | National Semiconductor Corporation | Clock distribution system and technique |
US5079440A (en) * | 1990-03-15 | 1992-01-07 | Intel Corporation | Apparatus for generating computer clock pulses |
US5077676A (en) * | 1990-03-30 | 1991-12-31 | International Business Machines Corporation | Reducing clock skew in large-scale integrated circuits |
US5073730A (en) * | 1990-04-23 | 1991-12-17 | International Business Machines Corporation | Current transient reduction for vlsi chips |
JPH04113718A (ja) * | 1990-09-04 | 1992-04-15 | Fujitsu Ltd | ヒットレス・クロック切替装置 |
DE4029598A1 (de) * | 1990-09-19 | 1992-03-26 | Philips Patentverwaltung | Schaltungsanordnung zur zeitweisen verzoegerung des programmablaufs in einem mikroprozessor |
DE69112220T2 (de) * | 1990-11-09 | 1996-03-21 | Wang Laboratories | Steuerungseinrichtung für Systemtaktgeschwindigkeit. |
US5260979A (en) * | 1991-05-28 | 1993-11-09 | Codex Corp. | Circuit and method of switching between redundant clocks for a phase lock loop |
US5153450A (en) * | 1991-07-16 | 1992-10-06 | Samsung Semiconductor, Inc. | Programmable output drive circuit |
-
1993
- 1993-11-22 ES ES93309301T patent/ES2113498T3/es not_active Expired - Lifetime
- 1993-11-22 EP EP93309301A patent/EP0613074B1/en not_active Expired - Lifetime
- 1993-11-22 DE DE69317758T patent/DE69317758T2/de not_active Expired - Lifetime
- 1993-12-27 JP JP33038393A patent/JP3560997B2/ja not_active Expired - Lifetime
-
1995
- 1995-11-14 US US08/557,244 patent/US5561792A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0613074B1 (en) | 1998-04-01 |
US5561792A (en) | 1996-10-01 |
JP3560997B2 (ja) | 2004-09-02 |
DE69317758D1 (de) | 1998-05-07 |
JPH06230848A (ja) | 1994-08-19 |
DE69317758T2 (de) | 1998-10-29 |
EP0613074A1 (en) | 1994-08-31 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FG2A | Definitive protection |
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