ES2058354T3 - Metodo para depositar wolframio sobre silicio en un procedimiento cvd que no es autolimitante y dispositivo semiconductor fabricado por el. - Google Patents

Metodo para depositar wolframio sobre silicio en un procedimiento cvd que no es autolimitante y dispositivo semiconductor fabricado por el.

Info

Publication number
ES2058354T3
ES2058354T3 ES89101923T ES89101923T ES2058354T3 ES 2058354 T3 ES2058354 T3 ES 2058354T3 ES 89101923 T ES89101923 T ES 89101923T ES 89101923 T ES89101923 T ES 89101923T ES 2058354 T3 ES2058354 T3 ES 2058354T3
Authority
ES
Spain
Prior art keywords
silicon
tungsten
thickness
depositing
wolframio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES89101923T
Other languages
English (en)
Inventor
Rajiv V Joshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of ES2058354T3 publication Critical patent/ES2058354T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/04—Coating on selected surface areas, e.g. using masks
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
    • C23C16/08—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metal halides
    • C23C16/14—Deposition of only one other metal element
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Mechanical Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

UN METODO PARA DEPOSITAR TUNGSTENO SOBRE UN SUBSTRATO UTILIZANDO REDUCCION DE SILICIO, EN DONDE EL PROCESO NO ES LIMITATIVO CON RELACION AL ESPESOR DEL SILICIO QUE PUEDE SER CAMBIADO POR EL TUNGSTENO. SE PROVEE UN SUBSTRATO DE SILICIO CON AL MENOS UN AREA DE SILICIO TENIENDO ESPESOR PREDETERMINADO Y SE EXPONE EL SUBSTRATO A UN FLUJO DE GAS DE HEXAFLUORURO DE TUNGSTENO EN UN ENTORNO QUIMICO DE DEPOSICION DE VAPOR. AJUSTANDO EL NIVEL DE FLUJO DE GAS WF6 Y LOS PARAMETROS DEL PROCESO CVD, TALES COMO PRESION, TEMPERATURA Y TIEMPO DE DEPOSICION, EL ESPESOR DEL SILICIO CAMBIADO POR EL TUNGSTENO SE PUEDE AJUSTAR DE ACUERDO PARA CAMBIAR TODO EL ESPESOR. UNA NUEVA ESTRUCTURA TENIENDO UN PUENTE DE TUNGSTENO SEMIENDIDO Y TAMBIEN SE DESCUBREN FUENTE DE TUNGSTENO Y CAPAS DE DRENAJE METALIZADAS.
ES89101923T 1988-02-18 1989-02-03 Metodo para depositar wolframio sobre silicio en un procedimiento cvd que no es autolimitante y dispositivo semiconductor fabricado por el. Expired - Lifetime ES2058354T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US15702688A 1988-02-18 1988-02-18

Publications (1)

Publication Number Publication Date
ES2058354T3 true ES2058354T3 (es) 1994-11-01

Family

ID=22562078

Family Applications (1)

Application Number Title Priority Date Filing Date
ES89101923T Expired - Lifetime ES2058354T3 (es) 1988-02-18 1989-02-03 Metodo para depositar wolframio sobre silicio en un procedimiento cvd que no es autolimitante y dispositivo semiconductor fabricado por el.

Country Status (6)

Country Link
EP (1) EP0328970B1 (es)
JP (3) JP2742590B2 (es)
BR (1) BR8900699A (es)
CA (1) CA1308496C (es)
DE (1) DE68917494T2 (es)
ES (1) ES2058354T3 (es)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6335280B1 (en) 1997-01-13 2002-01-01 Asm America, Inc. Tungsten silicide deposition process
KR100331861B1 (en) * 2000-07-21 2002-04-09 Hynix Semiconductor Inc Method for fabricating gate electrode of semiconductor device
US6891227B2 (en) * 2002-03-20 2005-05-10 International Business Machines Corporation Self-aligned nanotube field effect transistor and method of fabricating same
JP3696587B2 (ja) 2002-10-11 2005-09-21 沖電気工業株式会社 半導体素子の製造方法
AU2004271822B8 (en) * 2003-09-12 2009-01-15 Ya-Man Ltd. Treatment device
US10622214B2 (en) * 2017-05-25 2020-04-14 Applied Materials, Inc. Tungsten defluorination by high pressure treatment
JP6947914B2 (ja) 2017-08-18 2021-10-13 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ 高圧高温下のアニールチャンバ
US10276411B2 (en) 2017-08-18 2019-04-30 Applied Materials, Inc. High pressure and high temperature anneal chamber
CN111095524B (zh) 2017-09-12 2023-10-03 应用材料公司 用于使用保护阻挡物层制造半导体结构的设备和方法
KR102396319B1 (ko) 2017-11-11 2022-05-09 마이크로머티어리얼즈 엘엘씨 고압 프로세싱 챔버를 위한 가스 전달 시스템
KR20200075892A (ko) 2017-11-17 2020-06-26 어플라이드 머티어리얼스, 인코포레이티드 고압 처리 시스템을 위한 컨덴서 시스템
JP7239598B2 (ja) 2018-03-09 2023-03-14 アプライド マテリアルズ インコーポレイテッド 金属含有材料の高圧アニーリングプロセス
US10950429B2 (en) 2018-05-08 2021-03-16 Applied Materials, Inc. Methods of forming amorphous carbon hard mask layers and hard mask layers formed therefrom
US10748783B2 (en) 2018-07-25 2020-08-18 Applied Materials, Inc. Gas delivery module
US10675581B2 (en) 2018-08-06 2020-06-09 Applied Materials, Inc. Gas abatement apparatus
CN112996950B (zh) 2018-11-16 2024-04-05 应用材料公司 使用增强扩散工艺的膜沉积
WO2020117462A1 (en) 2018-12-07 2020-06-11 Applied Materials, Inc. Semiconductor processing system
JP7159446B2 (ja) * 2019-03-20 2022-10-24 株式会社Kokusai Electric 基板処理方法、基板処理装置、プログラムおよび半導体装置の製造方法
US11901222B2 (en) 2020-02-17 2024-02-13 Applied Materials, Inc. Multi-step process for flowable gap-fill film

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5050881A (es) * 1973-09-04 1975-05-07
JPS5966170A (ja) * 1982-10-08 1984-04-14 Toshiba Corp 半導体装置の製造方法
JPS6050920A (ja) * 1983-08-30 1985-03-22 Toshiba Corp 半導体装置の製造方法
JPS6072272A (ja) * 1983-09-28 1985-04-24 Toshiba Corp 半導体装置の製造方法
JPS6110233A (ja) * 1984-06-02 1986-01-17 Fujitsu Ltd 半導体装置の製造方法
JPS6122651A (ja) * 1984-06-29 1986-01-31 Fujitsu Ltd 半導体装置の製造方法
JPS61284963A (ja) * 1985-06-10 1986-12-15 Nippon Telegr & Teleph Corp <Ntt> 半導体装置とその製造方法
DE3639079A1 (de) * 1985-11-20 1987-05-21 Gen Electric Verfahren zum abscheiden von metallmustern zur verwendung in integrierten schaltungen

Also Published As

Publication number Publication date
BR8900699A (pt) 1989-10-17
JP3014988B2 (ja) 2000-02-28
EP0328970A3 (en) 1991-02-27
CA1308496C (en) 1992-10-06
DE68917494D1 (de) 1994-09-22
EP0328970A2 (en) 1989-08-23
JP2742590B2 (ja) 1998-04-22
JPH10150006A (ja) 1998-06-02
EP0328970B1 (en) 1994-08-17
JPH01218018A (ja) 1989-08-31
DE68917494T2 (de) 1995-03-30
JPH11340463A (ja) 1999-12-10
JP3149406B2 (ja) 2001-03-26

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