ES2045558T3 - Metodo y aparato para restaurar datos. - Google Patents
Metodo y aparato para restaurar datos.Info
- Publication number
- ES2045558T3 ES2045558T3 ES89850381T ES89850381T ES2045558T3 ES 2045558 T3 ES2045558 T3 ES 2045558T3 ES 89850381 T ES89850381 T ES 89850381T ES 89850381 T ES89850381 T ES 89850381T ES 2045558 T3 ES2045558 T3 ES 2045558T3
- Authority
- ES
- Spain
- Prior art keywords
- signal
- delay means
- time
- sensing
- time steps
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
- H04L7/0033—Correction by delay
- H04L7/0041—Delay of data signal
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Manipulation Of Pulses (AREA)
- Communication Control (AREA)
- Pulse Circuits (AREA)
Abstract
EL INVENTO SE ENCUENTRA RELACIONADO CON UN METODO Y UN APARATO PARA RECUPERAR AL MENOS UNA SEÑAL DE DATOS (DATAIN) CON LA AYUDA DE UNA SEÑAL DE RELOJ (CL). EN EL METODO SE DISPONEN AL MENOS DOS MEDIOS DE RETARDO DE SEÑAL (1, 3) CON UN RETARDO DE TIEMPO AJUSTABLE EN PASOS DE TIEMPO, DE FORMA TAL QUE SE PROPORCIONA A SUS PASOS DE TIEMPO LA MISMA SENSIBILIDAD AL MENOS PARA UN FACTOR AMBIENTE, POR EJEMPLO LA TEMPERATURA. LA PRIMERA SEÑAL SE RETARDA CON LA AYUDA DE UN PRIMER MEDIO DE RETARDO DE SEÑAL. SE CREA UNA PRIMERA SEÑAL DE DATOS RECUPERADOS (DATAOUT) MEDIANTE LA PERCEPCION DE LA PRIMERA SEÑAL RETARDADA EN LOS PRIMEROS MOMENTOS DADOS Y DETERMINADOS POR LA SEÑAL DE RELOJ. SE COMPARAN LOS RESULTADOS DE LA PERCEPCION EN DIFERENTES MOMENTOS DE PERCEPCION, Y EL RETARDO DE LA PRIMERA SEÑAL POR EL PRIMER MEDIO DE RETARDO DE SEÑAL SE VARIA POR PASOS MEDIANTE LA VARIACION DEL NUMERO DE PASOS DE TIEMPO EN RESPUESTA A LA COMPARACION REALIZADA. EL SEGUNDO MEDIO DE RETARDO DE SEÑAL SE UTILIZA PARA RELACIONAR VARIOS PASOS DE TIEMPO CON EL TIEMPO DEL PERIODO DE LA SEÑAL DE RELOJ. LA MAGNITUD DE LOS PASOS DE TIEMPO TANTO EN EL PRIMERO COMO EN EL SEGUNDO MEDIO DE RETARDO DE SEÑAL SE CONTROLA DE FORMA SINCRONICA EN RESPUESTA AL PROCESO RELATIVO, PARA EL QUE LA MAGNITUD DE UN PASO DE TIEMPO SE ENCUENTRA EN UNA RELACION DADA PARA EL TIEMPO DE PERIODO DE LA SEÑAL DE RELOJ. UN APARATO EN CONCORDANCIA CON EL INVENTO COMPRENDE, APARTE DE LOS MEDIOS DE RETARDO DE SEÑAL, UN PRIMERO Y UN SEGUNDO MEDIO DE PERCEPCION, COMPARACION Y CONTROL, CONECTADOS A LOS MEDIOS DE RETARDO DE SEÑAL.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE8804196A SE469203B (sv) | 1988-11-18 | 1988-11-18 | Foerfarande och anordning foer att restaurera en datasignal |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2045558T3 true ES2045558T3 (es) | 1994-01-16 |
Family
ID=20374006
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES89850381T Expired - Lifetime ES2045558T3 (es) | 1988-11-18 | 1989-11-02 | Metodo y aparato para restaurar datos. |
Country Status (8)
Country | Link |
---|---|
US (1) | US5054038A (es) |
EP (1) | EP0369966B1 (es) |
JP (1) | JP2948841B2 (es) |
AT (1) | ATE95017T1 (es) |
AU (1) | AU628104B2 (es) |
DE (1) | DE68909374T2 (es) |
ES (1) | ES2045558T3 (es) |
SE (1) | SE469203B (es) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5164677A (en) * | 1990-01-16 | 1992-11-17 | Digital Equipment Corporation | Method and apparatus for synchronizing signals |
US5192886A (en) * | 1990-03-15 | 1993-03-09 | Hewlett-Packard Company | Sub-nanosecond calibrated delay line structure |
JP2597739B2 (ja) * | 1990-08-24 | 1997-04-09 | 株式会社東芝 | 信号遅延回路、クロック信号発生回路及び集積回路システム |
DE69130043T2 (de) * | 1990-09-18 | 1999-04-15 | Fujitsu Ltd., Kawasaki, Kanagawa | Elektronische Anordnung mit einem Bezugsverzögerungsgenerator |
US5534808A (en) * | 1992-01-31 | 1996-07-09 | Konica Corporation | Signal delay method, signal delay device and circuit for use in the apparatus |
US5408200A (en) * | 1992-12-18 | 1995-04-18 | Storage Technology Corporation | Intelligent phase detector |
DE69403974T2 (de) * | 1993-02-25 | 1997-10-16 | At & T Corp | In einem grossen Bereich arbeitende veränderbare Verzögerungsleitung und Ringoszillator |
US5479129A (en) * | 1993-11-24 | 1995-12-26 | At&T Corp. | Variable propagation delay digital signal inverter |
US5515403A (en) * | 1994-06-21 | 1996-05-07 | Dsc Communications Corporation | Apparatus and method for clock alignment and switching |
DE69526419T2 (de) * | 1994-12-20 | 2002-11-21 | Nippon Electric Co | Zeitverzögerungsschaltung |
JP3050162B2 (ja) * | 1997-04-04 | 2000-06-12 | 日本電気株式会社 | 狭撃型同期式遅延回路 |
US6777995B1 (en) * | 1999-02-26 | 2004-08-17 | Micron Technology, Inc. | Interlaced delay-locked loops for controlling memory-circuit timing |
JP3478284B2 (ja) * | 2001-08-10 | 2003-12-15 | ソニー株式会社 | 半導体装置 |
US7082172B1 (en) * | 2002-02-05 | 2006-07-25 | Alliant Techsystems Inc. | Digital signal gating apparatus and method in a pulse receiver system |
KR101030768B1 (ko) * | 2004-08-26 | 2011-04-27 | 삼성전자주식회사 | 소비전력이 적고 고주파 동작이 가능한 광범위 지연동기루프 회로 및 이를 구비하는 광학 구동 시스템 |
US7724811B2 (en) * | 2006-09-26 | 2010-05-25 | Advantest Corporation | Delay circuit, jitter injection circuit, and test apparatus |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1355495A (en) * | 1970-08-18 | 1974-06-05 | Cossor Ltd A C | Apparatus for clocking digital data |
US3694752A (en) * | 1971-03-18 | 1972-09-26 | North American Rockwell | High speed transmission receiver utilizing fine receiver timing and carrier phase recovery |
US4190807A (en) * | 1978-07-03 | 1980-02-26 | Rockwell International Corporation | Sampled error phaselock or frequencylock systems |
JPS60229521A (ja) * | 1984-04-27 | 1985-11-14 | Sony Tektronix Corp | デジタル信号遅延回路 |
US4695805A (en) * | 1985-05-13 | 1987-09-22 | Online Computer Systems Inc. | Apparatus for generating signals synchronized to an unstable external signal |
US4922141A (en) * | 1986-10-07 | 1990-05-01 | Western Digital Corporation | Phase-locked loop delay line |
US4755704A (en) * | 1987-06-30 | 1988-07-05 | Unisys Corporation | Automatic clock de-skewing apparatus |
US4829258A (en) * | 1987-09-03 | 1989-05-09 | Intel Corporation | Stabilized phase locked loop |
-
1988
- 1988-11-18 SE SE8804196A patent/SE469203B/sv not_active IP Right Cessation
-
1989
- 1989-10-31 US US07/429,651 patent/US5054038A/en not_active Expired - Lifetime
- 1989-11-02 DE DE89850381T patent/DE68909374T2/de not_active Expired - Fee Related
- 1989-11-02 AT AT89850381T patent/ATE95017T1/de not_active IP Right Cessation
- 1989-11-02 ES ES89850381T patent/ES2045558T3/es not_active Expired - Lifetime
- 1989-11-02 EP EP89850381A patent/EP0369966B1/en not_active Expired - Lifetime
- 1989-11-17 JP JP1297793A patent/JP2948841B2/ja not_active Expired - Fee Related
- 1989-11-17 AU AU45310/89A patent/AU628104B2/en not_active Ceased
Also Published As
Publication number | Publication date |
---|---|
EP0369966A1 (en) | 1990-05-23 |
DE68909374T2 (de) | 1994-01-13 |
ATE95017T1 (de) | 1993-10-15 |
JPH02260730A (ja) | 1990-10-23 |
US5054038A (en) | 1991-10-01 |
AU628104B2 (en) | 1992-09-10 |
SE8804196D0 (sv) | 1988-11-18 |
JP2948841B2 (ja) | 1999-09-13 |
AU4531089A (en) | 1990-05-24 |
SE469203B (sv) | 1993-05-24 |
DE68909374D1 (de) | 1993-10-28 |
SE8804196L (sv) | 1990-05-19 |
EP0369966B1 (en) | 1993-09-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FG2A | Definitive protection |
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