ES2002169A6 - Procedimiento para la fabricacion de soportes de circuitos electricos - Google Patents

Procedimiento para la fabricacion de soportes de circuitos electricos

Info

Publication number
ES2002169A6
ES2002169A6 ES8601981A ES8601981A ES2002169A6 ES 2002169 A6 ES2002169 A6 ES 2002169A6 ES 8601981 A ES8601981 A ES 8601981A ES 8601981 A ES8601981 A ES 8601981A ES 2002169 A6 ES2002169 A6 ES 2002169A6
Authority
ES
Spain
Prior art keywords
holes
board
conductive material
circuit boards
electrical circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES8601981A
Other languages
English (en)
Inventor
Claude Jean Cha Wolfram
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Eat Etude Assis Tech
Original Assignee
Eat Etude Assis Tech
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Eat Etude Assis Tech filed Critical Eat Etude Assis Tech
Publication of ES2002169A6 publication Critical patent/ES2002169A6/es
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
    • H05K3/043—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by using a moving tool for milling or cutting the conductive material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09063—Holes or slots in insulating substrate not used for electrical connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0242—Cutting around hole, e.g. for disconnecting land or Plated Through-Hole [PTH] or for partly removing a PTH
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16—Inspection; Monitoring; Aligning
    • H05K2203/167—Using mechanical means for positioning, alignment or registration, e.g. using rod-in-hole alignment
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/17—Post-manufacturing processes
    • H05K2203/175—Configurations of connections suitable for easy deletion, e.g. modifiable circuits or temporary conductors for electroplating; Processes for deleting connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0008—Apparatus or processes for manufacturing printed circuits for aligning or positioning of tools relative to the circuit board
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Moulding By Coating Moulds (AREA)
  • Macromolecular Compounds Obtained By Forming Nitrogen-Containing Linkages In General (AREA)
  • Insulation, Fastening Of Motor, Generator Windings (AREA)

Abstract

PROCEDIMIENTO PARA LA FABRICACION DE SOPORTES DE CIRCUITOS ELECTRICOS, EN PARTICULAR, DE CIRCUITOS IMPRESOS. EL PROCEDIMIENTO COMPRENDE LAS ETAPAS CONOCIDAS DE OBTENER UNA PLACA SOPORTE (1), RECUBRIRLA CON UN REVESTIMIENTO CONDUCTOR (2-3) SOBRE SUS DOS CARAS, HORADAR A CONTINUACION ORIFICIOS (4), A CONTINUACION EFECTUAR UN DEPOSITO ELECTROLITICO DE UN MATERIAL CONDUCTOR EN LUGARES PREDETERMINADOS, PARA LO CUAL ES INDISPENSABLE EL DEPOSITO PREVIO DE UN REVESTIMIENTO CONDUCTOR (5). TRAS EL DEPOSITO INDISPENSABLE DEL REVESTIMIENTO CONDUCTOR (5) SOBRE LAS DOS CARAS Y EN LOS ORIFICIOS (4) DE POSICIONADO, SE PROVOCA UNA DISCONTINUIDAD ELECTRICA ALREDEDOR DE LOS ORIFICIOS (4) DESEADOS, POR EJEMPLO EXCAVANDO SURCOS (6 Y 7) DE FORMA QUE EL REVESTIMIENTO ELECTROLITICO ULTERIOR NO SE DEPOSITE EN LOS ORIFICIOS (4) Y QUE, ADEMAS, DURANTE EL ACABADO DE LA PLACA, EL REVESTIMIENTO CONDUCTOR (5) DESAPAREZCA, RECUPERANDO LOS ORIFICIOS (4) SU DIAMETRO DE ORIGEN QUE PUEDE SER MUY PRECISO.
ES8601981A 1985-09-18 1986-09-18 Procedimiento para la fabricacion de soportes de circuitos electricos Expired ES2002169A6 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8513803A FR2587575B1 (fr) 1985-09-18 1985-09-18 Procede pour la fabrication de supports de circuits electriques

Publications (1)

Publication Number Publication Date
ES2002169A6 true ES2002169A6 (es) 1988-07-16

Family

ID=9323002

Family Applications (1)

Application Number Title Priority Date Filing Date
ES8601981A Expired ES2002169A6 (es) 1985-09-18 1986-09-18 Procedimiento para la fabricacion de soportes de circuitos electricos

Country Status (5)

Country Link
US (1) US4712297A (es)
EP (1) EP0219394A1 (es)
JP (1) JPS62112395A (es)
ES (1) ES2002169A6 (es)
FR (1) FR2587575B1 (es)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0476985A (ja) * 1990-07-18 1992-03-11 Cmk Corp プリント配線板の製造法
DE19620095B4 (de) * 1996-05-18 2006-07-06 Tamm, Wilhelm, Dipl.-Ing. (FH) Verfahren zur Herstellung von Leiterplatten
JPH11218805A (ja) * 1998-01-30 1999-08-10 Fuji Photo Optical Co Ltd ファインダーユニット
US6926922B2 (en) * 2002-04-09 2005-08-09 Shipley Company, L.L.C. PWB manufacture

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3475284A (en) * 1966-04-18 1969-10-28 Friden Inc Manufacture of electric circuit modules
DE1812692A1 (de) * 1968-12-04 1970-11-05 Siemens Ag Verfahren zur Herstellung von mit Leiterbahnen versehenen Schaltungsplatten
CA1054259A (en) * 1977-10-14 1979-05-08 John A. Galko Printed circuit board carrying protective mask having improved adhesion
FR2471725A1 (fr) * 1979-12-12 1981-06-19 Philips Ind Commerciale Technique d'isolement des trous metallises dans des cartes de circuits imprimes
JPS5932915B2 (ja) * 1981-07-25 1984-08-11 「弐」夫 甲斐 スル−ホ−ルを有する配線基板製造方法
US4486273A (en) * 1983-08-04 1984-12-04 General Motors Corporation Selective plating of dielectric substrates

Also Published As

Publication number Publication date
EP0219394A1 (fr) 1987-04-22
FR2587575A1 (fr) 1987-03-20
JPS62112395A (ja) 1987-05-23
US4712297A (en) 1987-12-15
FR2587575B1 (fr) 1987-12-24

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