EP3639265A4 - Finer grain dynamic random access memory - Google Patents
Finer grain dynamic random access memory Download PDFInfo
- Publication number
- EP3639265A4 EP3639265A4 EP18818644.9A EP18818644A EP3639265A4 EP 3639265 A4 EP3639265 A4 EP 3639265A4 EP 18818644 A EP18818644 A EP 18818644A EP 3639265 A4 EP3639265 A4 EP 3639265A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- random access
- access memory
- dynamic random
- finer grain
- grain dynamic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Databases & Information Systems (AREA)
- Dram (AREA)
- Semiconductor Memories (AREA)
- Steroid Compounds (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201762518575P | 2017-06-12 | 2017-06-12 | |
| US15/976,580 US11527510B2 (en) | 2017-06-16 | 2018-05-10 | Finer grain dynamic random access memory |
| PCT/US2018/033317 WO2018231423A1 (en) | 2017-06-12 | 2018-05-18 | Finer grain dynamic random access memory |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP3639265A1 EP3639265A1 (en) | 2020-04-22 |
| EP3639265A4 true EP3639265A4 (en) | 2021-01-06 |
Family
ID=64659860
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP18818644.9A Pending EP3639265A4 (en) | 2017-06-12 | 2018-05-18 | Finer grain dynamic random access memory |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP3639265A4 (en) |
| KR (2) | KR102438390B1 (en) |
| CN (1) | CN110870011B (en) |
| WO (1) | WO2018231423A1 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117389459A (en) * | 2022-06-29 | 2024-01-12 | 华为技术有限公司 | Memory, chip stacking structure, chip packaging structure and electronic equipment |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090103345A1 (en) * | 2007-10-23 | 2009-04-23 | Mclaren Moray | Three-dimensional memory module architectures |
| US20100121994A1 (en) * | 2008-11-10 | 2010-05-13 | International Business Machines Corporation | Stacked memory array |
| US20150270250A1 (en) * | 2012-11-13 | 2015-09-24 | Ps4 Luxco S.A.R.L. | Semiconductor device |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7957173B2 (en) * | 2008-10-14 | 2011-06-07 | Mosaid Technologies Incorporated | Composite memory having a bridging device for connecting discrete memory devices to a system |
| US8796863B2 (en) * | 2010-02-09 | 2014-08-05 | Samsung Electronics Co., Ltd. | Semiconductor memory devices and semiconductor packages |
| US8644104B2 (en) * | 2011-01-14 | 2014-02-04 | Rambus Inc. | Memory system components that support error detection and correction |
| JP2016520226A (en) * | 2013-05-16 | 2016-07-11 | アドバンスト・マイクロ・ディバイシズ・インコーポレイテッドＡｄｖａｎｃｅｄ Ｍｉｃｒｏ Ｄｅｖｉｃｅｓ Ｉｎｃｏｒｐｏｒａｔｅｄ | Memory system with region specific memory access scheduling |
| KR20150025763A (en) * | 2013-08-30 | 2015-03-11 | 에스케이하이닉스 주식회사 | Memory system |
| US9172567B2 (en) * | 2013-11-25 | 2015-10-27 | Qualcomm Incorporated | Methods and apparatus to reduce signaling power |
| KR102238706B1 (en) * | 2014-11-28 | 2021-04-09 | 삼성전자주식회사 | Semiconductor memory device and memory system including the same |
-
2018
- 2018-05-18 KR KR1020217028680A patent/KR102438390B1/en active IP Right Grant
- 2018-05-18 CN CN201880045249.0A patent/CN110870011B/en active Active
- 2018-05-18 WO PCT/US2018/033317 patent/WO2018231423A1/en unknown
- 2018-05-18 KR KR1020207000849A patent/KR20200008024A/en not_active IP Right Cessation
- 2018-05-18 EP EP18818644.9A patent/EP3639265A4/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090103345A1 (en) * | 2007-10-23 | 2009-04-23 | Mclaren Moray | Three-dimensional memory module architectures |
| US20100121994A1 (en) * | 2008-11-10 | 2010-05-13 | International Business Machines Corporation | Stacked memory array |
| US20150270250A1 (en) * | 2012-11-13 | 2015-09-24 | Ps4 Luxco S.A.R.L. | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20210116675A (en) | 2021-09-27 |
| KR102438390B1 (en) | 2022-08-31 |
| CN110870011A (en) | 2020-03-06 |
| KR20200008024A (en) | 2020-01-22 |
| EP3639265A1 (en) | 2020-04-22 |
| WO2018231423A1 (en) | 2018-12-20 |
| CN110870011B (en) | 2023-11-03 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE INTERNATIONAL PUBLICATION HAS BEEN MADE |
|
| PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE |
|
| 17P | Request for examination filed |
Effective date: 20191209 |
|
| AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR |
|
| AX | Request for extension of the european patent |
Extension state: BA ME |
|
| DAV | Request for validation of the european patent (deleted) | ||
| DAX | Request for extension of the european patent (deleted) | ||
| A4 | Supplementary search report drawn up and despatched |
Effective date: 20201208 |
|
| RIC1 | Information provided on ipc code assigned before grant |
Ipc: G11C 11/4096 20060101AFI20201202BHEP Ipc: G11C 8/12 20060101ALI20201202BHEP Ipc: G11C 5/06 20060101ALI20201202BHEP |