EP2741241A1 - Chip-Modul mit einer Schutzschicht - Google Patents

Chip-Modul mit einer Schutzschicht Download PDF

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Publication number
EP2741241A1
EP2741241A1 EP12306557.5A EP12306557A EP2741241A1 EP 2741241 A1 EP2741241 A1 EP 2741241A1 EP 12306557 A EP12306557 A EP 12306557A EP 2741241 A1 EP2741241 A1 EP 2741241A1
Authority
EP
European Patent Office
Prior art keywords
chip
contact plate
chip module
protective layer
face
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP12306557.5A
Other languages
English (en)
French (fr)
Inventor
Nicolas Morin
Christophe Giraud
Olivier Bosquet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Idemia France SAS
Original Assignee
Oberthur Technologies SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oberthur Technologies SA filed Critical Oberthur Technologies SA
Priority to EP12306557.5A priority Critical patent/EP2741241A1/de
Publication of EP2741241A1 publication Critical patent/EP2741241A1/de
Withdrawn legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K7/00—Methods or arrangements for sensing record carriers, e.g. for reading patterns
    • G06K7/0013—Methods or arrangements for sensing record carriers, e.g. for reading patterns by galvanic contacts, e.g. card connectors for ISO-7816 compliant smart cards or memory cards, e.g. SD card readers
    • G06K7/0086—Methods or arrangements for sensing record carriers, e.g. for reading patterns by galvanic contacts, e.g. card connectors for ISO-7816 compliant smart cards or memory cards, e.g. SD card readers the connector comprising a circuit for steering the operations of the card connector
    • G06K7/0091—Methods or arrangements for sensing record carriers, e.g. for reading patterns by galvanic contacts, e.g. card connectors for ISO-7816 compliant smart cards or memory cards, e.g. SD card readers the connector comprising a circuit for steering the operations of the card connector the circuit comprising an arrangement for avoiding intrusions and unwanted access to data inside of the connector
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/0772—Physical layout of the record carrier
    • G06K19/07728—Physical layout of the record carrier the record carrier comprising means for protection against impact or bending, e.g. protective shells or stress-absorbing layers around the integrated circuit
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Definitions

  • the current invention relates to a chip module comprising a protective layer.
  • the current invention also relates to a data carrier including said chip module.
  • a protective layer is intended to provide resistance to physical and/or chemical attacks attempting to access a chip module of e.g. a smart card.
  • a smart card is typically a laminated card which has an electronic chip module incorporated in the body of the card to allow for communication with other devices such as payment or banking systems. Data held on the card, typically about the bearer of the card can be transmitted from the card to the third party device.
  • a chip module has to be incorporated very precisely in the card so that it cannot be easily removed. Also during manufacture, where the chip module is embedded in the card, there needs to be precise positioning of the chip module with contacts that are embedded in the card so communication can occur.
  • a chip module in a card firstly the card which provides the support body for the chip module is machined so that a recess is formed for receiving the chip module in the card and then the chip module is glued in place in the recess.
  • the security of a chip has been enhanced by providing a shield on the active surface of the chip.
  • the chip is coated in a silicate glass material that has nano-particles in it to form a high durability coating. This coating is used to protect against laser attack of the chip but there is still the risk that a chip may be attacked by damage to the contact plate with which the chip interacts with external devices. To date coatings have been considered for protecting contact plate but there is the problem that the more layers there are covering the contact plate, the more risk there is that communication with external devices is compromised.
  • the present invention seeks to overcome the problems with the prior art by providing a low-cost simple way of preventing attack of a chip by way of damaging a contact plate while still preserving the ability of a data carrier to communicate effectively with external devices.
  • a chip module comprising a chip and a contact plate in communication with said chip, said chip module further comprising a protective layer positioned between the contact plate and the chip.
  • said protective layer is formed from a material that is harder than the contact plate and which is resistant to cutting and/or chemical degradation, thereby providing protection against access to the chip via the contact plate.
  • said protective layer is provided as a ceramic material, a reinforced glass material, a material containing silica or mica or a combination or said materials.
  • said protective layer is provided as a separate discrete layer that is secured to the chip by an adhesive.
  • said protective layer includes particles of ceramic, glass and/or silica or mica, that are incorporated in abinder thereby forming an adhesive layer that to secure the chip to the contact plate.
  • the contact plate has a recess to receive said protective layer.
  • the protective layer comprises apertures through with conductive tracks can extend to provide contact between the contact plate and the chip.
  • the chip module is made of a glass epoxy having two faces, one face being metallized and which has been etched to provide contact tracks for the chip module and the second face which form the contact plate and has output pads able to provide the contact between the chip and an external device such as a data carrier reader.
  • an active face of the chip is angled with respect to an outer face of the contact plate.
  • the outer face of the contact plate is opposed to the active face of the chip, and that the chip is adhered to the contact plate using a layer which is thicker in one area than another area so that the active face of the chip is angled with respect to the outer face of the contact plate.
  • the chip module further comprises a chip support member comprising a first face able to be attached to the contact plate, and a second face angled with respect to the first face, able to be attached to the chip, so that the chip is held angled with respect to the contact plate.
  • the angle at which the chip is angled relative to the contact plate is more than 0 degrees, preferably between 1 and 15 degrees and more preferably is at a maximum of 10 degrees to the contact plate.
  • the chip module may be covered by an encapsulate that conforms to the dimensions of a recess intended to receive said chip module, so the chip module can be push fitted into the recess.
  • the encapsulate comprises a resin epoxy cresol novolac with one or more fillers based on amorphous or crystalline silica and alumina.
  • the protective layer may comprise at least one profiled face either to reflect a laser directed at said profiled face of the protective layer or to deflect a physical attack such as a drill applied to a said profiled face of the protective layer.
  • the profiled face of the protective layer comprises a mirrored surface on at least part of said profiled face.
  • a data carrier comprising a support body and a chip module, according to the previous embodiments, incorporated therein.
  • the invention involves seeks to overcome problems associated with the prior art by providing a protective layer that is associated with a chip module between the contact plate and the chip in order to resist attack of the chip via damage to the chip by axis through the contact plate.
  • a chip module 1 generally has a contact plate 6 as shown 1 in Figure 1 , with a central region 60 where a chip 10 is located in a support body 8 such as a smart card.
  • the outer face 6a of the contact plate 6 is generally level with that of the outer face of a support body 8 (such as a smart card) with the chip 10 being embedded in a recess 9 in the support body 8.
  • Figure 2 shows the arrangement of Figure 1 where the contact plate 6 is shown as being embedded in a support body 8 and beneath the central region 60 of the contact plate 6 there is a protective layer 15.
  • Said protective layer 15 is advantageously of a harder material than the contact plate 6, the contact plate 6 being generally copper based.
  • adhesive layers 4 On either side of the protective layer 15 there are adhesive layers 4 which hold the protective layer 15 in a fixed position against the contact plate 6 and a chip 10 that is contained within the support body 8.
  • FIG. 3 shows more detail of the chip module 1 and as can be seen it is formed of a microprocessor chip 10 having a silicon body 2 with an etched (or active surface) face 3 (collectively referred to as a chip 10).
  • the microprocessor chip 10 is held on a chip support 6 by way of an adhesive layer 4.
  • Contact track or connectors 5 lead from the active face 3 to a contact plate 6 which can be positioned on a support body 8, which typically is a payment card such as a credit card.
  • a protective layer 15 which can extend (as shown) over an entire surface of the contact plate 6 that faces the chip 10 and this is shown as (a to a') or the protective layer 15 may extend over just the area that of the contact plate 6 that corresponds to the dimension of the chip 10 i.e. b to b'.
  • conductive tracks 5 that connect the active face 3 of the chip 10 and the contact plate 6 extend around the protective layer 15.
  • the active face 3 of the chip 10 is preferably opposed to the outer face 6a of the contact plate 6.
  • the contact plate 6 is located on an outside surface of the card so there is the ability for the card to communicate with an external device.
  • the chip module 1 is located internally in the card and is attached to the surface 6b of the contact plate 6 that is opposed to the outer face 6a.
  • the card preferably is a bank card or other card that can identify a user that is trying to access a network such a telecommunication network. Typically such cards comply with ISO 7816.
  • Figure 5 shows the chip module 1 of Figure 1 embedded in a support body 8 which is in this case a smart card such as a bank card or credit card.
  • the contact plate 6 has a chip 10 with an active surface 3 mounted on it.
  • Contact track/connectors 5 are located between the active surface 3 and the contact plate 6.
  • the chip module 1 and connectors 5 are encapsulated in a resin 13 and then this encapsulated body is positioned in a recess 9 in the support body 8.
  • the encapsulated module is held in the recess 9 by adhesive layer 14 which is located at the base 9a of the recess 9.
  • the chip 10 usually is connected to contact plate 6 by an adhesive layer 4.
  • the adhesive layer 4 is typically based on epoxy-based polymer.
  • the chip 10 is encapsulated in resin 13 sets.
  • resin molding is used for packaging "classic" integrated circuits (eg DIPs).
  • This resin 13 is a composite polymer such as epoxy cresol novolac generally plus mineral filler based on amorphous or crystalline silica and alumina.
  • This use of resin 13 encapsulation has the advantage that is forms a sealed body around the chip 10 so the chip 10 is more resistant to chemical attack (e.g. based on methylene chloride) and prevents an attacker from accessing the chip 10 to corrupt it. This is because the resin 13 is much more resistant to being dissolved than the adhesives used in chip module manufacture.
  • the resin coating 13 that is used produces tightly adhering hermetic (water impermeable) coatings capable of withstanding very high temperatures.
  • the resin coating 13 may be composed of alkali silicate glass with nanoparticle and or microparticle modifiers, including, but not limited to, alkaline earth carbonates or oxides, metal oxides, rare-earth metal oxides, and non-metal oxides.
  • alkaline earth carbonates or oxides including, but not limited to, alkaline earth carbonates or oxides, metal oxides, rare-earth metal oxides, and non-metal oxides.
  • particles such as but not limited to diamond, aluminum nitride, and other inorganics may also be combined with aqueous alkali silicate based solutions and cured to form very hard and durable composites. Varying combination and concentrations of the various particles allows the production of composites with specific thermal expansion, durability, and adhesion properties. These composites have been shown to bond very well to integrated circuit materials, including but not limited to silicon, silica, silicon nitride, metals, and other inorganics. These alkali silicate glass coatings are very hard and corrosion resistant, making them extremely difficult to remove.
  • micro- and nano-particles to create a very hard glass composite coating that is difficult, impossible, or nearly impossible to mechanically remove without damaging the underlying chip 10t. Therefore, many applications exist for utilizing these composites for reverse engineering protection of chip 10, integrated circuits and/or electronics packages.
  • the support body 8 is any type of body that carries data, such as a passport, an identity card or even a card that holds personal data such as a driving license.
  • the chip module 1 is held in a recess 9 in the support body 8 with the recess 9 having a base 9a and side walls 9b. Once in situ in the recess 9 the chip module 1 is typically encased in a protective shield layer such as a resin encapsulate 13.
  • the contact plate 6 and the microprocessor chip 10 are parallel to one another when placed in the support body 8 and there is an external face 6a of the contact plate 6 that is on an outer surface of the support body 8 and an inner face that faces the inner part of the support body 8.
  • the inner face 6b has protective layer 15 between it and the adhesive layer 4 that hold the chip 10 on the contact plate 6.
  • Figure 6 shows a similar arrangement to that in Figure 5 except that the protective layer 15 is located in a recess 65 in the face 6b of the contact plate 6 that extends into the inner part of the support body 8.
  • the contact plate 6 is connected to the chip 10 by adhesive layer 4 that is between the chip 10 and the contact plate 6.
  • the chip 10 extends into a recess 9 in the support body 8 and an encapsulate 13 is contained in the recess 9 and the chip and contacts 5 are embedded in this encapsulate 13.
  • FIG 7 we see a variation where the chip 10 is positioned at an angle to the contact plate 6.
  • the contact plate 6 lies along a plane, which corresponds to that of an outer surface of a support body 8. It is envisaged that a face 3 of the chip 10 is angled with respect to this plane.
  • the adhesive layer 4 is a varying depth which results in the layer 2 of the chip 10 resting at an angle and these results in the active face 3 of the chip 10 also being at an angle to the contact plate 6.
  • the angle is typically between 0 to 15 degrees and more typically 8 to 12 degrees and more preferably 10 degrees.
  • the chip module 1 may be encased in a resin 13 and the whole chip module 1 is adhered in the support body 8 using an adhesive layer 14 in the base of a recess 9 in the support body 8.
  • the protective layer 15 prevents damage to the chip 10 by way of removing the contact plate 6 while if an attacker directs a light beam such as a laser through the face of the support body 8 opposite to that where the contact plate 6 is located then as the light that strikes the chip 10 is at an angle to that active face 3 of the chip 10, the light is deflected and deformation of the beam occurs so reducing its impact. Instead of having a small round spot, the beam spreads to form an oval (this is called "spread" beam). As a consequence of beam spreading it loses power density (W / m 2 ), and this reduces the intensity of light and reduces the disruption of photons so rendering the chip module 1 less prone to attack.
  • an adhesive layer 4 forming an inclined surface for the chip 10 it may be that the protective layer 15 is itself profiled to have an incline so that when a chip 10 is glued to it, the chip 10 is held at an angle to the contact plate 6 so that the active surface 3 of the chip 10 can deflect light attacks.
  • the surface of the protective layer 15 that is adjacent the chip 10 may be angled or mirrored again to reflect attacks by light sources such as lasers and such features, together with the use of protective layers 15 provide a defense against attacks on the chip 10 from both sides.
  • the protective layer 15 is of a material that is temperature resistant, e.g. it has a thermal stability up to 1000°C for example.
  • the material used should be resistant to drilling or cutting.
  • the protective layer 15 is opaque to laser beams and may include light reflective or absorbing particles such as silicates, calcium carbonates (chalk) carbon black or glass fibres or a mixture of such materials.
  • the conductive tracks 5 for the chip 10 are contained within the recess 9 which the chip 10 is placed in the support body 8 so that if the centre pad 60 of the contact plate 6 is peeled back then any connections between the chip 10 and the contact plate 6 will be broken making the chip 10 non-functional and so useless to any counterfeiters.
  • the adhesive 4 and the protective layer 15 may be combined in one layer.
  • Ceramic particles that provide protection against drilling (or other particles such as glass or Kevlar ®) that are resistant to physical damage may be incorporated in an adhesive which itself is resistant to impact or abrasion as well as thermal damage.
  • adhesives include acrylics or polyacrylics and the amount of particulate included in the polymer or even glass binder can affect the hardness of the layer and hence its resistance to drilling.
  • This single layer is shown in Figure 8 as 15 and like in Figure 7 the surface of the protective layer 15 is inclined so the active face 3 of the chip 10 is held at an angle.
  • the protective layer 15 has parallel faces and the chip 10 is attached to a profiled block that is attached to the protective layer 15 or indeed part of a face of protective layer 15 is raised and inclined while the reminder of the protective layer 15 has parallel faces so that the chip 10 is held at an angle to the contact plate 6 in a within the central part of the contact plate 6.
  • conductive tracks 5 pass through apertures 16 in the protective layer 15 to that the chip 10 and contact plate 6 are in conductive communication.
  • the protective layer 15 may have a profiled face 150 which is used to reflect laser light directed at the surface of the protective layer 15.
  • the reflective profiled face 150 may either be on the side of the protective layer 15 that faces the chip 10 and when positioned in this location the profiled face 150 may assist in reflecting lasers that are used to corrupt the chip 10.
  • the profiled face 150 may be on the face of the protective layer 15 that is in proximity to the contact plate 6 and if an attempt is made to corrupt the chip 10 from the front face of the support body 8, then the profiled face 150 again will assist in deflecting laser light and reducing its impact on the chip 10.
  • the profiled face 150 may also have at least on mirrored surface to reflect light or at least one hardened surface to deflect a drill bit that is aimed at the protective layer 15.
  • the use of the protective layer 15 provides a cost effective and technically effective way of stopping a counterfeiter gaining access to a microchip 10 on a support body 8 such as a data carrier. Further, in combination with a chip 10 having features to deflect attack by lasers, a particularly secure chip module 1 and data carrier including such features is obtained.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • Artificial Intelligence (AREA)
  • Manufacturing & Machinery (AREA)
  • Credit Cards Or The Like (AREA)
EP12306557.5A 2012-12-10 2012-12-10 Chip-Modul mit einer Schutzschicht Withdrawn EP2741241A1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP12306557.5A EP2741241A1 (de) 2012-12-10 2012-12-10 Chip-Modul mit einer Schutzschicht

Applications Claiming Priority (1)

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EP2741241A1 true EP2741241A1 (de) 2014-06-11

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110929831A (zh) * 2019-11-05 2020-03-27 四川华大恒芯科技有限公司 一种芯片防转移方法
IT201900014535A1 (it) 2019-08-09 2021-02-09 Modica Vincenzo Renato Di Chip sigillo con substrato ad ancoraggio irreversibile

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4943464A (en) * 1987-12-14 1990-07-24 Sgs-Thomson Microelectronics Sa Electronic component support for memory card and product obtained thereby
US5216278A (en) * 1990-12-04 1993-06-01 Motorola, Inc. Semiconductor device having a pad array carrier package
DE19600388A1 (de) * 1996-01-08 1997-09-11 Orga Kartensysteme Gmbh Chipkarte
US5975420A (en) * 1995-04-13 1999-11-02 Dai Nippon Printing Co., Ltd. Apparatus and method of manufacturing an integrated circuit (IC) card with a protective IC module
US20020179721A1 (en) * 1997-09-26 2002-12-05 Didier Elbaz Electronic module or label with a fixing adhesive forming a barrier for coating resin, and a medium including a module or label of this kind
US20070295982A1 (en) * 2006-06-27 2007-12-27 Hana Micron Co., Ltd. Micro universal serial bus memory package and manufacturing method the same
US20120088338A1 (en) 2006-08-23 2012-04-12 Rockwell Collins, Inc. Integrated circuit tampering protection and reverse engineering prevention coatings and methods
US20120217305A1 (en) * 2003-08-29 2012-08-30 Semiconductor Energy Laboratory Co., Ltd. Ic card

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4943464A (en) * 1987-12-14 1990-07-24 Sgs-Thomson Microelectronics Sa Electronic component support for memory card and product obtained thereby
US5216278A (en) * 1990-12-04 1993-06-01 Motorola, Inc. Semiconductor device having a pad array carrier package
US5975420A (en) * 1995-04-13 1999-11-02 Dai Nippon Printing Co., Ltd. Apparatus and method of manufacturing an integrated circuit (IC) card with a protective IC module
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Cited By (3)

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IT201900014535A1 (it) 2019-08-09 2021-02-09 Modica Vincenzo Renato Di Chip sigillo con substrato ad ancoraggio irreversibile
CN110929831A (zh) * 2019-11-05 2020-03-27 四川华大恒芯科技有限公司 一种芯片防转移方法
CN110929831B (zh) * 2019-11-05 2023-05-30 华大恒芯科技有限公司 一种芯片防转移方法

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