EP2445771B1 - Procede de creation d'un poste d'aiguillage electronique pour remplacer un poste d'aiguillage existant - Google Patents
Procede de creation d'un poste d'aiguillage electronique pour remplacer un poste d'aiguillage existant Download PDFInfo
- Publication number
- EP2445771B1 EP2445771B1 EP10725956.6A EP10725956A EP2445771B1 EP 2445771 B1 EP2445771 B1 EP 2445771B1 EP 10725956 A EP10725956 A EP 10725956A EP 2445771 B1 EP2445771 B1 EP 2445771B1
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- Prior art keywords
- logic
- circuit
- plan
- signal box
- input
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Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B61—RAILWAYS
- B61L—GUIDING RAILWAY TRAFFIC; ENSURING THE SAFETY OF RAILWAY TRAFFIC
- B61L27/00—Central railway traffic control systems; Trackside control; Communication systems specially adapted therefor
- B61L27/30—Trackside multiple control systems, e.g. switch-over between different systems
- B61L27/37—Migration, e.g. parallel installations running simultaneously
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B61—RAILWAYS
- B61L—GUIDING RAILWAY TRAFFIC; ENSURING THE SAFETY OF RAILWAY TRAFFIC
- B61L19/00—Arrangements for interlocking between points and signals by means of a single interlocking device, e.g. central control
- B61L19/06—Interlocking devices having electrical operation
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B61—RAILWAYS
- B61L—GUIDING RAILWAY TRAFFIC; ENSURING THE SAFETY OF RAILWAY TRAFFIC
- B61L19/00—Arrangements for interlocking between points and signals by means of a single interlocking device, e.g. central control
- B61L19/06—Interlocking devices having electrical operation
- B61L2019/065—Interlocking devices having electrical operation with electronic means
Definitions
- the invention relates to signal boxes for rail traffic. It relates in particular to a method for creating an electronic interlocking and an electronic interlocking.
- relay interlocking i. electrical interlockings.
- the fuse-related dependencies are completely electrically produced by signal relays.
- the relay interlockings are increasingly being replaced by electronic interlockings.
- the interlocking dependencies are implemented by software in dedicated computers.
- electronic interlockings according to the prior art are based on a central computer, on which the entire track image is mapped in the form of software. Accordingly elaborate is the appropriate software and This has to be adapted and parameterized for each station, resulting in an immense effort for the certification.
- the WO 2005/113315 shows a control system for railway signaling equipment, which is intended as a replacement of conventional relay-based systems.
- Processor units are used to take over the function of each unit of a relay interlocking control.
- the units used for this purpose are programmable processor cards which have a plurality of microprocessors and a memory. Also, this procedure is based so like electronic interlocking on microprocessors that work off commands set in a program; this being implemented so as to equivalently replace the switching logic of a relay-based system.
- WO 03/070537 relates to a method for generating logical control units for train station computer systems.
- WO 2006/051355 has a control system for railway vehicles to the content.
- the control system has a plurality of programmable logic controllers (PLC).
- the font US 5,922,034 shows a programmable device driver for railway signaling equipment.
- the device driver acts as an input and / or output unit for a particular function, such as a relay, a signal light, a motor, a switch, etc. It has a CPU and RAM memory.
- Various Device drivers may be serially connected; They are controlled by a central computer, which can be understood as an electronic interlocking. Also in the approach according to US 5,922,034 There are the disadvantages of the system discussed above.
- a method for creating an electronic interlocking as well as an electronic interlocking are made available, which allow the replacement of relay interlockings by modern technology, without too much effort for changes would have to be made and without the certification effort is too large.
- the switching logic of an existing relay interlocking is mapped to a functionally equivalent circuit of electronic components. It is therefore preferable to the components of the relay circuit functionally identical / equivalent semiconductor devices used.
- the functionally equivalent circuit is a configurable logic circuit, ie a circuit whose functional structure is configured.
- a 'generic' microprocessor to be processed, presented in a memory sequence of commands, but a function structure configured with interconnected blocks.
- Creating Software for a Processor In a configurable logic circuit, circuit structures are created using hardware description languages or schematics, and subsequently these structures are transferred to the device for configuration. As a result, certain switch positions are activated and / or deactivated in the configurable logic circuit. This results in a concretely implemented digital circuit that i.A. works highly in parallel because each unit of the switch position works in parallel. In contrast, even the fastest microprocessors perform at most few and usually no operations in parallel.
- FPGA Field Programmable Gate Array
- Such may include memory cells (e.g., EEPROM, EPROM, SRAM, Flash) in which the configuration is stored. During commissioning, the configuration is transferred to the actual circuit.
- the FPGA may also be permanently programmed by permanently establishing the connections between the switching units, for example with the so-called 'antifuse' technology.
- the FPGAs are often also the Complex Programmable Logic Devices (CPLD), which represent another example of configurable logic circuits.
- CPLD Complex Programmable Logic Devices
- a functionally equivalent circuit can be present in accordance with an approach if, for each input and output of the relay interlocking switching logic, a corresponding input or output of the functionally equivalent circuit is present and for the same binary input, a same binary output.
- the interlocking preferably has a plurality of input and / or output units, which form the interfaces to the elements (switches, signals, Gleisokomeldeechen, track block monitoring units) of the outdoor facility.
- These do not contain 'intelligence' (i.e., no logic) in many embodiments.
- 'intelligence' i.e., no logic
- they may also have a functional logic. They are dependent on the type of element to be controlled and serve only to convert the logic signal into the physical control of the corresponding element and thus, for example, the amplification and the potential decoupling between the logic unit and the external system.
- the input and / or output units can be centrally located in the interlocking, i. in the interlocking building and essentially at the location of the logic unit. Thus, when replacing the relay interlock, ideally only components that are inside the building need to be replaced and installed.
- the procedure according to the invention may also include the implementation of the circuit in a signal box.
- the outputs of the functionally equivalent circuit are connected to the existing components to be controlled (switches (controls), signals, barriers (controls)) without them having to be significantly adapted or even replaced.
- the architecture of the relay interlocking can be maintained substantially and thus eliminates a significant proportion of the design costs, and the entire certification process can be simplified.
- the interlocking with programmable devices can be realized so that only minor changes to the outdoor facilities must be made. The maintenance is much less expensive than with conventional relay interlockings.
- remote control and automation tasks and the integration into higher-level systems such as in a remote control system or in subordinate systems such as the ETCS (European Train Control System) can be done relatively easily by the logic modules used.
- Another advantage over electronic interlockings is the speed. In comparison to the software of a conventional electronic interlocking, the interlocking with the logic circuit designed according to the first aspect of the invention shifts orders of magnitude faster.
- the first aspect of the invention is, for example, for relay interlocking according to the shutter plan principle but also for relay interlocking according to the track plan applicable. Due to the advantages of the inventive approach to electronic interlockings to be replaced interlocking can also be a software-based electronic interlocking whose core function (binary output in function of the binary input) also by a fixed electronic circuit of semiconductor devices (iA at least one FPGA or a comparable Block) is replaced.
- the architecture of a relay equivalent functionally equivalent circuit is established by transforming a shutter plan or a track plan into a logic circuit by an automatic translator.
- the closure plan or the track plan may be in the form of a drawing, a table or in another technical form.
- the automatic translator may be in the form of computer software that assigns electronic circuitry to the shutter / track schedule based on unique, predefined prescriptions.
- the regulations are therefore comprehensible at any time and can be designed to meet the requirements of safety-relevant systems. They can also be verified by a certifying body.
- An analogous procedure can also be selected for software-based electronic interlockings to be replaced, wherein for the circuit layout of the logic circuit, in which the logic is transformed, a corresponding alternative, based on the input-output logic of the software translation program is used ,
- Particularly favorable is a combination of the first aspect of the invention with the second aspect.
- this can optionally be transformed back into a comparable form to the original shutter plan / track plan with a back-translation algorithm.
- the comparison between the closure plan / track plan and the reconstructed comparison plan can be part of the safety-relevant review.
- a user after the inverse transformation, makes the comparison between the original shutter plan V / S and the comparison plan V '/ S' obtained by inverse transformation.
- the representation of the comparison plan V '/ S' then makes sense again in the same way as the representation of the original closure plan / track plan V / S. So it makes sense that, for example, a similar representation occurs in a drawing, for example with the same local position in the representation or the same numbering or designation, or that the same names are used when using names for variables or signals.
- metadata is generated by the translator, which is then used again for the inverse transformation. It goes without saying that these metadata do not fulfill a functional task; they merely serve for better readability of the comparison plan V '/ S' for humans.
- the comparison between the closure plan / track plan and the comparison plan may be made by the computer.
- the interlocking has a logic unit and input-output units which, as mentioned, correspond in their characteristics to those of the replaced relay interlocking.
- the logic unit preferably has at least one communication input for control, automation, ETCS, etc.
- the logic unit is in the core (i.e., in the elements that detect a binary output from a binary input) preferably free of microprocessors, i. of freely programmable units.
- the logic unit may have additional systems which always ensure that the instantaneous logic function corresponds to the original logic function determined, for example, by the mentioned translation.
- the input / output units of the electronic circuit preferably have similar connection structures to the outdoor equipment (switch controllers, signals, barrier controllers, etc.) as the replaced relay units. It is also preferred that the input-output units have similar external dimensions as the relay units.
- the preferred features can help to make little or no changes to the outdoor facilities.
- the architecture of the electronic circuit and the input-output units may provide according to a first embodiment, that the logic unit is connected in a star shape with the input-output units.
- the logic function L is connected in a ring to the input-output units. This simplifies especially the wiring.
- the ring can be a parallel or serial system, electrical or optical, without or be executed with error correction, one way or two way.
- the possible characteristics of the communication have different costs and different characteristics: thus, an optically guided ring can have a large extent. Two-way communication has some error redundancy.
- star and ring architectures are conceivable, for example, a plurality of subunits each having one or more input-output units, which are annularly connected to each other, wherein the connection between the logic unit and subunit is star-shaped.
- Serial systems usually use data packets that are transmitted periodically. It is therefore technically easily possible to monitor this system state in a logging unit (for example, a separate "black box") and then to write (store) it. This allows all processes to be analyzed later by a computer that is directly connected to the "black box" B. This analysis can usefully be done during operation.
- a logging unit for example, a separate "black box”
- the first and the second logic unit preferably have an identical structure and have identical control inputs.
- the signals from both logic units should be identical. If they are not identical, there is an error in one of the logic units or in one of the higher-level systems.
- the input-output units can go into a "safe state” (eg signal to red) and / or trigger an alarm. Of course, the alarm can also be triggered by the "Black Box" B.
- a shutter plan V (or, not shown, a track plan S) is detected by a computer Comp, optionally with a special input unit I may be provided.
- the input unit may optionally be adapted to the format of the closure plan and, for example, have a scanner and corresponding software for detecting and detecting the symbols in the closure plan.
- the closure plan can be present from the outset in electronically readable form.
- the computer comp creates a logic function L #.
- the logic function corresponds to the electronic representation of a logic circuit. It is mapped to a physical logic circuit that is implemented in a programmable logic device (FPGA).
- FPGA programmable logic device
- the method for constructing the logic function L # from the closure plan V (or a track plan S) is shown schematically in FIG. 1 in a specific embodiment which makes verification possible FIG. 2 shown.
- a suitable translation program T will determine the logic function L #.
- the translation program also creates a file M with metadata which is not relevant to security and contains, for example, information relating to the presentation of the closure plan.
- a comparison plan V '/ S' is created from the logic function L # by a back translation program T -1 in the sense of 'reverse engineering', which is designed on the basis of the metadata so that, for example, a similar representation takes place or that the same names are used when using names for variables or signals.
- the comparison C is made by a verifying person or alternatively can also be done by the / a computer, in which case the metadata is used instead of creating the comparison plan V '/ S'. can also be made available to the comparative program.
- a user can make a manual adjustment via a corresponding manually-operated input option (Man).
- Man manually-operated input option
- FIG. 3 shows a star connection of the logic unit L (on which the logic function L # is implemented) with the input-output units IO 1 ... IO n .
- the input-output units preferably have similar dimensions to the original relay units and also have similar connection structures to the outdoor equipment, so that little or no changes to the outdoor equipment must be made.
- Reference symbol S denotes a communication input for communication with an input unit and / or with a higher-level system.
- the logic unit L is also connected in a star shape to the input-output units; however via a switch X.
- the architecture according to FIG. 4 is an annular architecture.
- the logic unit L is annularly connected to the input-output units IO 1 ... IO n . While in a star-shaped architecture the wiring is structurally parallel (even a parallel architecture may optionally use a serial protocol), in an annular architecture it may be both parallel and serial.
- the communication is serial, ie the data packet transmitted periodically by the logic unit, for example, contains data which contain the entire system state (switching state of each component to be controlled). Each input-output unit is addressed and extracts from the data packet the information needed for it. Because each data packet contains all the information, it is also suitable for monitoring the system and / or logging. For this purpose, the signal is also transmitted via the communication system CB to a "black box" B. There, the successive incoming data packets are stored and / or analyzed, usefully during operation.
- the communicated state can be reliably transmitted to control systems or for operation under ETCS to the 'Radio Block Center' (RBC).
- RBC Radio Block Center'
- the embodiment according to FIG. 5 has, in addition to the logic unit L, a second, functionally equivalent and possibly identical logic unit L *.
- the control inputs S, S * of the logic units are identical and identical driven.
- the control signals of L and L * are passed through the communication system CB to the input-output units IO 0 ... IO n .
- the signals of L and L * should be identical. If they are not identical, there is an error in one of the logic units L or L *, or in one of the superordinate system S or S *.
- the input-output units IO 0 ... IO n can go into a "safe state” (eg set the signal to red) and trigger an alarm. The alarm can of course be triggered by the "Black Box" B.
- Embodiments with two redundancy-aware logic units may also be used in star architectures or mixed architectures.
- the logic unit can be realized due to the inventive approach by a comparatively simple means.
- the first allows the approach two logic units to work independently of each other in parallel, which, for example, in electronic interlocking hardly in question. This, in turn, allows the redundancy, which is often very desirable, from a safety point of view.
- the independence of the two logic units may mean, for example, that the logic units exchange no intermediate results, or even that no signals from the one control unit are processed by the other control unit.
- FIG. 6 shows schematically using the example of FIG. 4 the connection to the outdoor area.
- the bold black line symbolizes the boundary between the building in which the interlocking is located and the "outside".
- the input and / or output units are each assigned to an element of the outdoor system to be activated, for example the unit IO B1 to the block B1, the unit IO W1 to the diverter W1, the unit IO S11 to the signal S11 etc.
- the interface between the existing wiring of the External installation and the replaced interlocking forms a cable distributor V, which is also preferably present in the building interior.
- FIG. 7 shows as an example a simple outdoor area with the track shown in the figure below.
- the boxes B1 and B2 in the lower half of the figure designate the route blocks 1 and 2, W1 and W2 denote points, Sij are signals, and GFM1 and GFM2 train free-field units.
- the correspondingly labeled boxes designate the input and / or output units assigned to the respective elements.
- the wiring of the logic unit (FPGA) in a ring architecture with the input and / or output units is serially formed in this example as an Ethernet bus.
- the outgoing from the cable distributor to the outside outdoor cabling can be taken over unchanged by the relay interlocking.
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- Engineering & Computer Science (AREA)
- Mechanical Engineering (AREA)
- Train Traffic Observation, Control, And Security (AREA)
- Logic Circuits (AREA)
- Emergency Protection Circuit Devices (AREA)
Claims (14)
- Procédé de formation d'un ensemble électronique de réglage pour remplacer un ensemble de réglage existant, dans lequel la logique du circuit de l'ensemble de réglage existant est reproduite sur un circuit fonctionnellement équivalent et les sorties de ce circuit sont reliés à au moins certains des composants existants à commander,
caractérisé en ce que
le circuit fonctionnellement équivalent est un circuit de composants électroniques semi-conducteurs, le circuit de composants électroniques semi-conducteurs étant un circuit logique configurable et
en ce que la logique du circuit de l'ensemble de circuit existant est reproduite sur le circuit fonctionnellement équivalent au moyen d'une transformation (T), cette reproduction contenant une configuration du circuit logique configurable. - Procédé selon la revendication 1, dans lequel les composants électroniques semi-conducteurs présentent au moins une matrice de grille programmable sur site ("Field Programmable Gate Array" - FPGA).
- Procédé selon l'une des revendications précédentes, dans lequel la liaison des sorties de ce circuit avec les composants à commander s'effectue par l'intermédiaire d'unités d'entrée et/ou d'unités de sortie (IO1...n) spécifiques au composant, sans logique intégrée ou avec logique intégrée.
- Procédé selon l'une des revendications précédentes, dans lequel l'ensemble de réglage à remplacer est un ensemble de réglage à relais.
- Procédé selon l'une des revendications précédentes, pour la formation d'un ensemble électronique de réglage servant à remplacer un ensemble de réglage à relais, dans lequel un plan de fermetures (V) ou un plan de voies (S) de l'ensemble de réglage à relais est transformé en un circuit logique au moyen d'un traducteur qui applique des règles (T) clairement prédéfinies.
- Procédé selon la revendication 5, dans lequel le circuit logique est retraduit en un plan comparatif (V', S') par application de règles inverses (T-1), ce plan comparatif pouvant être comparé avec le plan de fermetures (V) ou le plan de voies (S), une comparaison (C) entre le plan de fermetures (V) ou le plan de voies (S) et le plan comparatif (V') étant exécutée, le traducteur formant par exemple en outre des métadonnées (M) non concernées par la sécurité et la retraduction utilisant les métadonnées (M) pour représenter le plan comparatif comparable au plan de fermetures (V).
- Procédé selon l'une des revendications précédentes, dans lequel le circuit présente une unité logique (L) et plusieurs unités d'entrée et/ou unités de sortie (IO1...n), le circuit logique étant relié en étoile aux unités d'entrée et/ou aux unités de sortie.
- Procédé selon l'une des revendications 1 à 6, dans lequel le circuit présente une unité logique (L) et plusieurs unités d'entrée et/ou unités de sortie (IO1...n), le circuit logique étant relié dans une architecture en anneau aux unités d'entrée et/ou aux unités de sortie, la communication ayant lieu le long de l'anneau de préférence simultanément dans les deux directions.
- Procédé selon la revendication 8, dans lequel la communication (CB) s'effectue par paquets de données qui représentent chacun l'état global du système, la communication s'effectuant par exemple périodiquement et la communication étant écrite conjointement par un observateur (B).
- Procédé selon l'une des revendications précédentes, caractérisé en ce que le circuit présente deux unités logiques redondantes qui exécutent chacune la même fonction logique et qui délivrent leurs résultats, le circuit étant commuté en un état sécurisé et/ou une alarme étant déclenchée au cas où les résultats ne correspondent pas.
- Ensemble de réglage formé par un procédé selon l'une des revendications précédentes, présentant une unité logique électronique (L) et plusieurs unités d'entrée et/ou unités de sortie (IO1...n) qui commandent des composants tels que des aiguillages, des signaux, des barrières et similaires,
caractérisé en ce que
l'unité logique (L) est configurée au moins en partie comme module logique semi-conducteur programmé présentant la forme d'un circuit logique configurable. - Ensemble de réglage selon la revendication 11, caractérisé en ce qu'au moins un module logique semi-conducteur est une matrice de grille programmable sur site ("Field Programmable Gate Array" - FPGA).
- Ensemble de réglage selon les revendications 11 ou 12, caractérisé en ce que l'unité logique (L) ne présente pas de microprocesseur.
- Ensemble de réglage selon l'une des revendications 11 à 13, caractérisé par une deuxième unité logique (L*) fonctionnellement équivalente à l'unité logique (L), l'unité logique (L) et la deuxième unité logique (L*) délivrant toutes deux des signaux de commande aux unités d'entrée et/ou aux unités de sortie (IO1...n) et la deuxième unité logique (L*) étant sélectionnée en appliquant le principe de diversité.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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CH00974/09A CH701344A1 (de) | 2009-06-23 | 2009-06-23 | Stellwerksteuerung. |
PCT/CH2010/000160 WO2010148528A1 (fr) | 2009-06-23 | 2010-06-22 | Procédé pour établir un poste d'aiguillage électronique en remplacement d'un poste existant |
Publications (2)
Publication Number | Publication Date |
---|---|
EP2445771A1 EP2445771A1 (fr) | 2012-05-02 |
EP2445771B1 true EP2445771B1 (fr) | 2018-11-07 |
Family
ID=40942464
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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EP10725956.6A Active EP2445771B1 (fr) | 2009-06-23 | 2010-06-22 | Procede de creation d'un poste d'aiguillage electronique pour remplacer un poste d'aiguillage existant |
Country Status (6)
Country | Link |
---|---|
US (1) | US9783215B2 (fr) |
EP (1) | EP2445771B1 (fr) |
JP (1) | JP5881600B2 (fr) |
CA (1) | CA2766432C (fr) |
CH (1) | CH701344A1 (fr) |
WO (1) | WO2010148528A1 (fr) |
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CZ303209B6 (cs) * | 2011-03-17 | 2012-05-23 | Ažd Praha S. R. O. | Zpusob zachování bezpecného stavu zabezpecovacích systému se složenou bezpecností, zejména na železnici, pri vytvárení datových otisku |
CN102248949B (zh) * | 2011-04-12 | 2014-04-30 | 上海华为技术有限公司 | 继电器控制方法、***及列车运行控制*** |
DE102011007601A1 (de) * | 2011-04-18 | 2012-10-18 | Siemens Aktiengesellschaft | Verfahren zum Austauschen eines an ein elektronisches Stellwerk angeschlossenen Stellwerks mit Relaisschnittstellen-Ein-/Ausgang gegen ein weiteres elektronisches Stellwerk mit mindestens einem Datenbus-Ein-/Ausgang und elektronisches Stellwerk |
DE102013209546A1 (de) * | 2013-05-23 | 2014-11-27 | Siemens Aktiengesellschaft | Verfahren zum Ersetzen eines ersten Stellwerkes durch ein zweites Stellwerk |
EP2853465B1 (fr) * | 2013-09-27 | 2016-03-16 | Siemens Schweiz AG | Circuit logique et procédé de remplacement d'un relais de sécurité à guidage forcé |
EP2868547A1 (fr) | 2013-10-24 | 2015-05-06 | Siemens Schweiz AG | Architecture de poste d'aiguillage et de commande pour voies ferrées |
DE102013223101A1 (de) * | 2013-11-13 | 2015-05-13 | Siemens Aktiengesellschaft | Bahnübergangssicherungssystem |
WO2015101610A1 (fr) * | 2013-12-30 | 2015-07-09 | Ineo Urban Transportation Solutions | Procédé et dispositif informatisé pour l'enclenchement d'un itinéraire ferroviaire |
EP3312073B1 (fr) | 2016-10-21 | 2023-08-23 | Schweizerische Bundesbahnen SBB | Procédé de contrôle d'un système ferroviaire et système ferroviaire |
CN114384841B (zh) * | 2021-12-31 | 2024-04-30 | 江苏天芯微半导体设备有限公司 | 一种用于衬底处理设备的信号调制模组 |
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US5570284A (en) * | 1994-12-05 | 1996-10-29 | Westinghouse Air Brake Company | Method and apparatus for remote control of a locomotive throttle controller |
US5922034A (en) * | 1996-12-06 | 1999-07-13 | Union Switch & Signal Inc. | Programmable relay driver |
DE19832601C1 (de) * | 1998-07-09 | 2000-01-05 | Siemens Ag | Elementverbindungsplan für ein elektronisches Stellwerk |
FR2826921B1 (fr) * | 2001-07-05 | 2004-07-09 | Cit Alcatel | Procede de formation et de gestion d'itineraires et reseau mettant en oeuvre un tel procede |
ITSV20020009A1 (it) * | 2002-02-22 | 2003-08-22 | Alstom Transp Spa | Metodo per la generazione di unita' logiche di comando degli apparatidi stazione a computer vitale, cioe' nelle unita' centrali di comando |
GB0411277D0 (en) * | 2004-05-20 | 2004-06-23 | Balfour Beatty Plc | Railway signalling systems |
DE202005020802U1 (de) | 2004-11-15 | 2007-03-15 | Abb As | Steuersystem für Schienenfahrzeuge |
DE202005016151U1 (de) * | 2005-10-09 | 2006-02-09 | Elpro Gmbh Berlin -Industrieholding- | Einrichtung zur Fernsteuerung eines Relais-Stellwerks unter Verwendung von hochverfügbaren diversitären Steuerungen |
US7705743B2 (en) * | 2006-03-01 | 2010-04-27 | L-3 Communications Corporation | Self-assembling wireless network, vehicle communications system, railroad wheel and bearing monitoring system and methods therefor |
DE102008009746A1 (de) * | 2008-02-18 | 2009-08-27 | Deutsche Bahn Ag | Verfahren zur Realisierung einer universellen Streckensicherungstechnik mittels industriell verfügbarer SPS-Komponenten |
-
2009
- 2009-06-23 CH CH00974/09A patent/CH701344A1/de not_active Application Discontinuation
-
2010
- 2010-06-22 JP JP2012516463A patent/JP5881600B2/ja active Active
- 2010-06-22 US US13/378,337 patent/US9783215B2/en active Active
- 2010-06-22 WO PCT/CH2010/000160 patent/WO2010148528A1/fr active Application Filing
- 2010-06-22 EP EP10725956.6A patent/EP2445771B1/fr active Active
- 2010-06-22 CA CA2766432A patent/CA2766432C/fr active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4220696A1 (de) * | 1992-06-23 | 1994-01-05 | Siemens Ag | Fahrwegsicherungssystem für spurgebundene Fahrzeuge |
Also Published As
Publication number | Publication date |
---|---|
US20120182045A1 (en) | 2012-07-19 |
CA2766432C (fr) | 2019-01-08 |
EP2445771A1 (fr) | 2012-05-02 |
JP5881600B2 (ja) | 2016-03-09 |
WO2010148528A1 (fr) | 2010-12-29 |
CA2766432A1 (fr) | 2010-12-29 |
CH701344A1 (de) | 2010-12-31 |
JP2012530639A (ja) | 2012-12-06 |
US9783215B2 (en) | 2017-10-10 |
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