EP1326155A1 - Referenzspannungsgenerator mit verbesserter Leistung - Google Patents

Referenzspannungsgenerator mit verbesserter Leistung Download PDF

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Publication number
EP1326155A1
EP1326155A1 EP02080245A EP02080245A EP1326155A1 EP 1326155 A1 EP1326155 A1 EP 1326155A1 EP 02080245 A EP02080245 A EP 02080245A EP 02080245 A EP02080245 A EP 02080245A EP 1326155 A1 EP1326155 A1 EP 1326155A1
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Prior art keywords
circuit
voltage
node
temperature
transistor
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EP02080245A
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English (en)
French (fr)
Inventor
Hervé Marie
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Koninklijke Philips NV
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Koninklijke Philips Electronics NV
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Publication of EP1326155A1 publication Critical patent/EP1326155A1/de
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26—Current mirrors
    • G05F3/267—Current mirrors using both bipolar and field-effect technology
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/30—Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities

Definitions

  • the present invention relates to a generator of at least one voltage of reference to improved performance.
  • Reference voltage generators can be used in many applications such as converters in which we need to have a very precise and stable voltage value whatever the conditions environmental. This is particularly the case when the reference voltage is based on the energy band.
  • These voltage generators are known by the Anglo-Saxon name of "bandgap generator” in the literature.
  • bandgap generator In an integrated circuit, we use as voltage reference the potential barrier of a PN junction corresponding to the width of the strip prohibited semiconductor is 1.205 volts in the case of silicon.
  • the value of the reference voltage delivered by this generator must be reference voltage is not dependent on the process for producing the different electronic components of the generator.
  • These reference voltage generators are produced in the form of monolithic integrated circuits and it is well known that components in front having the same characteristics are ultimately dissimilar.
  • the reference voltage delivered by such generators be as little as possible affected by faults in the power source which feeds.
  • the signals delivered by the power sources include disturbances: noise, noise, voltage spikes. These faults must not have repercussions on the level of the reference voltage delivered by the generator.
  • the reference voltage generator has the highest power rejection rate possible over a wide frequency band. It is the ratio between a variation of the tension output of the reference voltage generator caused by a variation of the voltage power supply and said variation of the supply voltage, this quantity is known by the Anglo-Saxon abbreviation PSRR for Power Supply Rejection Ratio.
  • this reference voltage generator has a good load rejection and that it has the lowest start-up response time possible.
  • Reference voltage generators of known type are such that their voltage output, with appropriate weighting coefficients, a base emitter voltage of a bipolar transistor with a voltage proportional to the absolute temperature T.
  • the choice weighting coefficients is done so that the voltage changes proportional to the absolute temperature compensate for those of the base emitter voltage of the bipolar transistor.
  • FIG. 1 An example of a reference voltage generator known from the article "A Simple Three-Terminal IC Bandgap Reference ", A. Paul BROKAW, IEEE Journal of solid state circuits, volume sc-9, n ° 6, december 1974, pages 388 to 393, is illustrated in figure 1. It consists an input stage 1 with two branches 10, 11 mounted between two supply terminals 20, 21, one 20 brought to a high potential Vcc, the other 21 brought to a low potential. Vee, generally the mass. In each of the branches 10, 11 there is at least one bipolar transistor Q1, Q2 and these transistors do not have the same size of transmitter.
  • This input circuit 1 combines a voltage transmitter base of one of the Q2 bipolar transistors with a voltage proportional to the absolute temperature (known as PTAT voltage, PTAT being the abbreviation Anglo-Saxon for Proportionnai To Absolute Temperature) and it is the tension resulting from this combination which forms the reference voltage Vref.
  • PTAT voltage a voltage proportional to the absolute temperature
  • Vref the reference voltage
  • This input circuit 1 is associated with an operational amplifier 2 which, by attenuating variations in the supply voltage Vcc-Vee, maintains the same current in both branches 10, 11.
  • the operational amplifier is configured to have the greatest gain possible.
  • the two transistors Q1, Q2 have their common base, their collectors connected to the supply terminal 20 brought to the potential Vcc via a resistance R2, R3 respectively.
  • the emitter of the first transistor Q1 is connected to the other terminal supply 21 via a series 12 mounting of two resistors R1, R0.
  • the transmitter of the second transistor Q2 is connected to the other supply terminal 21 via one R0 of the resistors of the assembly series 12.
  • the emitter area of the first transistor Q1 is equal to n (n integer greater than a) times that of the second transistor Q2.
  • n can be equal to 8.
  • Operational amplifier 2 can take a classic form with a stage differential amplifier 13 and an output stage 14.
  • the amplifier stage differential 13 comprises a differential pair 15 of transistors Q3, Q4 whose bases form the two differential inputs.
  • the base of transistor Q3 is connected to branch 11 at the level of collector of transistor Q2, the base of transistor Q4 is connected to branch 10 at the collector of transistor Q1.
  • the emitters of the transistors Q3, Q4 are interconnected. They are connected to the supply terminal 21 brought to the potential Vee by a source resistor R4.
  • the collectors of the two transistors Q3, Q4 are each connected to the supply terminal 20 carried at potential Vcc via a load resistor R5, R6 respectively.
  • upstairs output 14 includes a follower circuit 22 with a transistor Q5 whose emitter is connected to the supply terminal 21 brought to potential Vee via a resistor R7, the collector is connected to the supply terminal 20 brought to the potential Vcc and whose base is connected to the emitter of transistor Q4 of the differential amplifier 13.
  • the output of the reference voltage generator is at the bases transistors Q1, Q2 of input stage 1 which are connected to the emitter of transistor Q5 the output stage 14.
  • the operational amplifier 2 compares the currents flowing in the two branches 10, 11 and ensures that they remain substantially equal whatever the variations in diet.
  • Vref Vbe (Q2) + R0.I0
  • Vbe (Q2) representing the base emitter voltage of transistor Q2 and I0 being the current flowing in the resistor R0.
  • Vbe (Q2) - Vbe (Q1) R1.I1.
  • Vbe (Q2) - Vbe (Q1) V T .Log (n) with V T thermal voltage.
  • This thermal voltage V T is equal to kT / Q where k is the Boltzmann constant, T the temperature in degrees Kelvin, and q the charge of the electron.
  • the voltage across the resistor R0 is equal to: 2.V T .Log (n) .R1 / R0 since the same currents flow in the transistors Q1, Q2.
  • Vref Vbe (Q2) + 2.V T .Log (n) .R1 / R0.
  • the reference voltage generator requires a starting circuit (not shown). Indeed, the circuit is in a stable mode when no current flows in the transistors Q1, Q2 and that they are in a blocked state.
  • the start-up circuit has the function of injecting a current into the load circuit of the pair differential thus increasing the emitter voltage of the transistors of the differential pair and therefore the voltage at the base of the transistors of the input circuit.
  • Such a circuit start-up requires many active components, for example several MOS transistors operating as switches, a current mirror with bipolar transistors and some resistances. It significantly increases the cost of the reference voltage generator.
  • the object of the present invention is to provide a voltage generator for reference as insensitive as possible to variations in supply voltage and process of manufacturing, whose dependence on temperature is determined and which does not have not the disadvantages of the reference voltage generator of Figure 1, namely the need to use a high gain operational amplifier and the need to include a circuit start-up.
  • the source and load circuits include regulation means for, even when the loop connecting the input stage to the output stage is open, regulate the voltage of reference which is then delivered in a manner substantially independent of the method of generator manufacturing, variations in supply voltage and with dependence determined with respect to temperature.
  • the means of regulation impose, the loop being open, that during a variation of the supply voltage, substantially the same variation affects the circuit source and on the load circuit so that the voltage appearing at the first node is practically independent of variations in the supply voltage, the current in the source circuit being substantially independent of temperature.
  • the differential amplifier may include a pair of differential transistors and the source circuit may include a resistor and a diode in series, the resistor being connected to the pair of differential transistors and the diode to one of the supply terminals, the diode with a temperature slope such that, even when the loop is open, said slope compensates for the temperature slopes of the input stage and the amplifier stage differential so that the voltage across the resistor is substantially independent of temperature and manufacturing process.
  • the load circuit may include a resistor mounted between the first node and one of the supply terminals, the ratio between the value of the resistance of the load and the value of the resistance of the source circuit being adjusted so that, even in open loop, when the supply voltage changes, the same variation is reflected on the source circuit and on the load circuit so that the tension appearing at the first node is practically independent of the variations of the supply voltage.
  • the operational amplifier may include a compensation circuit connected to the first node and at the output stage at a second node with the loop when it is closed, the compensation circuit and the source circuit now at the level of the first node a voltage which substantially compensates for that brought by the output stage, rendering, even when the loop is open, the voltage at the second node is substantially independent of temperature and variations in the supply voltage.
  • the compensation circuit may include a bipolar transistor whose emitter is connected to one of the supply terminals through a resistor, the collector of which is connected at the first node and whose base is connected to the output stage at the level of the second node.
  • the output stage may include a follower circuit with a transistor bipolar, the transmitter of which is connected to one of the supply terminals through at least one resistance and to the loop when it is closed, whose collector is connected to the other terminal supply and whose base is connected to the first node, an output of the generator being made at the emitter of the bipolar transistor.
  • the output stage may include a follower circuit with a bipolar transistor whose the transmitter is connected to one of the supply terminals through a divider resistor bridge voltage and to the loop when closed, whose collector is connected to the other terminal supply and whose base is connected to the first node, an output of the generator being made at a common point between two resistors of the voltage divider bridge.
  • the output stage may include, associated with the follower circuit, an adjustment circuit of the temperature slope of the voltage at the first node, this adjustment circuit being mounted between the first node and one of the supply terminals and being connected to a common point between two resistors of the voltage divider bridge, this control circuit generating a current whose temperature slope is adjustable by the choice of bridge resistances.
  • the adjustment circuit can include a bipolar transistor whose emitter is connected to one of the supply terminals through a resistor, the collector of which is connected to the first node and whose base is connected to the common point between two resistors of the bridge voltage divider, a generator output being at the emitter of the transistor of the adjustment circuit.
  • the adjustment circuit can cooperate with an additional circuit having a transistor to form a current mirror, the output being at the emitter of the transistor of the additional circuit.
  • the generator may have a standby circuit to put it into standby mode, the standby circuit including several pairs of additional MOS transistors installed in the differential amplifier stage and a pair additional MOS transistors located in the output stage, these MOS transistors being controlled by a standby mode controller.
  • This generator is perfectly suited to deliver a founded reference voltage on the forbidden energy band of a semiconductor material.
  • the invention also relates to a converter including a generator according to the invention and an apparatus for receiving and transmitting radio communications signals including a generator according to the invention.
  • a device can for example be a telephone which can for example include a converter according to the invention.
  • FIG. 2 shows in detail an example of a generator of at least one reference voltage Vref according to the invention.
  • the operational amplifier 2 comprises a differential amplifier stage 13, a output stage 14, a compensation circuit 16.
  • the output stage 14 is similar to that of the Figure 1 with a follower circuit 22, it will not be described again. It is connected by a loop 3 at the input stage 1 at the level of the common base of the two transistors Q1, Q2 of the input stage 1.
  • the two transistors Q1, Q2 have different emitter surfaces and multiples of each other.
  • the reference voltage Vref is delivered by the output stage 14. Its elements have the same references as in FIG. 1.
  • the differential amplifier stage 13 comprises a pair of transistors Q6, Q7 differential 15 connected to the input stage 1 and mounted between the two supply terminals 20, 21 via a source circuit 17 and a load circuit 18. More precisely, the bases of the two transistors Q6, Q7 form the two differential inputs of stage 13.
  • the base of transistor Q6 is connected to branch 11 at the collector of transistor Q2, the base of transistor Q7 is connected to branch 10 at the collector of transistor Q1.
  • the emitters of transistors Q6, Q7 are interconnected. They are connected to the power terminal 21 brought to the potential Vee by the source circuit 17 which is now an active circuit.
  • the source 17 and load 18 circuits include regulation means R8, R9 for, even when loop 3 is open, regulate the reference voltage Vref. This the latter is then delivered substantially independently of the process for manufacturing the generator, variations in the supply voltage and with a determined dependence on of the temperature.
  • the source circuit 17 comprises in series a diode, represented by a transistor Q9 connected by diode, and a resistor R9 forming part of the regulation means.
  • the resistor is connected to the common emitters of the transistors Q6, Q7 of the differential pair 15.
  • the collectors of the two transistors Q6, Q7 are each connected to the supply terminal 20 brought to potential Vcc via the charging circuit 18.
  • This charging circuit 18 includes a resistor R8, part of the regulation means, mounted between the collector of the transistor Q7 of the differential pair and the supply terminal 20.
  • the collector of the other transistor Q6 of the differential pair 15 is directly connected to the terminal supply 20.
  • the output stage 14 is connected in a first node A to the charging circuit 18, at the collector of transistor Q7.
  • the compensation circuit 16 is an active circuit, it includes a transistor Q10 whose collector is connected to the first node A, that is to say to the resistor R8 and to the stage of output 14 at the base of transistor Q5, and whose emitter is connected to the terminal supply 21 through a resistor R10.
  • the base of transistor Q10 is connected to the base common of the transistors Q1, Q2 of the input stage.
  • the reference voltage Vref is available at a second node B which corresponds to the link between the emitter of the output transistor Q5, the resistor R7 and loop 3.
  • the reference voltage is available at a another location of the output stage 14 as illustrated in FIG. 3 described later and even that several reference voltages of different values and / or temperature slopes are delivered by the voltage generator according to the invention.
  • the means for regulating the source 17 and load 18 circuits by virtue of their configuration impose that the voltage appearing at the first node A is practically independent of variations in the supply voltage Vcc-Vee.
  • the ratio of resistances R9 and R8 of the regulation means is chosen in such a way that a variation ⁇ (Vcc-Vee) of the supply voltage causes substantially the same variation ⁇ (Vcc-Vee) on the source circuit 17 and on the load 18 across the load resistor R8 regardless of the temperature.
  • the first node A does not vary in tension during a variation of the tension Power.
  • the ratio of resistances R8 / R9 of the regulation means is chosen in such a way so that the gain in common mode of the amplifier formed by the differential stage 13 and the resistors R2, R3 is adjusted to the value -1.
  • the circuit of source 17 is configured to generate a current substantially independent of temperature, which amounts to saying that the resistance R9 is adjusted so that the voltage across its terminals is substantially independent of temperature. This is checked for all temperatures if the following adjustment is made at the level of the input stage 1.
  • V R9 (Vcc - Vee) - V R3 + V BE (Q6) + V BE (Q9))
  • VR9 (Vcc - Vee) - (V R3 + 2V BE )
  • V R3 + 2V BE The term (V R3 + 2V BE ) must then be substantially independent of the temperature, this happens if it is equal to 2Vref for example and if the temperature slope of the peak resistance R3 compensates for those of the two base emitter voltages of the transistors Q6 and Q9. This makes the reference voltage generator object of the invention insensitive to the manufacturing process. With the notation explained below, the temperature slope of the resistor R3 is substantially equal to one and that of the voltage across the resistor R9 substantially equal to zero.
  • the two resistors R2, R3 of the collector of the input stage 1 are identical. The same current flows in the transistors Q1, Q2 of the input stage, this current having a slope substantially equal to one.
  • V BE0 0.8V .
  • the tension at the level of the second node B is appreciably independent of temperature variations, which means, with this notation, that it must have a temperature slope substantially equal to 0.
  • the voltage reference is taken from the second node B.
  • the slope in temperature of the tension at the first node A is substantially equal and opposite to that provided by the transistor Q5 of the output stage 14 to obtain slope compensation. It just happens that the temperature slope of the voltage at the first node A and therefore at the terminals of the load circuit 18 must be substantially equal to 0.5 since the temperature slope of a base emitter voltage of a bipolar transistor is -0.5. This slope is conditioned by that of the source circuit 17 and by that of the source circuit. compensation 16.
  • These two circuits each include a bipolar transistor Q9, Q10, the temperature slope is imposed and equal to substantially -0.5 and a resistance R9, R10 that it just adjust to impose that of the charging circuit 18.
  • the temperature slope of the circuit compensation 16 thus takes substantially the value 1 in the example described and that of the source circuit 17 substantially the value 0.
  • the voltage across the resistor R10 of the compensation circuit 16 varies substantially in proportion to the absolute temperature.
  • the table at the end of the description groups the characteristics in value, slope and voltage assigned to each of the components of the reference voltage generator according to the invention.
  • the voltage at the second node B in the example the reference voltage Vref, is appreciably independent of temperature, variations in power and the process production.
  • the emitter of transistor Q5 of the stage of output 14 and the base of transistor Q10 of the compensation circuit are connected at the second node B, but they are no longer connected to the base of the transistors Q1, Q2 of the input stage.
  • a voltage Vrefin substantially equal to the voltage Vref desired at the output, is applied to the base of the transistors Q1, Q2 of the input circuit 1.
  • the operational amplifier 2 having nothing to correct since the voltage at the second node B is independent of the temperature and feed variations and even in open loop, can have a low gain.
  • FIGS. 5A, 5B are curves of the variations of the reference voltage delivered by the generator of FIG. 2 as a function of the supply voltage Vcc open loop and closed loop respectively.
  • the three curves correspond to different temperatures.
  • the curve referenced 1 corresponds to 120 ° C
  • the curve referenced 2 corresponds to 27 ° C
  • the curve referenced 3 corresponds to -30 ° C.
  • Vee represented the mass.
  • the curves are substantially flat over a wide range of voltages.
  • FIGS. 6A, 6B are curves of the variations of the reference voltage delivered by the generator of FIG. 2 as a function of the temperature respectively in open loop and closed loop.
  • the three curves correspond to voltages different feed.
  • the curve referenced 1' corresponds to a voltage of 2.5V, the curve referenced 2 'at a voltage of 2.7V, the curve referenced 3' at a voltage of 3V.
  • the curves are substantially flat over a wide range of temperatures.
  • Figure 7 shows for different temperatures and different voltages power supply, variations in the reference voltage Vref as a function of the voltage Vrefin.
  • Curve a corresponds to a supply voltage of 3V and a temperature of 120 ° C
  • the curve b corresponds to a supply voltage of 3V and a temperature of -30 ° C
  • This adjustment circuit 24 may include a transistor Q12 of which the transmitter is connected to the power supply terminal 21 through a resistor R12, including the collector is connected to the first node A and whose base is connected to the follower circuit 22 which now includes a resistor bridge R110, R111 voltage divider mounted between the terminal supply 21 and the second node B, that is to say the emitter of transistor Q5. Resistance R110 is connected to the emitter of transistor Q5, the resistor R111 is connected to the terminal 21. The two resistors R110 and R111 have one point in common C. The base of the transistor Q12 is connected to common point C.
  • the adjustment circuit 24 makes it possible to generate at the charge circuit 18 a current whose temperature slope is greater than or equal to one and this slope is adjusted by the values of resistors R110, R111 of the divider bridge and more particularly by the ratio (R110 + R111) / R111. In the example described this ratio is 8/9 which allows the adjustment circuit 24 generates a current whose slope is substantially equal to 1.5.
  • the compensation circuit 16 generates a current at charge circuit 18 whose slope is substantially equal to one, these two currents add up at the charge circuit and the resulting current in the charging circuit has a temperature gradient which depends on the weights relative currents of the two circuits, that is to say values of resistors R10, R12. In the example described, it is slightly greater than one.
  • a reference voltage could be taken at a location other than at node B of the output stage 14. It could be taken at the common point C between the two resistors R110, R111 of the voltage divider bridge and its value to be imposed by the values resistors of the divider bridge. In the example it would be worth approximately 8/9 of the voltage at second node B and its temperature slope would be substantially zero.
  • a reference voltage with a known slope, greater than one, could be taken from the terminals of the resistor R12 of the adjustment circuit 24, but it is preferable associate the adjustment circuit 24 with an additional circuit 23 to transform it into a mirror current. The same current will flow in the adjustment circuit 24 and in the circuit additional 23.
  • the additional circuit 23 includes a transistor Q13, the collector of which is connected to the supply terminal 20, a transmitter connected to the supply terminal 21 through a resistor R13 and a base connected to the base of the transistor Q12 of the adjustment circuit 24.
  • a voltage of reference Vref1 is taken from the emitter of transistor Q13. In this example, it has the same slope as that present at the emitter of transistor Q12.
  • Vref1 a voltage whose temperature slope is substantially equal 1.5.
  • the values of the resistances of the current mirror and of the divider bridge are indicated in the table at the end of the description.
  • This slope of +1.5 can for example be used to compensate in a user circuit with MOS transistors, the mobility ⁇ of the electrons whose slope in temperature is -1.5 with the previous notation. Note that this slope value in temperature is higher than that of a voltage proportional to the absolute temperature which is 1.
  • Such a reference voltage generator can be equipped to operate in a standby mode.
  • the standby mode is useful for example in a telephony application mobile.
  • Figure 4 illustrates a reference voltage generator similar to that of Figure 3 but equipped with a standby circuit (30, P6, P7, P5).
  • the standby circuit is consists of several pairs P6, P7, P5 of complementary MOS transistors. Each of the transistors Q6, Q7 of the differential pair 15 and the transistor Q5 of the output circuit 22 is associated with such a pair of complementary MOS transistors respectively P6, P7, P5.
  • the MOS transistors of the pair P6 associated with the bipolar transistor Q6 are referenced M61, M62, the transistor M61 being the N-channel MOS transistor and the transistor M62 being the P-channel MOS transistor. More precisely, the transistor M61 has its drain connected to the base. of transistor Q6, its source connected to the emitter of transistor Q2 and its gate connected to a device standby control 30. The transistor M62 has its drain connected to the base of the transistor Q6, its source connected to the supply terminal 21 brought to the potential Vee and its grid connected to the device standby control 30. The base of transistor Q6 is then connected to the emitter of the transistor Q2 through the MOS transistor M61.
  • the MOS transistors of the pair P7 associated with the bipolar transistor Q7 are referenced M71, M72, the transistor M71 being the N-channel MOS transistor and the transistor M72 being the P-channel MOS transistor. More precisely, the transistor M71 has its drain connected to the base. of transistor Q7, its source connected to the emitter of transistor Q1 and its gate connected to the standby control 30. The transistor M72 has its drain connected to the base of the transistor Q7, its source connected to the supply terminal 21 brought to the potential Vee and its grid connected to the standby control 30. The base of transistor Q7 is then connected to the collector of transistor Q1 through the MOS transistor M71.
  • the MOS transistors of the pair P5 associated with the bipolar transistor Q5 are referenced M51, M52, the transistor M51 being the N-channel MOS transistor and the transistor M52 being the P-channel MOS transistor. More precisely, the transistor M51 is inserted between the first node A and the base of transistor Q5, it has its drain connected to the base of transistor Q5, its source connected to the first node A and its gate connected to the standby control device 30. The transistor M52 has its drain connected to the base of transistor Q5, its source connected to the supply terminal 21 brought to potential Vee and its grid connected to the standby control device 30. The base of the transistor Q5 is then connected to node A through the MOS transistor M51.
  • the standby control device 30 generates a high voltage to activate the standby mode and a low voltage, usually ground, to deactivate standby mode.
  • the P-channel MOS transistors are equivalent to open circuits and N-channel MOS transistors to short circuits.
  • the standby mode is disabled it is the opposite.
  • the stabilization 19 instead of being connected directly to the base of transistor Q5 is connected to the source of MOS transistor M51. Indeed, when the capacitor C1 is connected directly to the base of transistor Q5, in standby, it is discharged because its two terminals are substantially at potential of the supply terminal 21 brought to the potential Vee. Upon awakening, it charges thanks to the current flowing through the charging circuit 18 and the charging time is equal to the product R8.C1.
  • the stabilization circuit 19 ' By placing the stabilization circuit 19 'between node A and the power supply terminal 21 brought to potential Vee, in standby, the voltage at node A is substantially equal to Vcc and to awakening, the capacitor C'1 is discharged via the transistor Q7 and the resistor R9, which is much faster than a charge.
  • FIG. 8 shows the variations of the reference voltage Vref as a function of the time for several supply voltages and several temperatures, when passing the standby mode enabled to standby mode disabled.
  • Curve a1 corresponds to a voltage power supply of 3V and a temperature of -30 ° C
  • curve a2 corresponds to a voltage power supply of 3V and a temperature of 120 ° C
  • curve b1 corresponds to a voltage power supply of 2.5V and a temperature of -30 ° C
  • curve b2 corresponds to a voltage 2.5 V power supply and a temperature of 120 ° C.
  • the wake-up time is very short, from around thirty nanoseconds.
  • FIG. 9 shows pairs of curves illustrating this feed rejection rate as a function of the frequency for several feed voltages and two extreme temperatures.
  • Curves e1, e2 correspond to a supply voltage of 2.5 V
  • curves e3, e4 correspond to a supply voltage of 2.7 V
  • curves e5, e6 correspond to a supply voltage of 3 V.
  • the supply rejection rate is all the better the higher the supply voltage, the circuit having been optimized in this way. Indeed, the specificity of the circuit is to have an optimal operation between approximately 2.7 V and 3 V and to be functional between approximately 2.5 V and 2.7 V.
  • All bipolar transistors have been represented by NPN transistors, but there it is possible to replace them with PNP bipolar transistors by performing all appropriate reversals, in particular at the level of the load and source circuits.

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EP02080245A 2001-12-20 2002-12-11 Referenzspannungsgenerator mit verbesserter Leistung Withdrawn EP1326155A1 (de)

Applications Claiming Priority (2)

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FR0116573 2001-12-20
FR0116573A FR2834086A1 (fr) 2001-12-20 2001-12-20 Generateur de tension de reference a performances ameliorees

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EP1326155A1 true EP1326155A1 (de) 2003-07-09

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US8324944B2 (en) 2009-05-29 2012-12-04 Stmicroelectronics Design And Application S.R.O. Startup circuitry and corresponding method for providing a startup correction to a main circuit connected to a startup circuitry

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* Cited by examiner, † Cited by third party
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EP2031476B1 (de) * 2007-08-30 2011-01-26 austriamicrosystems AG Spannungsregler und Verfahren zur Spannungsregelung
US9116048B2 (en) * 2011-02-10 2015-08-25 Linear Technology Corporation Circuits for and methods of accurately measuring temperature of semiconductor junctions
CN103492971B (zh) * 2011-04-12 2015-08-12 瑞萨电子株式会社 电压产生电路
EP2977849A1 (de) * 2014-07-24 2016-01-27 Dialog Semiconductor GmbH Hochspannungs- zu Niederspannungsregler mit niedrigem Spannungsverlust mit autarker Spannungsreferenz
EP3812873A1 (de) * 2019-10-24 2021-04-28 NXP USA, Inc. Spannungsreferenzerzeugung mit kompensation von temperaturschwankungen

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4224584A1 (de) * 1992-07-22 1994-01-27 Mikroelektronik Und Technologi Hochgenaue Referenzspannungsquelle
EP0620515A1 (de) * 1993-04-14 1994-10-19 Texas Instruments Deutschland Gmbh Bandgap Referenzspannungsquelle
US5453679A (en) * 1994-05-12 1995-09-26 National Semiconductor Corporation Bandgap voltage and current generator circuit for generating constant reference voltage independent of supply voltage, temperature and semiconductor processing
US5469111A (en) * 1994-08-24 1995-11-21 National Semiconductor Corporation Circuit for generating a process variation insensitive reference bias current
US6016051A (en) * 1998-09-30 2000-01-18 National Semiconductor Corporation Bandgap reference voltage circuit with PTAT current source
EP1041480A1 (de) * 1999-03-29 2000-10-04 Texas Instruments Incorporated Bandgap Spannungsregler mit Krümmungskorrekturschaltung

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1301803B1 (it) * 1998-06-25 2000-07-07 St Microelectronics Srl Circuito regolatore di band-gap per produrre un riferimento ditensione avente una compensazione in temperatura degli effetti di
US6150872A (en) * 1998-08-28 2000-11-21 Lucent Technologies Inc. CMOS bandgap voltage reference
US6133719A (en) * 1999-10-14 2000-10-17 Cirrus Logic, Inc. Robust start-up circuit for CMOS bandgap reference
DE10047620B4 (de) * 2000-09-26 2012-01-26 Infineon Technologies Ag Schaltung zum Erzeugen einer Referenzspannung auf einem Halbleiterchip
US6570371B1 (en) * 2002-01-02 2003-05-27 Intel Corporation Apparatus and method of mirroring a voltage to a different reference voltage point

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4224584A1 (de) * 1992-07-22 1994-01-27 Mikroelektronik Und Technologi Hochgenaue Referenzspannungsquelle
EP0620515A1 (de) * 1993-04-14 1994-10-19 Texas Instruments Deutschland Gmbh Bandgap Referenzspannungsquelle
US5453679A (en) * 1994-05-12 1995-09-26 National Semiconductor Corporation Bandgap voltage and current generator circuit for generating constant reference voltage independent of supply voltage, temperature and semiconductor processing
US5469111A (en) * 1994-08-24 1995-11-21 National Semiconductor Corporation Circuit for generating a process variation insensitive reference bias current
US6016051A (en) * 1998-09-30 2000-01-18 National Semiconductor Corporation Bandgap reference voltage circuit with PTAT current source
EP1041480A1 (de) * 1999-03-29 2000-10-04 Texas Instruments Incorporated Bandgap Spannungsregler mit Krümmungskorrekturschaltung

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8324944B2 (en) 2009-05-29 2012-12-04 Stmicroelectronics Design And Application S.R.O. Startup circuitry and corresponding method for providing a startup correction to a main circuit connected to a startup circuitry

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US20030137287A1 (en) 2003-07-24
FR2834086A1 (fr) 2003-06-27

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