EP1315063A1 - Schwellenspannungunabhängige Stromreferenz eines MOS Transistors - Google Patents
Schwellenspannungunabhängige Stromreferenz eines MOS Transistors Download PDFInfo
- Publication number
- EP1315063A1 EP1315063A1 EP01640008A EP01640008A EP1315063A1 EP 1315063 A1 EP1315063 A1 EP 1315063A1 EP 01640008 A EP01640008 A EP 01640008A EP 01640008 A EP01640008 A EP 01640008A EP 1315063 A1 EP1315063 A1 EP 1315063A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- mos transistor
- drain
- gate
- source
- coupled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/262—Current mirrors using field-effect transistors only
Definitions
- the invention relates to a current reference circuit, and more particularly, to a threshold voltage-independent MOS current reference circuit.
- V th threshold voltage
- U. S. Patent 5,739,682 to Kay describes a reference substantially independent of the threshold voltage of the transistor providing the reference.
- a pair of MOS transistors has gate voltages made equal.
- the current through the first transistor is very small.
- the current through the second transistor is equal to the first current multiplied by a scaling factor. Since the first current is so small, the second current through the second transistor is essentially not dependent upon the threshold voltage.
- U.S. Patent 5,910,749 to Kimura teaches a current reference with no temperature dependence. Both bipolar and MOS embodiments are disclosed.
- U.S. Patent 4,723,108 to Murphy et al describes a circuit to compensate for MOS transistor performance changing over temperature and manufacturing variation.
- a principal object of the present invention is to provide an effective and very manufacturable current reference circuit.
- a further object of the present invention is to provide a current reference circuit comprising MOS devices.
- a still further object of the present invention is to provide an MOS current reference circuit that is independent of the threshold voltage to thereby reduce reference current variation due to processing variation.
- Another still further object of the present invention is to provide a nearly zero temperature coefficient current reference using this novel MOS current reference circuit.
- a new current reference circuit is achieved.
- This current reference circuit uses MOS transistors.
- the circuit comprises, first, a first MOS transistor having gate, drain, and source.
- a gate voltage value is coupled from the gate to the source.
- a second MOS transistor has gate, drain, and source.
- the second MOS transistor is of the same size and type as the first MOS transistor.
- the source is coupled to the first MOS transistor source.
- the gate voltage value plus a delta voltage value is coupled from the gate to the source.
- a means is provided for forcing a drain voltage value from the drain to the source of the first MOS transistor and from the drain to the source of the second MOS transistor.
- the first MOS transistor and the second MOS transistor conduct drain currents in the linear mode. Finally, a means is provided for subtracting the first MOS transistor drain current from the second MOS transistor drain current to thereby create a current reference value.
- the current reference value does not depend upon the threshold voltage of the first and second MOS transistors.
- the circuit may be further applied to create a nearly zero temperature coefficient current reference.
- the preferred embodiments disclose the novel current reference circuit of the present invention.
- a matched pair of NMOS transistors is used to create the threshold voltage-independent current reference.
- a matched pair of PMOS transistors is used in an inverted version of the present invention.
- the invention is applied to a near zero temperature coefficient (TC) current reference.
- TC temperature coefficient
- the circuit comprises a matching pair of MOS transistors, N1 10 and N2 14.
- Each transistor, N1 10 and N2 14, is of the same type and size, and more preferably, is oriented in the same layout direction.
- the novel technique of the invention eliminates V th from the current reference final value, other parameters, such as mobility, or ⁇ o , and gate capacitance, C ox , should still be made to match as closely a possible between the two transistors.
- a significant advantage of the present invention is the elimination of the V th dependence in the current reference. By comparison, ⁇ o and C ox process variance is found to be much less than that of V th .
- the first MOS transistor, N1 10, has a gate voltage value, V 1 26, coupled from the gate to the source.
- the second MOS transistor, N2 14, has the source coupled to the first MOS transistor source at the V ss node 42.
- a second gate voltage value, V 2 30, is coupled from the gate to the source of N2 14.
- the second gate voltage value, V 2 30, comprises the first gate voltage value, V 1 26, plus a delta voltage value, ⁇ V.
- a means is provided for forcing a drain voltage value, V D 34 and 38, from the drain to the source of the first MOS transistor, N1 10, and from the drain to the source of the second MOS transistor, N2 14.
- both transistors, 10 and 14 are biased to operate in the linear mode.
- the gate voltages, V 1 26 and V 2 30, are much larger than the drain voltage, V D 34 and 38.
- I D ( ⁇ o C ox W/L)(V G -V th -V D /2)V D , where W/L is the width to length ratio.
- the gate voltages must be larger than the threshold voltage to insure that both transistors are in strong inversion.
- the first MOS transistor, N1 10 generates a current, I 1 .
- the second MOS transistor, N2 14, generates a current, I 2 .
- a means, 18, is provided for subtracting the first MOS transistor N1 10 drain current I 1 from the second MOS transistor N2 14 drain current I 2 to thereby create a current reference value, I REF .
- I 1 ( ⁇ o C ox W/L) (V 1 -V th -V D /2)V D
- I 2 ( ⁇ o C ox W/L) (V 1 + ⁇ V-V th -V D /2)V D
- I REF I 2 -I 1
- I REF ( ⁇ o C ox W/L) ( ⁇ V)V D .
- V th term has been canceled. Therefore, the resulting current reference value does not depend on the threshold voltage. Since the resulting reference does still depend upon both mobility and gate capacitance, I REF is also called I ⁇ Cox .
- the matched NMOS transistor pair comprises N1 50 and N2 54.
- the sources of N1 and N2 are coupled together while the gates are coupled to V 1 and V 1 + ⁇ V such that the gate drive differs by the delta voltage, ⁇ V.
- the gate voltages, V 1 and V 1 + ⁇ V are biased much higher than the drain voltage, V D , so that the MOS devices are operating in the linear mode.
- the means to force the drain voltage value, V D 34 and 38, from the drain to the source of both N1 and N2 14 is provided by two voltage followers comprising the operation amplifiers 74 and 78 and the output transistors, N3 66 and N4 70. Due to the large input impedance and the high gain of the operation amplifiers 74 and 78, the drain voltages, V D1 and V D2 are guaranteed to be driven to the reference drain voltage value, V D 82. Further, the voltage follower arrangement isolates the drain reference voltage, V D , from the actual drains of the first and second MOS transistors, N1 50 and N2 54.
- the means for subtracting the drain currents, I 1 and I 2 is provided by the PMOS transistors, P1 90, P2 94, P3 98, and P4 102.
- the gate and drain of P1 90 are coupled together and further coupled to the gate of P2 94 at the node A 106.
- P1 90 and P2 94 are the same type of device and are the same size.
- the sources of P1 90 and P2 94 are coupled together at V CC 118. Therefore, P1 90 and P2 94 form a current mirror. Since P1 90 must conduct I 1 , the mirror configuration causes P2 94 to likewise conduct a drain current of I 1 .
- MOS transistors P3 98 and P4 102 form a second current mirror. Once again, the gate and drain of P3 98 are coupled together and further coupled to the gate of P4 102. P3 98 and P4 102 are another matched pair. Therefore, the drain current of P3 98 is mirrored by the drain current of P4 102.
- the drain of P3 98 is coupled to the drain of P2 94 at node B 110.
- the greater gate drive (V 1 + ⁇ V) on N2 54 creates a drain current, I 2 , which is larger than the drain current I 1 of N1 50.
- P2 94 is biased to conduct only I 1
- P3 98 will conduct the difference between I 1 and I 2 . Therefore, the P3 98 current is given by I 2 -I 1 .
- the P3 current is simply mirrored to the output current reference as I 2 -I 1 . As shown above, the subtraction of I 2 from I 1 effectively eliminates the V th term from the output current, I ⁇ Cox .
- the second preferred embodiment of the present invention is illustrated.
- the circuit is inverted such that the main mirroring devices comprise the PMOS transistors P1 216 and P2 220.
- the analysis of operation of the circuit is the same as for the first embodiment of Fig. 2.
- the output current reference, I ⁇ Cox is a sinking current rather than a sourcing current as in Fig. 2.
- TC temperature coefficient
- a first voltage-threshold independent current reference 304 is used to form a positive temperature coefficient current reference circuit 304.
- the gate voltage for the voltage-threshold independent current reference 304 comprises a positive temperature coefficient value.
- the delta voltage value, ⁇ V 328 comprises a positive temperature coefficient value, mV T where V T is the thermal voltage and m is a constant.
- the drain voltage value, V D 324 comprises another positive temperature coefficient value, kV T , where k is another constant.
- a second voltage-threshold independent current reference 300 is used to form a negative temperature coefficient current reference circuit 300.
- the gate voltage for the voltage-threshold independent current reference 300 comprises a negative temperature coefficient value.
- the delta voltage value, ⁇ V 320 comprises a negative temperature coefficient value, V BG /n, where V BG is a bandgap voltage and n is a constant.
- the drain voltage value, V D 324 again comprises a positive temperature coefficient value, kV T , where k is a constant.
- the current reference value output by the circuit 300 comprises a negative temperature coefficient current reference value, I ZTC .
- the mobility, ⁇ o of the transistor varies as (T) -3/2
- V T varies as (T) 1 .
- the bandgap voltage, V BG )/n does not significantly vary with T. Therefore, the reference current, I NTC , for the negative current reference 300 varies as (T) -1/2 .
- a means is provided for adding the positive temperature coefficient current reference value, I PTC , and the negative temperature coefficient current reference value, I NTC , to thereby obtain a nearly zero temperature coefficient current reference, I ZTC .
- the adding means preferably comprises the current mirror circuit comprising the matching devices, N5 308 and N6 312.
- the gate and drain of N5 308 are coupled together and further coupled to the gate of N6 312 at the node C 332.
- the sources of N5 308 and N6 312 are coupled together such that a common gate-to-source voltage is obtained.
- the drain of N5 308 is further coupled to the current reference outputs of the current reference circuits 300 and 304.
- the positive temperature coefficient current reference value, I PTC , and the negative temperature coefficient current reference value, I NTC are added together to create the zero TC reference, I ZTC , as the drain current of N5. This current, I ZTC , is mirrored to the output, OUT 336, by N6.
- I ZTC I PTC + I NTC .
- I REF ( ⁇ o C ox W/L) [mV T + (VBG) /n)](V T ).
- V BG /n mV T , where temperature is T o at the zero slope point.
- the response graph 350 shows how the output current source varies over temperature.
- the derivative zero indicates the point of zero slope at T o .
- FIG. 6 an exemplary circuit for deriving the mV T and kV T voltages is illustrated.
- This circuit is well known in the art.
- the current mirror created by P1 400 and P2 404 is matched such that I 1 is the drain current of both P1 and P2.
- N1 412 and N2 416 are operated in weak inversion such that the drain current is exponentially proportional to the drain voltage.
- N2 is scaled from N1 at a ratio given by the constant C.
- the present invention provides a unique and advantageous current reference circuit.
- the unique configuration eliminates dependence on the threshold voltage to improve performance. Further, the simplicity of the scheme means that the circuits are stable, effective at low power levels, and space efficient. An effective and very manufacturable current reference circuit is achieved.
- the current reference circuit comprises all MOS devices. The MOS current reference circuit is not dependent upon the threshold voltage, and this reduces reference current variation due to processing variation. Finally, a nearly zero temperature coefficient current reference is achieved using this novel MOS current reference circuit.
- the novel current reference circuit provides an effective and manufacturable alternative to the prior art.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Amplifiers (AREA)
- Control Of Electrical Variables (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP01640008A EP1315063A1 (de) | 2001-11-14 | 2001-11-14 | Schwellenspannungunabhängige Stromreferenz eines MOS Transistors |
US10/002,982 US6570436B1 (en) | 2001-11-14 | 2001-11-30 | Threshold voltage-independent MOS current reference |
US10/426,530 US6667653B2 (en) | 2001-11-14 | 2003-04-30 | Threshold voltage-independent MOS current reference |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP01640008A EP1315063A1 (de) | 2001-11-14 | 2001-11-14 | Schwellenspannungunabhängige Stromreferenz eines MOS Transistors |
Publications (1)
Publication Number | Publication Date |
---|---|
EP1315063A1 true EP1315063A1 (de) | 2003-05-28 |
Family
ID=8183581
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP01640008A Withdrawn EP1315063A1 (de) | 2001-11-14 | 2001-11-14 | Schwellenspannungunabhängige Stromreferenz eines MOS Transistors |
Country Status (2)
Country | Link |
---|---|
US (2) | US6570436B1 (de) |
EP (1) | EP1315063A1 (de) |
Families Citing this family (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003202925A (ja) * | 2001-11-26 | 2003-07-18 | Em Microelectronic Marin Sa | 高電圧用途のための定電流源回路 |
DE10222307A1 (de) * | 2002-05-18 | 2003-12-04 | Atmel Germany Gmbh | Verfahren zur Erzeugung eines Ausgangsstromes mit einem vorgegebenen Temperaturkoeffizienten |
US6798182B2 (en) * | 2002-09-09 | 2004-09-28 | Koniklijke Philips Electronics N.V. | High output impedance current mirror with superior output voltage compliance |
JP4091410B2 (ja) * | 2002-12-05 | 2008-05-28 | 富士通株式会社 | 半導体集積回路 |
US6909310B2 (en) * | 2003-01-30 | 2005-06-21 | Agilent Technologies, Inc. | CMOS controlled-impedance transmission line driver |
JP2004318235A (ja) * | 2003-04-11 | 2004-11-11 | Renesas Technology Corp | 基準電圧発生回路 |
US6946896B2 (en) * | 2003-05-29 | 2005-09-20 | Broadcom Corporation | High temperature coefficient MOS bias generation circuit |
KR100493174B1 (ko) * | 2003-06-16 | 2005-06-02 | 삼성전자주식회사 | 주파수 분주기용 기준 전압 발생기 및 그 방법 |
US7042205B2 (en) * | 2003-06-27 | 2006-05-09 | Macronix International Co., Ltd. | Reference voltage generator with supply voltage and temperature immunity |
JP4263068B2 (ja) * | 2003-08-29 | 2009-05-13 | 株式会社リコー | 定電圧回路 |
US6975101B1 (en) | 2003-11-19 | 2005-12-13 | Fairchild Semiconductor Corporation | Band-gap reference circuit with high power supply ripple rejection ratio |
JP3967722B2 (ja) * | 2004-01-15 | 2007-08-29 | 株式会社東芝 | 半導体装置 |
US7064602B2 (en) * | 2004-05-05 | 2006-06-20 | Rambus Inc. | Dynamic gain compensation and calibration |
JP2006018663A (ja) * | 2004-07-02 | 2006-01-19 | Fujitsu Ltd | 電流安定化回路、電流安定化方法、及び固体撮像装置 |
US20060125547A1 (en) * | 2004-07-27 | 2006-06-15 | Mohammad Maymandi-Nejad | Adjustable and programmable temperature coefficient-proportional to absolute temperature (APTC-PTAT) circuit |
DE102004062357A1 (de) * | 2004-12-14 | 2006-07-06 | Atmel Germany Gmbh | Versorgungsschaltung zur Erzeugung eines Referenzstroms mit vorgebbarer Temperaturabhängigkeit |
US7382179B2 (en) * | 2005-01-03 | 2008-06-03 | Geller Joseph M | Voltage reference with enhanced stability |
US7362084B2 (en) * | 2005-03-14 | 2008-04-22 | Silicon Storage Technology, Inc. | Fast voltage regulators for charge pumps |
JP2007065831A (ja) * | 2005-08-30 | 2007-03-15 | Sanyo Electric Co Ltd | 定電流回路 |
US7554387B1 (en) * | 2008-02-27 | 2009-06-30 | National Semiconductor Corporation | Precision on chip bias current generation |
TWI372957B (en) * | 2008-05-20 | 2012-09-21 | Novatek Microelectronics Corp | Current generator |
US20100259315A1 (en) * | 2009-04-08 | 2010-10-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Circuit and Methods for Temperature Insensitive Current Reference |
WO2011044421A1 (en) * | 2009-10-08 | 2011-04-14 | C. R. Bard, Inc. | Spacers for use with an ultrasound probe |
US8188785B2 (en) | 2010-02-04 | 2012-05-29 | Semiconductor Components Industries, Llc | Mixed-mode circuits and methods of producing a reference current and a reference voltage |
US8878511B2 (en) * | 2010-02-04 | 2014-11-04 | Semiconductor Components Industries, Llc | Current-mode programmable reference circuits and methods therefor |
US8680840B2 (en) * | 2010-02-11 | 2014-03-25 | Semiconductor Components Industries, Llc | Circuits and methods of producing a reference current or voltage |
CN103955252B (zh) * | 2014-04-14 | 2015-09-09 | 中国科学院微电子研究所 | 三维存储器的参考电流产生电路及其产生参考电流的方法 |
CN109857183A (zh) * | 2019-03-26 | 2019-06-07 | 成都锐成芯微科技股份有限公司 | 一种带温度补偿的基准电流源 |
Citations (7)
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US4442398A (en) * | 1980-11-14 | 1984-04-10 | Societe Pour L'etude Et La Fabrication De Circuits Integres Speciaux-E.F.C.I.S. | Integrated circuit generator in CMOS technology |
EP0356570A1 (de) * | 1988-09-02 | 1990-03-07 | Siemens Aktiengesellschaft | Stromspiegel |
EP0720078A1 (de) * | 1994-12-30 | 1996-07-03 | Co.Ri.M.Me. | Verfahren zur Spannungsschwelleextraktierung und Schaltung nach dem Verfahren |
EP0778509A1 (de) * | 1995-12-06 | 1997-06-11 | International Business Machines Corporation | Temperaturkompensierter Referenzstromgenerator mit Widerständen mit grossen Temperaturkoeffizienten |
EP0778510A1 (de) * | 1995-12-06 | 1997-06-11 | International Business Machines Corporation | Hochsymmetrische bidirektionale Stromquelle |
US5774013A (en) * | 1995-11-30 | 1998-06-30 | Rockwell Semiconductor Systems, Inc. | Dual source for constant and PTAT current |
US6087820A (en) * | 1999-03-09 | 2000-07-11 | Siemens Aktiengesellschaft | Current source |
Family Cites Families (7)
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US4723108A (en) | 1986-07-16 | 1988-02-02 | Cypress Semiconductor Corporation | Reference circuit |
US5043652A (en) * | 1990-10-01 | 1991-08-27 | Motorola, Inc. | Differential voltage to differential current conversion circuit having linear output |
US5315230A (en) | 1992-09-03 | 1994-05-24 | United Memories, Inc. | Temperature compensated voltage reference for low and wide voltage ranges |
US5739682A (en) | 1994-01-25 | 1998-04-14 | Texas Instruments Incorporated | Circuit and method for providing a reference circuit that is substantially independent of the threshold voltage of the transistor that provides the reference circuit |
JP2836547B2 (ja) | 1995-10-31 | 1998-12-14 | 日本電気株式会社 | 基準電流回路 |
US6054874A (en) * | 1997-07-02 | 2000-04-25 | Cypress Semiconductor Corp. | Output driver circuit with switched current source |
US6362613B1 (en) * | 2000-11-13 | 2002-03-26 | Gain Technology Corporation | Integrated circuit with improved current mirror impedance and method of operation |
-
2001
- 2001-11-14 EP EP01640008A patent/EP1315063A1/de not_active Withdrawn
- 2001-11-30 US US10/002,982 patent/US6570436B1/en not_active Expired - Lifetime
-
2003
- 2003-04-30 US US10/426,530 patent/US6667653B2/en not_active Expired - Lifetime
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4442398A (en) * | 1980-11-14 | 1984-04-10 | Societe Pour L'etude Et La Fabrication De Circuits Integres Speciaux-E.F.C.I.S. | Integrated circuit generator in CMOS technology |
EP0356570A1 (de) * | 1988-09-02 | 1990-03-07 | Siemens Aktiengesellschaft | Stromspiegel |
EP0720078A1 (de) * | 1994-12-30 | 1996-07-03 | Co.Ri.M.Me. | Verfahren zur Spannungsschwelleextraktierung und Schaltung nach dem Verfahren |
US5774013A (en) * | 1995-11-30 | 1998-06-30 | Rockwell Semiconductor Systems, Inc. | Dual source for constant and PTAT current |
EP0778509A1 (de) * | 1995-12-06 | 1997-06-11 | International Business Machines Corporation | Temperaturkompensierter Referenzstromgenerator mit Widerständen mit grossen Temperaturkoeffizienten |
EP0778510A1 (de) * | 1995-12-06 | 1997-06-11 | International Business Machines Corporation | Hochsymmetrische bidirektionale Stromquelle |
US6087820A (en) * | 1999-03-09 | 2000-07-11 | Siemens Aktiengesellschaft | Current source |
Also Published As
Publication number | Publication date |
---|---|
US20030090314A1 (en) | 2003-05-15 |
US6667653B2 (en) | 2003-12-23 |
US6570436B1 (en) | 2003-05-27 |
US20030197550A1 (en) | 2003-10-23 |
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