DE69840609D1 - Anisotropes Ätzen organischer Isolierschichten - Google Patents
Anisotropes Ätzen organischer IsolierschichtenInfo
- Publication number
- DE69840609D1 DE69840609D1 DE69840609T DE69840609T DE69840609D1 DE 69840609 D1 DE69840609 D1 DE 69840609D1 DE 69840609 T DE69840609 T DE 69840609T DE 69840609 T DE69840609 T DE 69840609T DE 69840609 D1 DE69840609 D1 DE 69840609D1
- Authority
- DE
- Germany
- Prior art keywords
- insulating layers
- organic insulating
- anisotropic etching
- anisotropic
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000005530 etching Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/004—Photosensitive materials
- G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
- G03F7/094—Multilayer resist systems, e.g. planarising layers
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/36—Imagewise removal not covered by groups G03F7/30 - G03F7/34, e.g. using gas streams, using plasma
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/38—Treatment before imagewise removal, e.g. prebaking
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/40—Treatment after imagewise removal, e.g. baking
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/40—Treatment after imagewise removal, e.g. baking
- G03F7/405—Treatment with inorganic or organometallic reagents after imagewise removal
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
- H01L21/7681—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving one or more buried masks
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Architecture (AREA)
- Structural Engineering (AREA)
- Inorganic Chemistry (AREA)
- Organic Chemistry (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US6348797P | 1997-10-22 | 1997-10-22 | |
US7452498P | 1998-02-12 | 1998-02-12 | |
EP98870111A EP0911697A3 (de) | 1997-10-22 | 1998-05-18 | Fluorierte harte Maske für die Mikrostrukturierung von Polymeren |
Publications (1)
Publication Number | Publication Date |
---|---|
DE69840609D1 true DE69840609D1 (de) | 2009-04-09 |
Family
ID=40418453
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69840609T Expired - Lifetime DE69840609D1 (de) | 1997-10-22 | 1998-10-22 | Anisotropes Ätzen organischer Isolierschichten |
Country Status (3)
Country | Link |
---|---|
US (2) | US6844267B1 (de) |
JP (1) | JP5433374B2 (de) |
DE (1) | DE69840609D1 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2000079586A1 (fr) * | 1999-06-24 | 2000-12-28 | Hitachi, Ltd. | Procede de production de dispositif a circuit integre semi-conducteur et dispositif a circuit integre semi-conducteur |
JP3400770B2 (ja) * | 1999-11-16 | 2003-04-28 | 松下電器産業株式会社 | エッチング方法、半導体装置及びその製造方法 |
US6864628B2 (en) * | 2000-08-28 | 2005-03-08 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device comprising light-emitting layer having triplet compound and light-emitting layer having singlet compound |
US7875506B2 (en) * | 2004-10-13 | 2011-01-25 | Semiconductor Energy Laboratory Co., Ltd. | Etching method and manufacturing method of semiconductor device |
KR100838394B1 (ko) * | 2007-01-03 | 2008-06-13 | 주식회사 하이닉스반도체 | 하드마스크층을 이용한 반도체소자의 식각 방법 |
JP6578570B2 (ja) | 2015-03-03 | 2019-09-25 | 国立大学法人大阪大学 | Iii族窒化物半導体結晶基板の製造方法 |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3816196A (en) | 1971-06-07 | 1974-06-11 | Gen Electric | Passivation of photoresist materials used in selective plasma etching |
JPH0622212B2 (ja) * | 1983-05-31 | 1994-03-23 | 株式会社東芝 | ドライエッチング方法 |
US4661204A (en) | 1985-10-25 | 1987-04-28 | Tandem Computers Inc. | Method for forming vertical interconnects in polyimide insulating layers |
US5358902A (en) | 1989-06-26 | 1994-10-25 | U.S. Philips Corporation | Method of producing conductive pillars in semiconductor device |
US5173442A (en) | 1990-07-23 | 1992-12-22 | Microelectronics And Computer Technology Corporation | Methods of forming channels and vias in insulating layers |
JPH0491433A (ja) * | 1990-08-02 | 1992-03-24 | Fuji Xerox Co Ltd | 多層レジストおよびそのエッチング方法 |
JPH04287919A (ja) * | 1991-02-07 | 1992-10-13 | Mitsubishi Electric Corp | ドライエッチング終点検出方法および装置 |
JPH04306830A (ja) * | 1991-04-03 | 1992-10-29 | Fuji Xerox Co Ltd | 半導体装置の製造方法 |
US5176790A (en) | 1991-09-25 | 1993-01-05 | Applied Materials, Inc. | Process for forming a via in an integrated circuit structure by etching through an insulation layer while inhibiting sputtering of underlying metal |
US5269879A (en) | 1991-10-16 | 1993-12-14 | Lam Research Corporation | Method of etching vias without sputtering of underlying electrically conductive layer |
US5442237A (en) * | 1991-10-21 | 1995-08-15 | Motorola Inc. | Semiconductor device having a low permittivity dielectric |
JPH05121371A (ja) * | 1991-10-25 | 1993-05-18 | Nec Corp | 半導体装置の製造方法 |
RU2024991C1 (ru) | 1992-06-11 | 1994-12-15 | Научно-исследовательский институт молекулярной электроники | Способ плазменного травления контактных окон в изолирующих и пассивирующих слоях диэлектриков на основе кремния |
JP3465444B2 (ja) * | 1995-10-13 | 2003-11-10 | ソニー株式会社 | プラズマエッチング方法 |
JP3469976B2 (ja) * | 1995-10-19 | 2003-11-25 | 三菱電機株式会社 | 多層配線の形成方法 |
US5886410A (en) * | 1996-06-26 | 1999-03-23 | Intel Corporation | Interconnect structure with hard mask and low dielectric constant materials |
JP3309717B2 (ja) | 1996-06-26 | 2002-07-29 | 三菱電機株式会社 | 集積回路の配線の製造方法 |
US5759906A (en) * | 1997-04-11 | 1998-06-02 | Industrial Technology Research Institute | Planarization method for intermetal dielectrics between multilevel interconnections on integrated circuits |
US5904154A (en) * | 1997-07-24 | 1999-05-18 | Vanguard International Semiconductor Corporation | Method for removing fluorinated photoresist layers from semiconductor substrates |
JP3959790B2 (ja) * | 1997-08-26 | 2007-08-15 | ソニー株式会社 | 半導体装置の製造方法 |
US6204168B1 (en) * | 1998-02-02 | 2001-03-20 | Applied Materials, Inc. | Damascene structure fabricated using a layer of silicon-based photoresist material |
US6162583A (en) * | 1998-03-20 | 2000-12-19 | Industrial Technology Research Institute | Method for making intermetal dielectrics (IMD) on semiconductor integrated circuits using low dielectric constant spin-on polymers |
US6492276B1 (en) * | 1998-05-29 | 2002-12-10 | Taiwan Semiconductor Manufacturing Company | Hard masking method for forming residue free oxygen containing plasma etched layer |
-
1998
- 1998-10-22 DE DE69840609T patent/DE69840609D1/de not_active Expired - Lifetime
- 1998-10-22 US US09/530,069 patent/US6844267B1/en not_active Expired - Lifetime
-
2004
- 2004-03-12 US US10/800,216 patent/US6900140B2/en not_active Expired - Lifetime
-
2009
- 2009-10-21 JP JP2009242713A patent/JP5433374B2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US6844267B1 (en) | 2005-01-18 |
US6900140B2 (en) | 2005-05-31 |
JP5433374B2 (ja) | 2014-03-05 |
JP2010050477A (ja) | 2010-03-04 |
US20040175945A1 (en) | 2004-09-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69821802T2 (de) | Anisotropes ätzen organischer isolierschichten | |
DE69622392D1 (de) | Herstellung organischer elektrolumineszenter vorrichtungen | |
DE69811303D1 (de) | Elektrolumineszente Vorrichtungen | |
DE69632628D1 (de) | Pulsoximetrie einer isolierten schicht | |
DE69809617D1 (de) | Elektrolumineszente Vorrichtungen | |
DE69836011D1 (de) | Piezoelektrische dünnschichtanordnung | |
DE69715411D1 (de) | Elektrische bohrlochmessung einer erdschichtformation | |
ID23867A (id) | Lapisan penyekat-panas | |
DE69710135D1 (de) | Blauorganische Elektrolumineszenzvorrichtungen | |
DE69815576D1 (de) | Organisches elektrolumineszentes Bauteil | |
NO20013965L (no) | Aktivering av nedihullsanordninger | |
DE10195877T1 (de) | Schichtmikrophonaufbau | |
DE69800778D1 (de) | Schneidklemmkontakt | |
DE60032425D1 (de) | Ätzvorrichtung | |
DE69827388D1 (de) | Hochspannungsverträgliche abstandshalterschicht | |
DE69840609D1 (de) | Anisotropes Ätzen organischer Isolierschichten | |
FI974198A0 (fi) | Generering av startvaerde | |
FI981673A (fi) | Ohutkalvorakenteiden eristekalvo | |
DE69928197D1 (de) | Atzverfahren | |
FI19991831A (fi) | Eristysmateriaalien pinnoite | |
FI974212A (fi) | Eristin | |
DE69803623D1 (de) | Dielektrische Keramiken | |
NO20000362D0 (no) | List med innlagte elektriske ledninger | |
DE59802178D1 (de) | Abisoliervorrichtung | |
IT1306973B1 (it) | Procedimento per la realizzazione di strutture di isolamento percircuiti integrati. |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |