DE69737783D1 - Verfahren zur Herstellung eines Halbleiterspeicherbauteils - Google Patents
Verfahren zur Herstellung eines HalbleiterspeicherbauteilsInfo
- Publication number
- DE69737783D1 DE69737783D1 DE69737783T DE69737783T DE69737783D1 DE 69737783 D1 DE69737783 D1 DE 69737783D1 DE 69737783 T DE69737783 T DE 69737783T DE 69737783 T DE69737783 T DE 69737783T DE 69737783 D1 DE69737783 D1 DE 69737783D1
- Authority
- DE
- Germany
- Prior art keywords
- manufacturing
- memory device
- semiconductor memory
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/48—Data lines or contacts therefor
- H10B12/485—Bit line contacts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
- H10B12/0335—Making a connection between the transistor and the capacitor, e.g. plug
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
- H10B12/315—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with the capacitor higher than a bit line
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR9650492 | 1996-10-30 | ||
KR1019960050492A KR100200748B1 (ko) | 1996-10-30 | 1996-10-30 | 반도체장치의 제조방법 |
KR9669320 | 1996-12-20 | ||
KR1019960069320A KR100230396B1 (en) | 1996-12-20 | 1996-12-20 | Semiconductor device making method |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69737783D1 true DE69737783D1 (de) | 2007-07-19 |
DE69737783T2 DE69737783T2 (de) | 2008-02-28 |
Family
ID=26632242
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69737783T Expired - Lifetime DE69737783T2 (de) | 1996-10-30 | 1997-10-29 | Verfahren zur Herstellung eines Halbleiterspeicherbauteils |
Country Status (7)
Country | Link |
---|---|
US (2) | US6071802A (de) |
EP (3) | EP1684343A3 (de) |
JP (2) | JPH10135333A (de) |
CN (2) | CN1123927C (de) |
DE (1) | DE69737783T2 (de) |
RU (1) | RU2190897C2 (de) |
TW (1) | TW405236B (de) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6649308B1 (en) * | 1998-03-30 | 2003-11-18 | Texas Instruments-Acer Incorporated | Ultra-short channel NMOSFETS with self-aligned silicide contact |
US6342419B1 (en) * | 1999-04-19 | 2002-01-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | DRAM capacitor and a method of fabricating the same |
KR100351890B1 (ko) * | 1999-05-08 | 2002-09-12 | 주식회사 하이닉스반도체 | 반도체 소자의 플러그층 형성 방법 |
KR100334393B1 (ko) * | 1999-06-30 | 2002-05-03 | 박종섭 | 반도체소자의 제조방법 |
TW417245B (en) * | 1999-07-16 | 2001-01-01 | Taiwan Semiconductor Mfg | Method of producing bitline |
KR100331848B1 (ko) * | 1999-07-20 | 2002-04-09 | 박종섭 | 반도체 소자의 콘택 패드 형성 방법 |
KR100366620B1 (ko) * | 1999-09-02 | 2003-01-09 | 삼성전자 주식회사 | 자기정합 콘택을 갖는 반도체 메모리장치 및 그 제조방법 |
JP2001102550A (ja) * | 1999-09-02 | 2001-04-13 | Samsung Electronics Co Ltd | 自己整合コンタクトを有する半導体メモリ装置及びその製造方法 |
JP4667551B2 (ja) * | 1999-10-19 | 2011-04-13 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US20050026412A1 (en) * | 2000-06-16 | 2005-02-03 | Drynan John M. | Interconnect line selectively isolated from an underlying contact plug |
US6511879B1 (en) | 2000-06-16 | 2003-01-28 | Micron Technology, Inc. | Interconnect line selectively isolated from an underlying contact plug |
KR100343148B1 (ko) * | 2000-11-10 | 2002-07-06 | 윤종용 | 반도체 소자의 콘택패드 형성방법 |
JP2002319632A (ja) * | 2001-04-20 | 2002-10-31 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
JP2002319551A (ja) * | 2001-04-23 | 2002-10-31 | Nec Corp | 半導体装置およびその製造方法 |
US6861698B2 (en) * | 2002-01-24 | 2005-03-01 | Silicon Storage Technology, Inc. | Array of floating gate memory cells having strap regions and a peripheral logic device region |
KR100583118B1 (ko) * | 2003-12-19 | 2006-05-23 | 주식회사 하이닉스반도체 | 반도체 소자의 캐패시터 형성방법 |
JP2007294618A (ja) * | 2006-04-24 | 2007-11-08 | Elpida Memory Inc | 半導体装置の製造方法及び半導体装置 |
US7709367B2 (en) * | 2006-06-30 | 2010-05-04 | Hynix Semiconductor Inc. | Method for fabricating storage node contact in semiconductor device |
US7666343B2 (en) * | 2006-10-18 | 2010-02-23 | Polymer Group, Inc. | Process and apparatus for producing sub-micron fibers, and nonwovens and articles containing same |
JP2007158370A (ja) * | 2007-01-31 | 2007-06-21 | Oki Electric Ind Co Ltd | 窒化膜サイドウォール付きゲートを有する半導体装置の製造方法 |
JP2010080798A (ja) * | 2008-09-29 | 2010-04-08 | Renesas Technology Corp | 半導体集積回路装置および半導体集積回路装置の製造方法 |
JP5268618B2 (ja) * | 2008-12-18 | 2013-08-21 | 株式会社東芝 | 半導体装置 |
KR20110120695A (ko) * | 2010-04-29 | 2011-11-04 | 삼성전자주식회사 | 반도체 소자 |
JP5127907B2 (ja) * | 2010-11-11 | 2013-01-23 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US8440533B2 (en) * | 2011-03-04 | 2013-05-14 | Globalfoundries Singapore Pte. Ltd. | Self-aligned contact for replacement metal gate and silicide last processes |
JP5858952B2 (ja) * | 2013-05-20 | 2016-02-10 | 三菱電機株式会社 | 半導体装置の製造方法 |
US9716160B2 (en) | 2014-08-01 | 2017-07-25 | International Business Machines Corporation | Extended contact area using undercut silicide extensions |
US9431455B2 (en) * | 2014-11-09 | 2016-08-30 | Tower Semiconductor, Ltd. | Back-end processing using low-moisture content oxide cap layer |
US9379194B2 (en) * | 2014-11-09 | 2016-06-28 | Tower Semiconductor Ltd. | Floating gate NVM with low-moisture-content oxide cap layer |
CN106847670A (zh) * | 2017-02-14 | 2017-06-13 | 上海华虹宏力半导体制造有限公司 | 半导体器件的制造方法 |
US11996297B2 (en) * | 2021-08-06 | 2024-05-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of manufacturing a semiconductor device |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61156883A (ja) * | 1984-12-28 | 1986-07-16 | Toshiba Corp | 半導体装置の製造方法 |
US5235199A (en) * | 1988-03-25 | 1993-08-10 | Kabushiki Kaisha Toshiba | Semiconductor memory with pad electrode and bit line under stacked capacitor |
JP3199717B2 (ja) * | 1989-09-08 | 2001-08-20 | 株式会社東芝 | 半導体装置およびその製造方法 |
JPH04181769A (ja) * | 1990-11-15 | 1992-06-29 | Matsushita Electric Ind Co Ltd | 半導体記憶装置およびその製造方法 |
US5137842A (en) * | 1991-05-10 | 1992-08-11 | Micron Technology, Inc. | Stacked H-cell capacitor and process to fabricate same |
US5296400A (en) * | 1991-12-14 | 1994-03-22 | Hyundai Electronics Industries Co., Ltd. | Method of manufacturing a contact of a highly integrated semiconductor device |
KR950000660B1 (ko) * | 1992-02-29 | 1995-01-27 | 현대전자산업 주식회사 | 고집적 소자용 미세콘택 형성방법 |
US5292677A (en) * | 1992-09-18 | 1994-03-08 | Micron Technology, Inc. | Reduced mask CMOS process for fabricating stacked capacitor multi-megabit dynamic random access memories utilizing single etch stop layer for contacts |
KR940016805A (ko) * | 1992-12-31 | 1994-07-25 | 김주용 | 반도체 소자의 적층 캐패시터 제조 방법 |
US5340763A (en) * | 1993-02-12 | 1994-08-23 | Micron Semiconductor, Inc. | Multi-pin stacked capacitor utilizing micro villus patterning in a container cell and method to fabricate same |
KR0161731B1 (ko) * | 1994-10-28 | 1999-02-01 | 김주용 | 반도체소자의 미세콘택 형성방법 |
US5858865A (en) * | 1995-12-07 | 1999-01-12 | Micron Technology, Inc. | Method of forming contact plugs |
US6015986A (en) * | 1995-12-22 | 2000-01-18 | Micron Technology, Inc. | Rugged metal electrodes for metal-insulator-metal capacitors |
-
1997
- 1997-10-29 EP EP06075803A patent/EP1684343A3/de not_active Withdrawn
- 1997-10-29 RU RU97118478/28A patent/RU2190897C2/ru active
- 1997-10-29 EP EP97308636A patent/EP0840371B1/de not_active Expired - Lifetime
- 1997-10-29 DE DE69737783T patent/DE69737783T2/de not_active Expired - Lifetime
- 1997-10-29 EP EP06075802A patent/EP1684342B1/de not_active Expired - Lifetime
- 1997-10-30 JP JP9298970A patent/JPH10135333A/ja active Pending
- 1997-10-30 US US08/961,453 patent/US6071802A/en not_active Expired - Lifetime
- 1997-10-30 CN CN97121269A patent/CN1123927C/zh not_active Expired - Lifetime
- 1997-10-30 TW TW086116225A patent/TW405236B/zh not_active IP Right Cessation
-
2000
- 2000-03-27 US US09/536,216 patent/US6316803B1/en not_active Expired - Lifetime
- 2000-04-11 JP JP2000109865A patent/JP3236001B2/ja not_active Expired - Fee Related
-
2002
- 2002-11-07 CN CNB02150265XA patent/CN1200457C/zh not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0840371B1 (de) | 2007-06-06 |
TW405236B (en) | 2000-09-11 |
EP0840371A3 (de) | 2005-02-16 |
CN1123927C (zh) | 2003-10-08 |
EP1684343A3 (de) | 2010-03-03 |
EP1684343A2 (de) | 2006-07-26 |
US6316803B1 (en) | 2001-11-13 |
DE69737783T2 (de) | 2008-02-28 |
EP1684342A2 (de) | 2006-07-26 |
CN1200457C (zh) | 2005-05-04 |
CN1181628A (zh) | 1998-05-13 |
JP3236001B2 (ja) | 2001-12-04 |
RU2190897C2 (ru) | 2002-10-10 |
EP1684342B1 (de) | 2011-06-01 |
CN1426101A (zh) | 2003-06-25 |
JP2000323573A (ja) | 2000-11-24 |
EP1684342A3 (de) | 2010-03-03 |
JPH10135333A (ja) | 1998-05-22 |
US6071802A (en) | 2000-06-06 |
EP0840371A2 (de) | 1998-05-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |