DE69737172D1 - Herstellungsverfahren für einen Feldeffekttransistor mit isoliertem Gate - Google Patents

Herstellungsverfahren für einen Feldeffekttransistor mit isoliertem Gate

Info

Publication number
DE69737172D1
DE69737172D1 DE69737172T DE69737172T DE69737172D1 DE 69737172 D1 DE69737172 D1 DE 69737172D1 DE 69737172 T DE69737172 T DE 69737172T DE 69737172 T DE69737172 T DE 69737172T DE 69737172 D1 DE69737172 D1 DE 69737172D1
Authority
DE
Germany
Prior art keywords
fabricating
field effect
effect transistor
insulated gate
gate field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69737172T
Other languages
English (en)
Other versions
DE69737172T2 (de
Inventor
Manfred Haue
Max G Levy
Victor Ray Nastasi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
International Business Machines Corp
Original Assignee
Siemens AG
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, International Business Machines Corp filed Critical Siemens AG
Publication of DE69737172D1 publication Critical patent/DE69737172D1/de
Application granted granted Critical
Publication of DE69737172T2 publication Critical patent/DE69737172T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05Making the transistor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE69737172T 1996-07-30 1997-07-15 Herstellungsverfahren für einen Feldeffekttransistor mit isoliertem Gate Expired - Lifetime DE69737172T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US688346 1996-07-30
US08/688,346 US5824580A (en) 1996-07-30 1996-07-30 Method of manufacturing an insulated gate field effect transistor

Publications (2)

Publication Number Publication Date
DE69737172D1 true DE69737172D1 (de) 2007-02-15
DE69737172T2 DE69737172T2 (de) 2008-01-03

Family

ID=24764062

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69737172T Expired - Lifetime DE69737172T2 (de) 1996-07-30 1997-07-15 Herstellungsverfahren für einen Feldeffekttransistor mit isoliertem Gate

Country Status (8)

Country Link
US (1) US5824580A (de)
EP (1) EP0822593B1 (de)
JP (1) JP3422660B2 (de)
KR (1) KR100242409B1 (de)
CN (1) CN1086513C (de)
DE (1) DE69737172T2 (de)
SG (1) SG50863A1 (de)
TW (1) TW353808B (de)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999067817A1 (en) 1998-06-22 1999-12-29 Applied Materials, Inc. Silicon trench etching using silicon-containing precursors to reduce or avoid mask erosion
US6074954A (en) * 1998-08-31 2000-06-13 Applied Materials, Inc Process for control of the shape of the etch front in the etching of polysilicon
US6291298B1 (en) * 1999-05-25 2001-09-18 Advanced Analogic Technologies, Inc. Process of manufacturing Trench gate semiconductor device having gate oxide layer with multiple thicknesses
EP1077475A3 (de) 1999-08-11 2003-04-02 Applied Materials, Inc. Verfahren zur Mikrobearbeitung einer Körperhölung mit mehrfachem Profil
DE19956078B4 (de) * 1999-11-22 2006-12-28 Infineon Technologies Ag Verfahren zur Herstellung eines Isolationskragens in einem Grabenkondensators
KR100545699B1 (ko) * 1999-12-30 2006-01-24 주식회사 하이닉스반도체 반도체 소자의 캐패시터 콘택용 플러그 형성방법
US6833079B1 (en) 2000-02-17 2004-12-21 Applied Materials Inc. Method of etching a shaped cavity
US6509233B2 (en) * 2000-10-13 2003-01-21 Siliconix Incorporated Method of making trench-gated MOSFET having cesium gate oxide layer
US6559030B1 (en) * 2001-12-13 2003-05-06 International Business Machines Corporation Method of forming a recessed polysilicon filled trench
TWI305667B (en) * 2002-10-25 2009-01-21 Nanya Technology Corp Process for filling polysilicon seam
CN1299337C (zh) * 2003-04-29 2007-02-07 旺宏电子股份有限公司 用于非易失性存储器的氧-氮-氧介电层制造方法
US6903011B2 (en) * 2003-06-05 2005-06-07 Taiwan Semiconductor Manufacturing Company, Ltd. Displacement method to grow cu overburden
JP2006093506A (ja) * 2004-09-27 2006-04-06 Sanyo Electric Co Ltd 絶縁ゲート型半導体装置およびその製造方法
US7518179B2 (en) 2004-10-08 2009-04-14 Freescale Semiconductor, Inc. Virtual ground memory array and method therefor
KR100744068B1 (ko) * 2005-04-29 2007-07-30 주식회사 하이닉스반도체 반도체 소자의 트랜지스터 제조 방법
US7642594B2 (en) * 2005-07-25 2010-01-05 Freescale Semiconductor, Inc Electronic device including gate lines, bit lines, or a combination thereof
US7205608B2 (en) * 2005-07-25 2007-04-17 Freescale Semiconductor, Inc. Electronic device including discontinuous storage elements
US7582929B2 (en) * 2005-07-25 2009-09-01 Freescale Semiconductor, Inc Electronic device including discontinuous storage elements
US7285819B2 (en) * 2005-07-25 2007-10-23 Freescale Semiconductor, Inc. Nonvolatile storage array with continuous control gate employing hot carrier injection programming
US7314798B2 (en) * 2005-07-25 2008-01-01 Freescale Semiconductor, Inc. Method of fabricating a nonvolatile storage array with continuous control gate employing hot carrier injection programming
US7256454B2 (en) * 2005-07-25 2007-08-14 Freescale Semiconductor, Inc Electronic device including discontinuous storage elements and a process for forming the same
US7262997B2 (en) * 2005-07-25 2007-08-28 Freescale Semiconductor, Inc. Process for operating an electronic device including a memory array and conductive lines
US7226840B2 (en) * 2005-07-25 2007-06-05 Freescale Semiconductor, Inc. Process for forming an electronic device including discontinuous storage elements
US7250340B2 (en) * 2005-07-25 2007-07-31 Freescale Semiconductor, Inc. Method of fabricating programmable structure including discontinuous storage elements and spacer control gates in a trench
US7619270B2 (en) * 2005-07-25 2009-11-17 Freescale Semiconductor, Inc. Electronic device including discontinuous storage elements
US20070020840A1 (en) * 2005-07-25 2007-01-25 Freescale Semiconductor, Inc. Programmable structure including nanocrystal storage elements in a trench
US7112490B1 (en) * 2005-07-25 2006-09-26 Freescale Semiconductor, Inc. Hot carrier injection programmable structure including discontinuous storage elements and spacer control gates in a trench
US7394686B2 (en) * 2005-07-25 2008-07-01 Freescale Semiconductor, Inc. Programmable structure including discontinuous storage elements and spacer control gates in a trench
US7619275B2 (en) * 2005-07-25 2009-11-17 Freescale Semiconductor, Inc. Process for forming an electronic device including discontinuous storage elements
US7211487B2 (en) * 2005-07-25 2007-05-01 Freescale Semiconductor, Inc. Process for forming an electronic device including discontinuous storage elements
US7592224B2 (en) 2006-03-30 2009-09-22 Freescale Semiconductor, Inc Method of fabricating a storage device including decontinuous storage elements within and between trenches
US7572699B2 (en) * 2007-01-24 2009-08-11 Freescale Semiconductor, Inc Process of forming an electronic device including fins and discontinuous storage elements
US7838922B2 (en) * 2007-01-24 2010-11-23 Freescale Semiconductor, Inc. Electronic device including trenches and discontinuous storage elements
US7651916B2 (en) * 2007-01-24 2010-01-26 Freescale Semiconductor, Inc Electronic device including trenches and discontinuous storage elements and processes of forming and using the same
KR100973276B1 (ko) * 2008-06-27 2010-07-30 주식회사 하이닉스반도체 반도체 소자의 제조방법
CN102315153A (zh) * 2010-07-06 2012-01-11 中芯国际集成电路制造(上海)有限公司 半导体器件浅沟隔离结构的制作方法

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3868793A (en) * 1973-06-18 1975-03-04 Norton Co Internally safety reinforced cup grinding wheel
JPS6043024B2 (ja) * 1978-12-30 1985-09-26 富士通株式会社 半導体装置の製造方法
US4356211A (en) * 1980-12-19 1982-10-26 International Business Machines Corporation Forming air-dielectric isolation regions in a monocrystalline silicon substrate by differential oxidation of polysilicon
IT1211079B (it) * 1981-07-20 1989-09-29 Sibit S P A Ora Tioxide Italia Catalizzatori per reazioni di ossido-riduzione fotoassistite.
JPS58220445A (ja) * 1982-06-16 1983-12-22 Toshiba Corp 半導体集積回路の製造方法
US4797373A (en) * 1984-10-31 1989-01-10 Texas Instruments Incorporated Method of making dRAM cell with trench capacitor
US5164325A (en) * 1987-10-08 1992-11-17 Siliconix Incorporated Method of making a vertical current flow field effect transistor
US4986878A (en) * 1988-07-19 1991-01-22 Cypress Semiconductor Corp. Process for improved planarization of the passivation layers for semiconductor devices
KR910007181B1 (ko) * 1988-09-22 1991-09-19 현대전자산업 주식회사 Sdtas구조로 이루어진 dram셀 및 그 제조방법
US4954854A (en) * 1989-05-22 1990-09-04 International Business Machines Corporation Cross-point lightly-doped drain-source trench transistor and fabrication process therefor
US4989055A (en) * 1989-06-15 1991-01-29 Texas Instruments Incorporated Dynamic random access memory cell
US5078801A (en) * 1990-08-14 1992-01-07 Intel Corporation Post-polish cleaning of oxidized substrates by reverse colloidation
US5358894A (en) * 1992-02-06 1994-10-25 Micron Technology, Inc. Oxidation enhancement in narrow masked field regions of a semiconductor wafer
US5391511A (en) * 1992-02-19 1995-02-21 Micron Technology, Inc. Semiconductor processing method of producing an isolated polysilicon lined cavity and a method of forming a capacitor
US5217919A (en) * 1992-03-19 1993-06-08 Harris Corporation Method of forming island with polysilicon-filled trench isolation
US5292679A (en) * 1992-04-23 1994-03-08 Nippon Steel Corporation Process for producing a semiconductor memory device having memory cells including transistors and capacitors
US5240875A (en) * 1992-08-12 1993-08-31 North American Philips Corporation Selective oxidation of silicon trench sidewall
US5313419A (en) * 1993-02-01 1994-05-17 National Semiconductor Corporation Self-aligned trench isolation scheme for select transistors in an alternate metal virtual ground (AMG) EPROM array
JPH06252153A (ja) * 1993-03-01 1994-09-09 Toshiba Corp 半導体装置の製造方法
US5422294A (en) * 1993-05-03 1995-06-06 Noble, Jr.; Wendell P. Method of making a trench capacitor field shield with sidewall contact
US5316965A (en) * 1993-07-29 1994-05-31 Digital Equipment Corporation Method of decreasing the field oxide etch rate in isolation technology
US5397725A (en) * 1993-10-28 1995-03-14 National Semiconductor Corporation Method of controlling oxide thinning in an EPROM or flash memory array
US5536675A (en) * 1993-12-30 1996-07-16 Intel Corporation Isolation structure formation for semiconductor circuit fabrication
US5448090A (en) * 1994-08-03 1995-09-05 International Business Machines Corporation Structure for reducing parasitic leakage in a memory array with merged isolation and node trench construction
US5426324A (en) * 1994-08-11 1995-06-20 International Business Machines Corporation High capacitance multi-level storage node for high density TFT load SRAMs with low soft error rates

Also Published As

Publication number Publication date
US5824580A (en) 1998-10-20
EP0822593A2 (de) 1998-02-04
EP0822593B1 (de) 2007-01-03
JPH10107227A (ja) 1998-04-24
CN1175087A (zh) 1998-03-04
SG50863A1 (en) 1998-07-20
TW353808B (en) 1999-03-01
JP3422660B2 (ja) 2003-06-30
EP0822593A3 (de) 1998-04-15
KR980012136A (ko) 1998-04-30
DE69737172T2 (de) 2008-01-03
CN1086513C (zh) 2002-06-19
KR100242409B1 (ko) 2000-02-01

Similar Documents

Publication Publication Date Title
DE69737172D1 (de) Herstellungsverfahren für einen Feldeffekttransistor mit isoliertem Gate
EP0676810A3 (de) Feldeffekttransistor mit isolierten Gate und Herstellungsverfahren.
EP0676809A3 (de) Feldeffekttransistor mit isoliertem Gate und Herstellungsverfahren.
DE69600911D1 (de) Isolierte Gate-Transistor-Ansteuerschaltung
DE69728858D1 (de) Kurzkanal-fermi-schwellenspannungsfeldeffekttransistor mit drain-feld-anschlusszone und verfahren zur herstellung
DE69600801D1 (de) Halbleiterbauelement mit isoliertem Gate
DE69530232D1 (de) Halbleiteranordnung mit isoliertem Gate und Verfahren zur Herstellung derselben
DE69628633D1 (de) Halbleiteranordnung mit isoliertem Gate und Verfahren zur Herstellung
DE69404500D1 (de) Hochspannungs-MOS-Transistor mit ausgedehntem Drain
DE69707828D1 (de) Herstellungsverfahren für einen isolierenden Film mit eingestellter Spannung, Hableitervorrichtung und Herstellungsverfahren
DE69634594D1 (de) Halbleiterbauelement mit isoliertem Gate und Verfahren zu seiner Herstellung
DE3569634D1 (en) Method of fabricating an insulated gate type field-effect transistor
DE69638040D1 (de) Getarnter digitaler Schaltkreis mit Transistorgeometrie und Kanalunterbrechungen und Herstellungsverfahren desselben
DE69629069D1 (de) Bipolare Halbleiteranordnung mit isoliertem Gate und Verfahren zur Herstellung
DE69511726D1 (de) Halbleiteranordnung mit isoliertem gate
DE60038996D1 (de) Herstellungsverfahren für Halbleiterbauelement mit isoliertem Gate
DE69629251D1 (de) Vertikale MOS-Halbleiteranordnung mit versenktem Gate und Herstellungsverfahren
DE19983773T1 (de) Transistor mit eingekerbtem Gate
DE69526534D1 (de) Bipolartransistor mit isoliertem Gate
KR960702946A (ko) 폭이 증가된 세그먼트 선택 트랜지스터를 지니는 고속 액세스 amg eprom 및 그 제조방법(a fast access amg eprom with segment select transistors which have an increased width and method of manufacture)
EP0676798A3 (de) Feldeffekttransistor mit isoliertem Gate und asymmetrischem Kanal und Verfahren zur Herstellung.
GB2316227B (en) Insulated gate semiconductor device and method of manufacturing the same
KR960009213A (ko) 개량된 바이폴라 트랜지스터 및 그 제조 방법
DE69724578D1 (de) SOI-MOS-Feldeffekttransistor
GB2299452B (en) MOS transistor adopting titanium-carbon-nitride gate electrode and manufacturing method thereof

Legal Events

Date Code Title Description
8364 No opposition during term of opposition