DE69625132D1 - Halbleitervorrichtung und Verfahren für ihre Herstellung - Google Patents

Halbleitervorrichtung und Verfahren für ihre Herstellung

Info

Publication number
DE69625132D1
DE69625132D1 DE69625132T DE69625132T DE69625132D1 DE 69625132 D1 DE69625132 D1 DE 69625132D1 DE 69625132 T DE69625132 T DE 69625132T DE 69625132 T DE69625132 T DE 69625132T DE 69625132 D1 DE69625132 D1 DE 69625132D1
Authority
DE
Germany
Prior art keywords
manufacture
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69625132T
Other languages
English (en)
Other versions
DE69625132T2 (de
Inventor
Yasuhiro Shimada
Taketoshi Matsuura
Yasuhiro Uemoto
Masamichi Azuma
Atsuo Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of DE69625132D1 publication Critical patent/DE69625132D1/de
Application granted granted Critical
Publication of DE69625132T2 publication Critical patent/DE69625132T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02356Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment to change the morphology of the insulating layer, e.g. transformation of an amorphous layer into a crystalline layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31691Inorganic layers composed of oxides or glassy oxides or oxide based glass with perovskite structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92Capacitors having potential barriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/55Capacitors with a dielectric comprising a perovskite structure material

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Ceramic Capacitors (AREA)
DE69625132T 1995-06-22 1996-06-21 Halbleitervorrichtung und Verfahren für ihre Herstellung Expired - Fee Related DE69625132T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP07155921A JP3135483B2 (ja) 1995-06-22 1995-06-22 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
DE69625132D1 true DE69625132D1 (de) 2003-01-16
DE69625132T2 DE69625132T2 (de) 2003-10-09

Family

ID=15616428

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69625132T Expired - Fee Related DE69625132T2 (de) 1995-06-22 1996-06-21 Halbleitervorrichtung und Verfahren für ihre Herstellung

Country Status (6)

Country Link
US (2) US5828098A (de)
EP (1) EP0755070B1 (de)
JP (1) JP3135483B2 (de)
KR (1) KR100240819B1 (de)
CN (1) CN1082718C (de)
DE (1) DE69625132T2 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2338962B (en) * 1996-06-19 2000-11-29 Nec Corp Thin film formation method
JP3022328B2 (ja) * 1996-06-19 2000-03-21 日本電気株式会社 薄膜形成方法
KR100275121B1 (ko) * 1997-12-30 2001-01-15 김영환 강유전체 캐패시터 제조방법
KR100277845B1 (ko) * 1998-01-14 2001-02-01 김영환 비휘발성강유전체메모리소자및그제조방법
TW404021B (en) 1998-04-09 2000-09-01 Hitachi Ltd Semiconductor memory device and manufacturing method thereof
JP2000236075A (ja) * 1999-02-12 2000-08-29 Sony Corp 誘電体キャパシタの製造方法および半導体記憶装置の製造方法
JP2002170938A (ja) * 2000-04-28 2002-06-14 Sharp Corp 半導体装置およびその製造方法
JP2004031728A (ja) * 2002-06-27 2004-01-29 Matsushita Electric Ind Co Ltd 記憶装置
JP4811551B2 (ja) * 2003-03-26 2011-11-09 セイコーエプソン株式会社 強誘電体膜の製造方法および強誘電体キャパシタの製造方法
US7015564B2 (en) * 2003-09-02 2006-03-21 Matsushita Electric Industrial Co., Ltd. Capacitive element and semiconductor memory device
JP2005294314A (ja) * 2004-03-31 2005-10-20 Tdk Corp 積層セラミックコンデンサ
EP1693840A1 (de) * 2005-02-17 2006-08-23 Samsung Electronics Co., Ltd. Datenaufzeichnungsmedium mit einer ferroelektrischen schicht und herstellverfahren
TWI316746B (en) 2006-10-03 2009-11-01 Macronix Int Co Ltd Non-volatile memory and method of manufacturing the same
KR102613029B1 (ko) 2018-10-17 2023-12-12 삼성전자주식회사 커패시터 구조물 및 이를 구비하는 반도체 소자

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4466177A (en) * 1983-06-30 1984-08-21 International Business Machines Corporation Storage capacitor optimization for one device FET dynamic RAM cell
JPH04206872A (ja) * 1990-11-30 1992-07-28 Matsushita Electric Ind Co Ltd 半導体装置
US5514822A (en) * 1991-12-13 1996-05-07 Symetrix Corporation Precursors and processes for making metal oxides
JP3206105B2 (ja) * 1992-06-09 2001-09-04 セイコーエプソン株式会社 誘電体素子の製造方法及び半導体記憶装置
JPH0629462A (ja) * 1992-07-07 1994-02-04 Fujitsu Ltd 誘電体薄膜の形成方法
JPH0777237B2 (ja) * 1993-01-04 1995-08-16 日本電気株式会社 半導体記憶装置及びその製造方法
US5883781A (en) * 1995-04-19 1999-03-16 Nec Corporation Highly-integrated thin film capacitor with high dielectric constant layer
KR100209748B1 (ko) * 1996-01-10 1999-07-15 구본준 반도체 장치의 축전기 제조방법
US5930639A (en) * 1996-04-08 1999-07-27 Micron Technology, Inc. Method for precision etching of platinum electrodes

Also Published As

Publication number Publication date
KR100240819B1 (ko) 2000-01-15
CN1082718C (zh) 2002-04-10
EP0755070A2 (de) 1997-01-22
CN1148262A (zh) 1997-04-23
JP3135483B2 (ja) 2001-02-13
DE69625132T2 (de) 2003-10-09
US6033920A (en) 2000-03-07
US5828098A (en) 1998-10-27
EP0755070A3 (de) 1997-08-13
JPH098246A (ja) 1997-01-10
EP0755070B1 (de) 2002-12-04
KR970003930A (ko) 1997-01-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee