DE69512700T2 - Halbleiterspeicheranordnung - Google Patents
HalbleiterspeicheranordnungInfo
- Publication number
- DE69512700T2 DE69512700T2 DE69512700T DE69512700T DE69512700T2 DE 69512700 T2 DE69512700 T2 DE 69512700T2 DE 69512700 T DE69512700 T DE 69512700T DE 69512700 T DE69512700 T DE 69512700T DE 69512700 T2 DE69512700 T2 DE 69512700T2
- Authority
- DE
- Germany
- Prior art keywords
- memory device
- semiconductor memory
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6074549A JP3048498B2 (ja) | 1994-04-13 | 1994-04-13 | 半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69512700D1 DE69512700D1 (de) | 1999-11-18 |
DE69512700T2 true DE69512700T2 (de) | 2000-03-09 |
Family
ID=13550448
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69512700T Expired - Lifetime DE69512700T2 (de) | 1994-04-13 | 1995-04-12 | Halbleiterspeicheranordnung |
Country Status (6)
Country | Link |
---|---|
US (1) | US5590084A (de) |
EP (1) | EP0678872B1 (de) |
JP (1) | JP3048498B2 (de) |
KR (1) | KR0159465B1 (de) |
CN (1) | CN1041250C (de) |
DE (1) | DE69512700T2 (de) |
Families Citing this family (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW348266B (en) | 1996-03-11 | 1998-12-21 | Toshiba Co Ltd | Semiconductor memory device |
JPH10162568A (ja) * | 1996-12-02 | 1998-06-19 | Toshiba Corp | 半導体記憶装置 |
KR100597620B1 (ko) * | 1999-08-18 | 2006-07-06 | 삼성전자주식회사 | 반도체 메모리 장치의 어드레스 디코딩 회로 |
JP2001338492A (ja) * | 2000-05-26 | 2001-12-07 | Matsushita Electric Ind Co Ltd | 半導体装置と制御方法 |
WO2007143278A2 (en) | 2006-04-12 | 2007-12-13 | Soft Machines, Inc. | Apparatus and method for processing an instruction matrix specifying parallel and dependent operations |
CN101627365B (zh) | 2006-11-14 | 2017-03-29 | 索夫特机械公司 | 多线程架构 |
WO2012037491A2 (en) | 2010-09-17 | 2012-03-22 | Soft Machines, Inc. | Single cycle multi-branch prediction including shadow cache for early far branch prediction |
EP2689327B1 (de) | 2011-03-25 | 2021-07-28 | Intel Corporation | Ausführung von befehlsfolgen-codeblocks mittels durch partitionierbare engines realisierter virtueller kerne |
CN103635875B (zh) | 2011-03-25 | 2018-02-16 | 英特尔公司 | 用于通过使用由可分区引擎实例化的虚拟核来支持代码块执行的存储器片段 |
WO2012162189A1 (en) | 2011-05-20 | 2012-11-29 | Soft Machines, Inc. | An interconnect structure to support the execution of instruction sequences by a plurality of engines |
TWI666551B (zh) | 2011-05-20 | 2019-07-21 | 美商英特爾股份有限公司 | 以複數個引擎作資源與互連結構的分散式分配以支援指令序列的執行 |
EP2783280B1 (de) | 2011-11-22 | 2019-09-11 | Intel Corporation | Beschleunigter codeoptimierer für einen mehrmotor-mikroprozessor |
CN104040491B (zh) | 2011-11-22 | 2018-06-12 | 英特尔公司 | 微处理器加速的代码优化器 |
KR102083390B1 (ko) | 2013-03-15 | 2020-03-02 | 인텔 코포레이션 | 네이티브 분산된 플래그 아키텍처를 이용하여 게스트 중앙 플래그 아키텍처를 에뮬레이션하는 방법 |
US9904625B2 (en) | 2013-03-15 | 2018-02-27 | Intel Corporation | Methods, systems and apparatus for predicting the way of a set associative cache |
WO2014150806A1 (en) | 2013-03-15 | 2014-09-25 | Soft Machines, Inc. | A method for populating register view data structure by using register template snapshots |
US9886279B2 (en) | 2013-03-15 | 2018-02-06 | Intel Corporation | Method for populating and instruction view data structure by using register template snapshots |
KR101708591B1 (ko) | 2013-03-15 | 2017-02-20 | 소프트 머신즈, 인크. | 블록들로 그룹화된 멀티스레드 명령어들을 실행하기 위한 방법 |
US9891924B2 (en) | 2013-03-15 | 2018-02-13 | Intel Corporation | Method for implementing a reduced size register view data structure in a microprocessor |
US9569216B2 (en) | 2013-03-15 | 2017-02-14 | Soft Machines, Inc. | Method for populating a source view data structure by using register template snapshots |
US9811342B2 (en) | 2013-03-15 | 2017-11-07 | Intel Corporation | Method for performing dual dispatch of blocks and half blocks |
US10275255B2 (en) | 2013-03-15 | 2019-04-30 | Intel Corporation | Method for dependency broadcasting through a source organized source view data structure |
US10140138B2 (en) | 2013-03-15 | 2018-11-27 | Intel Corporation | Methods, systems and apparatus for supporting wide and efficient front-end operation with guest-architecture emulation |
WO2014150991A1 (en) | 2013-03-15 | 2014-09-25 | Soft Machines, Inc. | A method for implementing a reduced size register view data structure in a microprocessor |
JP6490840B1 (ja) * | 2018-01-05 | 2019-03-27 | 華邦電子股▲ふん▼有限公司Winbond Electronics Corp. | メモリデバイス |
US10878934B2 (en) * | 2018-07-16 | 2020-12-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Memory device and electronic device |
US11081149B1 (en) * | 2020-03-31 | 2021-08-03 | Winbond Electronics Corp. | Memory device for artificial intelligence operation |
CN111863071B (zh) * | 2020-07-22 | 2022-12-06 | 上海高性能集成电路设计中心 | 一种基于sram实现存内运算的电路结构 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6381688A (ja) * | 1986-09-26 | 1988-04-12 | Hitachi Ltd | 半導体記憶装置 |
JPS6419583A (en) * | 1987-07-15 | 1989-01-23 | Hitachi Ltd | Semiconductor memory |
JPH01303695A (ja) * | 1988-06-01 | 1989-12-07 | Nec Corp | 半導体記憶装置 |
JPH0814985B2 (ja) * | 1989-06-06 | 1996-02-14 | 富士通株式会社 | 半導体記憶装置 |
US5289413A (en) * | 1990-06-08 | 1994-02-22 | Kabushiki Kaisha Toshiba | Dynamic semiconductor memory device with high-speed serial-accessing column decoder |
KR940007639B1 (ko) * | 1991-07-23 | 1994-08-22 | 삼성전자 주식회사 | 분할된 입출력 라인을 갖는 데이타 전송회로 |
-
1994
- 1994-04-13 JP JP6074549A patent/JP3048498B2/ja not_active Expired - Fee Related
-
1995
- 1995-04-11 US US08/419,688 patent/US5590084A/en not_active Expired - Lifetime
- 1995-04-12 EP EP95105516A patent/EP0678872B1/de not_active Expired - Lifetime
- 1995-04-12 DE DE69512700T patent/DE69512700T2/de not_active Expired - Lifetime
- 1995-04-13 KR KR1019950008629A patent/KR0159465B1/ko not_active IP Right Cessation
- 1995-04-13 CN CN95105153A patent/CN1041250C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US5590084A (en) | 1996-12-31 |
JPH07282581A (ja) | 1995-10-27 |
EP0678872B1 (de) | 1999-10-13 |
DE69512700D1 (de) | 1999-11-18 |
JP3048498B2 (ja) | 2000-06-05 |
CN1041250C (zh) | 1998-12-16 |
EP0678872A1 (de) | 1995-10-25 |
KR950030151A (ko) | 1995-11-24 |
CN1120224A (zh) | 1996-04-10 |
KR0159465B1 (ko) | 1999-02-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |