DE69327027T2 - Digitale Schaltung zur Signalflankenpositionsmessung - Google Patents
Digitale Schaltung zur SignalflankenpositionsmessungInfo
- Publication number
- DE69327027T2 DE69327027T2 DE69327027T DE69327027T DE69327027T2 DE 69327027 T2 DE69327027 T2 DE 69327027T2 DE 69327027 T DE69327027 T DE 69327027T DE 69327027 T DE69327027 T DE 69327027T DE 69327027 T2 DE69327027 T2 DE 69327027T2
- Authority
- DE
- Germany
- Prior art keywords
- digital circuit
- position measurement
- edge position
- signal edge
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000005259 measurement Methods 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R25/00—Arrangements for measuring phase angle between a voltage and a current or between voltages or currents
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R29/00—Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
- G01R29/02—Measuring characteristics of individual pulses, e.g. deviation from pulse flatness, rise time or duration
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25010992A JP3218720B2 (ja) | 1992-09-18 | 1992-09-18 | 入力信号のエッジ時刻測定回路及びディジタルpll装置 |
JP25331092A JP3257065B2 (ja) | 1992-09-22 | 1992-09-22 | ディジタルpll装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69327027D1 DE69327027D1 (de) | 1999-12-23 |
DE69327027T2 true DE69327027T2 (de) | 2000-07-20 |
Family
ID=26539646
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69327027T Expired - Fee Related DE69327027T2 (de) | 1992-09-18 | 1993-09-17 | Digitale Schaltung zur Signalflankenpositionsmessung |
Country Status (4)
Country | Link |
---|---|
US (1) | US5428648A (de) |
EP (1) | EP0588656B1 (de) |
KR (1) | KR940007850A (de) |
DE (1) | DE69327027T2 (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10120743B4 (de) * | 2000-04-20 | 2004-08-05 | Nec Electronics Corp., Kawasaki | Schaltung zur Erkennung von Zyklus zu Zyklus auftretenden Synchronisationsstörungen |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5546434A (en) * | 1995-05-16 | 1996-08-13 | Intel Corporation | Dual edge adjusting digital phase-locked loop having one-half reference clock jitter |
US5537062A (en) * | 1995-06-07 | 1996-07-16 | Ast Research, Inc. | Glitch-free clock enable circuit |
US5692166A (en) * | 1996-04-19 | 1997-11-25 | Motorola, Inc. | Method and system for resynchronizing a phase-shifted received data stream with a master clock |
JP3749347B2 (ja) * | 1997-04-24 | 2006-02-22 | 富士通株式会社 | データ取り込み方法、データ取り込み回路、及び、ieee1394用プロトコルコントローラ |
US6081484A (en) | 1997-10-14 | 2000-06-27 | Schlumberger Technologies, Inc. | Measuring signals in a tester system |
JP3313318B2 (ja) | 1998-01-09 | 2002-08-12 | 富士通株式会社 | Pll回路 |
US6987817B1 (en) * | 2000-07-17 | 2006-01-17 | Lsi Logic Corporation | Digital clock recovery PLL |
US7345824B2 (en) * | 2002-03-26 | 2008-03-18 | Trivium Technologies, Inc. | Light collimating device |
CN1252924C (zh) * | 2002-05-30 | 2006-04-19 | Ntt电子株式会社 | 相位比较电路和时钟数据恢复电路以及收发器电路 |
JP2004015112A (ja) * | 2002-06-03 | 2004-01-15 | Mitsubishi Electric Corp | クロック抽出回路 |
US20040153894A1 (en) * | 2003-01-21 | 2004-08-05 | Zarlink Semiconductor Inc. | Method of measuring the accuracy of a clock signal |
WO2004079907A1 (ja) * | 2003-03-04 | 2004-09-16 | Nippon Telegraph And Telephone Corporation | 位相比較回路およびcdr回路 |
EP1619673A4 (de) * | 2003-04-30 | 2008-10-08 | Ricoh Kk | Verfahren und einrichtung zum aufzeichnen von informationen, verfahren und einrichtung zur wiedergabe von informationen und aufzeichnungsmedium |
JP4499372B2 (ja) * | 2003-04-30 | 2010-07-07 | 株式会社リコー | 情報記録方法と情報再生方法と情報記録装置と情報再生装置とコンピュータ読み取り可能な記録媒体 |
KR101565098B1 (ko) * | 2014-04-30 | 2015-11-02 | 한국항공우주연구원 | 신호 입력시간 측정 장치 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3878473A (en) * | 1974-06-17 | 1975-04-15 | Ibm | Digital phase-locked loop generating signed phase values at zero crossings |
US4456890A (en) * | 1982-04-05 | 1984-06-26 | Computer Peripherals Inc. | Data tracking clock recovery system using digitally controlled oscillator |
US4841551A (en) * | 1987-01-05 | 1989-06-20 | Grumman Aerospace Corporation | High speed data-clock synchronization processor |
JP2687349B2 (ja) * | 1987-05-26 | 1997-12-08 | ソニー株式会社 | ディジタルpll回路 |
JPS6419826A (en) * | 1987-07-14 | 1989-01-23 | Sony Corp | Digital pll circuit |
JP2731151B2 (ja) * | 1987-09-18 | 1998-03-25 | 株式会社東芝 | 位相情報検出回路 |
US4912729A (en) * | 1988-05-16 | 1990-03-27 | U.S. Philips Corporation | Phase-locked-loop circuit and bit detection arrangement comprising such a phase-locked-loop circuit |
DE68921429T2 (de) * | 1988-11-25 | 1995-11-09 | Nippon Electric Co | Schaltungsanordnung zum Erzeugen eines seriellen Taktsignals. |
US5077529A (en) * | 1989-07-19 | 1991-12-31 | Level One Communications, Inc. | Wide bandwidth digital phase locked loop with reduced low frequency intrinsic jitter |
GB2238922A (en) * | 1989-12-05 | 1991-06-12 | Martin Greenwood | Mobile communications apparatus with digital clock recovery |
US5023892A (en) * | 1990-04-06 | 1991-06-11 | Printer Systems Corporation | System for detecting and correcting signal distortion |
EP0467712B1 (de) * | 1990-07-20 | 1998-04-29 | Nec Corporation | Phasendemodulator für PSK-modulierte Signale |
US5166959A (en) * | 1991-12-19 | 1992-11-24 | Hewlett-Packard Company | Picosecond event timer |
-
1993
- 1993-09-10 US US08/118,591 patent/US5428648A/en not_active Expired - Fee Related
- 1993-09-17 EP EP93307355A patent/EP0588656B1/de not_active Expired - Lifetime
- 1993-09-17 DE DE69327027T patent/DE69327027T2/de not_active Expired - Fee Related
- 1993-09-18 KR KR1019930018968A patent/KR940007850A/ko not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10120743B4 (de) * | 2000-04-20 | 2004-08-05 | Nec Electronics Corp., Kawasaki | Schaltung zur Erkennung von Zyklus zu Zyklus auftretenden Synchronisationsstörungen |
Also Published As
Publication number | Publication date |
---|---|
US5428648A (en) | 1995-06-27 |
EP0588656A3 (en) | 1994-06-01 |
EP0588656B1 (de) | 1999-11-17 |
EP0588656A2 (de) | 1994-03-23 |
DE69327027D1 (de) | 1999-12-23 |
KR940007850A (ko) | 1994-04-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69323992T2 (de) | Digitale Signalverarbeitungsvorrichtung | |
DE69327618T2 (de) | Schaltung zur Fehlermessung | |
DE69216918D1 (de) | Digitale Kalibriervorrichtung | |
DE69327027D1 (de) | Digitale Schaltung zur Signalflankenpositionsmessung | |
DE69208737D1 (de) | Schaltung zur Interpolation eines Bildsignals | |
DE69636031D1 (de) | Digitale Signalverarbeitungsvorrichtung | |
DE69536122D1 (de) | Digitale Signalverarbeitung | |
DE69412368T2 (de) | Digitale Signalverarbeitung | |
NO933648D0 (no) | Anordning for digital signalkombinering | |
DE69406636T2 (de) | Signalerfassungsschaltung für digitale Regelung | |
DE69032382D1 (de) | Digitale Signalverarbeitungsschaltung | |
DE69430034T2 (de) | Digitale Signalverarbeitungseinrichtung | |
DE3886739D1 (de) | Einrichtung zur digitalen Signalverarbeitung. | |
DE69029608D1 (de) | Digitale Signalprozessorvorrichtung | |
DE69327923T2 (de) | Digitale Signalverarbeitungseinrichtung | |
DE69332040D1 (de) | Digitale Trimmschaltung | |
DE3884597D1 (de) | Digitale farbsignalverarbeitungsschaltung. | |
DE69031786D1 (de) | Digitale Signalverarbeitungsanlage | |
DE3682296D1 (de) | Digitale integrierte schaltung zur verarbeitung eines sprachsignals. | |
DE69423540D1 (de) | Gerät zur Aufzeichnung von digitalen Signalen | |
DE69509160T2 (de) | Digitale Schaltung zur automatischen Frequenzsteuerung | |
NO922222D0 (no) | Demodulator for digitale modulasjonssignaler | |
DE59107912D1 (de) | Schaltungsanordnung zur Versteilerung von Signalflanken | |
DE59405643D1 (de) | Elektronische zählerschaltung zur zeitlichen vermessung eines digitalen signals | |
IT1243692B (it) | Dospositivo per il pilotaggio di un circuito flottante con un segnale digitale |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |