DE69124043D1 - Arbeitsplatzrechner mit Schnittstellenmitteln zur Datenübertragung zwischen zwei Bussen - Google Patents

Arbeitsplatzrechner mit Schnittstellenmitteln zur Datenübertragung zwischen zwei Bussen

Info

Publication number
DE69124043D1
DE69124043D1 DE69124043T DE69124043T DE69124043D1 DE 69124043 D1 DE69124043 D1 DE 69124043D1 DE 69124043 T DE69124043 T DE 69124043T DE 69124043 T DE69124043 T DE 69124043T DE 69124043 D1 DE69124043 D1 DE 69124043D1
Authority
DE
Germany
Prior art keywords
buses
data transmission
interface means
workstation computer
workstation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69124043T
Other languages
English (en)
Other versions
DE69124043T2 (de
Inventor
Vernon Thomas Powell
Gerhard Roehrl
Anton Goeppel
Edward C King
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NCR International Inc
Original Assignee
NCR International Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NCR International Inc filed Critical NCR International Inc
Publication of DE69124043D1 publication Critical patent/DE69124043D1/de
Application granted granted Critical
Publication of DE69124043T2 publication Critical patent/DE69124043T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4009—Coupling between buses with data restructuring
    • G06F13/4013—Coupling between buses with data restructuring with data re-ordering, e.g. Endian conversion

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
DE69124043T 1990-08-31 1991-08-30 Arbeitsplatzrechner mit Schnittstellenmitteln zur Datenübertragung zwischen zwei Bussen Expired - Fee Related DE69124043T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB909019022A GB9019022D0 (en) 1990-08-31 1990-08-31 Work station or similar data processing system including interfacing means to microchannel means

Publications (2)

Publication Number Publication Date
DE69124043D1 true DE69124043D1 (de) 1997-02-20
DE69124043T2 DE69124043T2 (de) 1997-09-04

Family

ID=10681444

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69124043T Expired - Fee Related DE69124043T2 (de) 1990-08-31 1991-08-30 Arbeitsplatzrechner mit Schnittstellenmitteln zur Datenübertragung zwischen zwei Bussen

Country Status (5)

Country Link
US (1) US5699529A (de)
EP (1) EP0476872B1 (de)
JP (1) JPH04350754A (de)
DE (1) DE69124043T2 (de)
GB (1) GB9019022D0 (de)

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* Cited by examiner, † Cited by third party
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US6289322B1 (en) * 1998-03-03 2001-09-11 Checkfree Corporation Electronic bill processing
US5522050A (en) * 1993-05-28 1996-05-28 International Business Machines Corporation Bus-to-bus bridge for a multiple bus information handling system that optimizes data transfers between a system bus and a peripheral bus
US6016526A (en) * 1997-09-19 2000-01-18 International Business Machines Corporation Method and apparatus for transferring data between buses having differing ordering policies via the use of autonomous units
US6449678B1 (en) 1999-03-24 2002-09-10 International Business Machines Corporation Method and system for multiple read/write transactions across a bridge system
US6286074B1 (en) 1999-03-24 2001-09-04 International Business Machines Corporation Method and system for reading prefetched data across a bridge system
US6425023B1 (en) 1999-03-24 2002-07-23 International Business Machines Corporation Method and system for gathering and buffering sequential data for a transaction comprising multiple data access requests
US6502157B1 (en) 1999-03-24 2002-12-31 International Business Machines Corporation Method and system for perfetching data in a bridge system
DE19946716A1 (de) * 1999-09-29 2001-04-12 Infineon Technologies Ag Verfahren zum Betrieb eines Prozessorbusses
US7028115B1 (en) * 2000-10-06 2006-04-11 Broadcom Corporation Source triggered transaction blocking
US7237090B1 (en) * 2000-12-29 2007-06-26 Mips Technologies, Inc. Configurable out-of-order data transfer in a coprocessor interface
US7287147B1 (en) 2000-12-29 2007-10-23 Mips Technologies, Inc. Configurable co-processor interface
US7168066B1 (en) 2001-04-30 2007-01-23 Mips Technologies, Inc. Tracing out-of order load data
KR100464257B1 (ko) * 2002-02-26 2005-01-03 엘지산전 주식회사 통신장치의 3단 통신 버퍼
US20070147115A1 (en) * 2005-12-28 2007-06-28 Fong-Long Lin Unified memory and controller
US7519754B2 (en) * 2005-12-28 2009-04-14 Silicon Storage Technology, Inc. Hard disk drive cache memory and playback device
US20150089245A1 (en) * 2013-09-26 2015-03-26 Asher M. Altman Data storage in persistent memory

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US4144562A (en) * 1977-06-23 1979-03-13 Ncr Corporation System and method for increasing microprocessor output data rate
US4375665A (en) * 1978-04-24 1983-03-01 Texas Instruments Incorporated Eight bit standard connector bus for sixteen bit microcomputer using mirrored memory boards
US4447878A (en) * 1978-05-30 1984-05-08 Intel Corporation Apparatus and method for providing byte and word compatible information transfers
US4291370A (en) * 1978-08-23 1981-09-22 Westinghouse Electric Corp. Core memory interface for coupling a processor to a memory having a differing word length
US4667305A (en) * 1982-06-30 1987-05-19 International Business Machines Corporation Circuits for accessing a variable width data bus with a variable width data field
US4695952A (en) * 1984-07-30 1987-09-22 United Technologies Corporation Dual redundant bus interface circuit architecture
US4716525A (en) * 1985-04-15 1987-12-29 Concurrent Computer Corporation Peripheral controller for coupling data buses having different protocol and transfer rates
US4683534A (en) * 1985-06-17 1987-07-28 Motorola, Inc. Method and apparatus for interfacing buses of different sizes
US4831514A (en) * 1986-02-14 1989-05-16 Dso "Izot" Method and device for connecting a 16-bit microprocessor to 8-bit modules
US5034914A (en) * 1986-05-15 1991-07-23 Aquidneck Systems International, Inc. Optical disk data storage method and apparatus with buffered interface
US5099417A (en) * 1987-03-13 1992-03-24 Texas Instruments Incorporated Data processing device with improved direct memory access
JPS6450152A (en) * 1987-08-20 1989-02-27 Fujitsu Ltd Communication controller
US4935894A (en) * 1987-08-31 1990-06-19 Motorola, Inc. Multi-processor, multi-bus system with bus interface comprising FIFO register stocks for receiving and transmitting data and control information
US5163132A (en) * 1987-09-24 1992-11-10 Ncr Corporation Integrated controller using alternately filled and emptied buffers for controlling bi-directional data transfer between a processor and a data storage device
US4947366A (en) * 1987-10-02 1990-08-07 Advanced Micro Devices, Inc. Input/output controller incorporating address mapped input/output windows and read ahead/write behind capabilities
NL8702394A (nl) * 1987-10-08 1989-05-01 Philips Nv Interface voor een verbindingsnetwerk tussen afzonderlijke stations enerzijds en een voor het berichtenverkeer tussen deze stations gebruikt fysiek medium anderzijds.
DE3782500T2 (de) * 1987-12-23 1993-05-06 Ibm Gemeinsam genutzte speicherschnittstelle fuer datenverarbeitungsanlage.
JPH01175056A (ja) * 1987-12-28 1989-07-11 Toshiba Corp プログラム転送方式
JP2504512B2 (ja) * 1988-03-09 1996-06-05 富士通株式会社 Ｄｍａコントロ―ラ
US5129090A (en) * 1988-05-26 1992-07-07 Ibm Corporation System bus preempt for 80386 when running in an 80386/82385 microcomputer system with arbitration
JPH01300361A (ja) * 1988-05-28 1989-12-04 Nec Eng Ltd マイクロプロセッサシステム
JPH077375B2 (ja) * 1988-06-17 1995-01-30 日本電気株式会社 バス制御方式
US5003463A (en) * 1988-06-30 1991-03-26 Wang Laboratories, Inc. Interface controller with first and second buffer storage area for receiving and transmitting data between I/O bus and high speed system bus
US5142627A (en) * 1988-11-17 1992-08-25 Unisys Corporation FIP-compliant block multiplexor channel interface operational method for cache/disk subsystem
US5134701A (en) * 1989-02-10 1992-07-28 Hewlett-Packard Co. Test apparatus performing runtime replacement of program instructions with breakpoint instructions for processor having multiple instruction fetch capabilities
US5224213A (en) * 1989-09-05 1993-06-29 International Business Machines Corporation Ping-pong data buffer for transferring data from one data bus to another data bus
US5129065A (en) * 1989-10-27 1992-07-07 Sun Microsystems, Inc. Apparatus and methods for interface register handshake for controlling devices

Also Published As

Publication number Publication date
JPH04350754A (ja) 1992-12-04
EP0476872A1 (de) 1992-03-25
DE69124043T2 (de) 1997-09-04
EP0476872B1 (de) 1997-01-08
GB9019022D0 (en) 1990-10-17
US5699529A (en) 1997-12-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Free format text: V. BEZOLD & SOZIEN, 80799 MUENCHEN

8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee