DE69032964D1 - Kontextumschaltungssystem - Google Patents

Kontextumschaltungssystem

Info

Publication number
DE69032964D1
DE69032964D1 DE69032964T DE69032964T DE69032964D1 DE 69032964 D1 DE69032964 D1 DE 69032964D1 DE 69032964 T DE69032964 T DE 69032964T DE 69032964 T DE69032964 T DE 69032964T DE 69032964 D1 DE69032964 D1 DE 69032964D1
Authority
DE
Germany
Prior art keywords
switching system
context switching
context
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69032964T
Other languages
English (en)
Other versions
DE69032964T2 (de
Inventor
Peter N Ehlig
James F Hollander
Frederic Boutaud
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US07/347,596 external-priority patent/US5072418A/en
Priority claimed from US07/347,615 external-priority patent/US5142677A/en
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE69032964D1 publication Critical patent/DE69032964D1/de
Publication of DE69032964T2 publication Critical patent/DE69032964T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318536—Scan chain arrangements, e.g. connections, test bus, analog signals
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2236—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/362—Software debugging
    • G06F11/3648—Software debugging using additional hardware
    • G06F11/3652—Software debugging using additional hardware in-circuit-emulation [ICE] arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30021—Compare instructions, e.g. Greater-Than, Equal-To, MINMAX
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30101—Special purpose registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/325—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for loops, e.g. loop detection or loop counter
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G06F9/462—Saving or restoring of program or task context with multiple register sets
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318505—Test of Modular systems, e.g. Wafers, MCM's
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/273—Tester hardware, i.e. output processing circuits
    • G06F11/2733—Test interface between tester and unit under test

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computing Systems (AREA)
  • Complex Calculations (AREA)
  • Microcomputers (AREA)
  • Executing Machine-Instructions (AREA)
  • Hardware Redundancy (AREA)
  • Advance Control (AREA)
DE1990632964 1989-05-04 1990-05-01 Kontextumschaltungssystem Expired - Fee Related DE69032964T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US34760589A 1989-05-04 1989-05-04
US07/347,596 US5072418A (en) 1989-05-04 1989-05-04 Series maxium/minimum function computing devices, systems and methods
US07/347,615 US5142677A (en) 1989-05-04 1989-05-04 Context switching devices, systems and methods

Publications (2)

Publication Number Publication Date
DE69032964D1 true DE69032964D1 (de) 1999-04-08
DE69032964T2 DE69032964T2 (de) 1999-07-01

Family

ID=27407784

Family Applications (4)

Application Number Title Priority Date Filing Date
DE1990634059 Expired - Lifetime DE69034059T2 (de) 1989-05-04 1990-05-01 Arithmetisch-logische Einheit mit Akkumulator und parallelem Register
DE1990634028 Expired - Lifetime DE69034028T2 (de) 1989-05-04 1990-05-01 Verfahren und System zur Bestimmung von Min/Max Werten
DE1990633997 Expired - Fee Related DE69033997T2 (de) 1989-05-04 1990-05-01 Datenverarbeitungssystem mit Kontextumschaltungsfähigkeit
DE1990632964 Expired - Fee Related DE69032964T2 (de) 1989-05-04 1990-05-01 Kontextumschaltungssystem

Family Applications Before (3)

Application Number Title Priority Date Filing Date
DE1990634059 Expired - Lifetime DE69034059T2 (de) 1989-05-04 1990-05-01 Arithmetisch-logische Einheit mit Akkumulator und parallelem Register
DE1990634028 Expired - Lifetime DE69034028T2 (de) 1989-05-04 1990-05-01 Verfahren und System zur Bestimmung von Min/Max Werten
DE1990633997 Expired - Fee Related DE69033997T2 (de) 1989-05-04 1990-05-01 Datenverarbeitungssystem mit Kontextumschaltungsfähigkeit

Country Status (3)

Country Link
EP (4) EP0884673B1 (de)
JP (3) JP3173777B2 (de)
DE (4) DE69034059T2 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5825770A (en) * 1996-06-06 1998-10-20 Northern Telecom Limited Multiple algorithm processing on a plurality of digital signal streams via context switching
US5909188A (en) * 1997-02-24 1999-06-01 Rosemont Inc. Process control transmitter with adaptive analog-to-digital converter
SE9803632D0 (sv) * 1998-10-22 1998-10-22 Ericsson Telefon Ab L M A processor
GB2396229B (en) * 2002-12-12 2006-01-11 Advanced Risc Mach Ltd Processing activity masking in a data processing system
US7979684B2 (en) * 2006-08-07 2011-07-12 Qualcomm Incorporated Method and context switch device for implementing design-for-testability functionality of latch-based register files
KR102549438B1 (ko) * 2016-09-27 2023-06-29 삼성전자주식회사 순차 회로, 이를 포함하는 스캔 체인 회로 및 집적 회로
WO2019129389A1 (en) * 2017-12-26 2019-07-04 Silicon Mobility Sas Flexible logic unit adapted for real-time task switching
CN112602054B (zh) 2018-08-31 2024-06-25 弗莱克斯-罗技克斯技术公司 乘法器累加器电路、用于乘法累加的逻辑瓦片架构和包括逻辑瓦片阵列的ic
US11194585B2 (en) 2019-03-25 2021-12-07 Flex Logix Technologies, Inc. Multiplier-accumulator circuitry having processing pipelines and methods of operating same
US11314504B2 (en) 2019-04-09 2022-04-26 Flex Logix Technologies, Inc. Multiplier-accumulator processing pipelines and processing component, and methods of operating same
US11288076B2 (en) 2019-09-13 2022-03-29 Flex Logix Technologies, Inc. IC including logic tile, having reconfigurable MAC pipeline, and reconfigurable memory
US11455368B2 (en) 2019-10-02 2022-09-27 Flex Logix Technologies, Inc. MAC processing pipeline having conversion circuitry, and methods of operating same
KR102673524B1 (ko) 2019-11-05 2024-06-11 삼성디스플레이 주식회사 전자 장치
US12015428B2 (en) 2019-11-05 2024-06-18 Flex Logix Technologies, Inc. MAC processing pipeline using filter weights having enhanced dynamic range, and methods of operating same
US11693625B2 (en) 2019-12-04 2023-07-04 Flex Logix Technologies, Inc. Logarithmic addition-accumulator circuitry, processing pipeline including same, and methods of operation
US11960856B1 (en) 2020-01-15 2024-04-16 Flex Logix Technologies, Inc. Multiplier-accumulator processing pipeline using filter weights having gaussian floating point data format
US11442881B2 (en) 2020-04-18 2022-09-13 Flex Logix Technologies, Inc. MAC processing pipelines, circuitry to control and configure same, and methods of operating same
US11604645B2 (en) 2020-07-22 2023-03-14 Flex Logix Technologies, Inc. MAC processing pipelines having programmable granularity, and methods of operating same

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3221309A (en) * 1961-08-10 1965-11-30 Scam Instr Corp Priority interrupt monitoring system
GB1426273A (en) * 1973-04-13 1976-02-25 Int Computers Ltd Data processing
FR2250449A5 (en) * 1973-10-31 1975-05-30 Honeywell Bull Soc Ind Protection system for data processor interruption - has double memory bank with each bank divided into two parts
JPS50120743A (de) * 1974-03-08 1975-09-22
US4218739A (en) * 1976-10-28 1980-08-19 Honeywell Information Systems Inc. Data processing interrupt apparatus having selective suppression control
US4091445A (en) * 1977-01-18 1978-05-23 Honeywell Information Systems Inc. Program switching monitor
JPS5935451B2 (ja) * 1977-12-23 1984-08-29 富士通株式会社 汎用レジスタ・アクセス方式
US4287560A (en) * 1979-06-27 1981-09-01 Burroughs Corporation Dual mode microprocessor system
JPS5616248A (en) * 1979-07-17 1981-02-17 Matsushita Electric Ind Co Ltd Processing system for interruption
JPS5641577A (en) * 1979-09-11 1981-04-18 Nec Corp Stack register circuit
US4396979A (en) * 1980-05-30 1983-08-02 Fairchild Camera & Instrument Corporation Microprocessor with improved arithmetic logic unit data path
US4467444A (en) * 1980-08-01 1984-08-21 Advanced Micro Devices, Inc. Processor unit for microcomputer systems
US4434461A (en) * 1980-09-15 1984-02-28 Motorola, Inc. Microprocessor with duplicate registers for processing interrupts
US4403225A (en) * 1982-05-24 1983-09-06 Honeywell, Inc. Multistylus recording system
JPS58225443A (ja) * 1982-06-25 1983-12-27 Nec Corp 高速デ−タ処理装置
US4689739A (en) * 1983-03-28 1987-08-25 Xerox Corporation Method for providing priority interrupts in an electrophotographic machine
US4597053A (en) * 1983-07-01 1986-06-24 Codex Corporation Two-pass multiplier/accumulator circuit
JPS61122747A (ja) * 1984-11-14 1986-06-10 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション デ−タ処理装置
JPS6352241A (ja) * 1986-08-22 1988-03-05 Hitachi Ltd マイクロプロセツサ
EP0306891A3 (de) * 1987-09-11 1992-04-01 National Semiconductor Corporation Pipeline-Sklavenprotokoll für eine CPU-Gleitkommaeinheiten-Gruppe hoher Leistung

Also Published As

Publication number Publication date
EP0892344A2 (de) 1999-01-20
DE69032964T2 (de) 1999-07-01
DE69033997D1 (de) 2002-09-26
DE69034028T2 (de) 2003-10-09
EP0884674B1 (de) 2003-04-16
DE69034028D1 (de) 2003-01-23
EP0892344A3 (de) 1999-02-10
EP0405726B1 (de) 1999-03-03
JP3173777B2 (ja) 2001-06-04
EP0884674A3 (de) 1999-07-28
EP0884673B1 (de) 2002-12-11
DE69033997T2 (de) 2003-04-30
EP0405726A3 (en) 1993-08-25
JPH0363826A (ja) 1991-03-19
DE69034059D1 (de) 2003-05-22
EP0884674A2 (de) 1998-12-16
EP0884673A2 (de) 1998-12-16
JPH1196021A (ja) 1999-04-09
EP0405726A2 (de) 1991-01-02
JPH1196020A (ja) 1999-04-09
EP0884673A3 (de) 1999-07-14
EP0892344B1 (de) 2002-08-21
DE69034059T2 (de) 2004-05-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee