DE69026631D1 - Höckerstruktur zum Verbinden von integrierten Schaltungsanordnungen mit Hilfe der Reflow-Technik - Google Patents
Höckerstruktur zum Verbinden von integrierten Schaltungsanordnungen mit Hilfe der Reflow-TechnikInfo
- Publication number
- DE69026631D1 DE69026631D1 DE69026631T DE69026631T DE69026631D1 DE 69026631 D1 DE69026631 D1 DE 69026631D1 DE 69026631 T DE69026631 T DE 69026631T DE 69026631 T DE69026631 T DE 69026631T DE 69026631 D1 DE69026631 D1 DE 69026631D1
- Authority
- DE
- Germany
- Prior art keywords
- integrated circuit
- circuit arrangements
- bump structure
- connecting integrated
- reflow technology
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05124—Aluminium [Al] as principal constituent
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05155—Nickel [Ni] as principal constituent
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05644—Gold [Au] as principal constituent
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/1147—Manufacturing methods using a lift-off mask
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01023—Vanadium [V]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01043—Technetium [Tc]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/308,704 US4922322A (en) | 1989-02-09 | 1989-02-09 | Bump structure for reflow bonding of IC devices |
Publications (1)
Publication Number | Publication Date |
---|---|
DE69026631D1 true DE69026631D1 (de) | 1996-05-30 |
Family
ID=23195051
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69026631T Expired - Lifetime DE69026631D1 (de) | 1989-02-09 | 1990-02-01 | Höckerstruktur zum Verbinden von integrierten Schaltungsanordnungen mit Hilfe der Reflow-Technik |
Country Status (5)
Country | Link |
---|---|
US (1) | US4922322A (de) |
EP (1) | EP0382080B1 (de) |
JP (1) | JPH02246335A (de) |
KR (1) | KR0166967B1 (de) |
DE (1) | DE69026631D1 (de) |
Families Citing this family (44)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5021300A (en) * | 1989-09-05 | 1991-06-04 | Raytheon Company | Solder back contact |
JPH03233972A (ja) * | 1990-02-08 | 1991-10-17 | Matsushita Electron Corp | 半導体装置用電極およびその製造方法 |
US5121871A (en) * | 1990-04-20 | 1992-06-16 | The United States Of America As Represented By The United States Department Of Energy | Solder extrusion pressure bonding process and bonded products produced thereby |
WO1991018416A1 (en) * | 1990-05-14 | 1991-11-28 | Richard Lee Schendelman | Interdigitated trans-die lead construction and method of construction for maximizing population density of chip-on-board construction |
JP2540652B2 (ja) * | 1990-06-01 | 1996-10-09 | 株式会社東芝 | 半導体装置 |
US5556810A (en) * | 1990-06-01 | 1996-09-17 | Kabushiki Kaisha Toshiba | Method for manufacturing a semiconductor device wherein a semiconductor chip is connected to a lead frame by metal plating |
US5130275A (en) * | 1990-07-02 | 1992-07-14 | Digital Equipment Corp. | Post fabrication processing of semiconductor chips |
DE4025622A1 (de) * | 1990-08-13 | 1992-02-20 | Siemens Ag | Anschlusskontakthoecker und verfahren zu dessen herstellung |
JPH0574824A (ja) * | 1991-08-26 | 1993-03-26 | Mitsubishi Electric Corp | 半導体装置の製造方法及び半導体装置 |
US5197654A (en) * | 1991-11-15 | 1993-03-30 | Avishay Katz | Bonding method using solder composed of multiple alternating gold and tin layers |
USH1934H1 (en) | 1992-05-01 | 2001-01-02 | Lucent Technologies, Inc. | Gold-tin solder suitable for self-aligning applications |
JP3141364B2 (ja) * | 1992-05-06 | 2001-03-05 | 住友電気工業株式会社 | 半導体チップ |
US5346857A (en) * | 1992-09-28 | 1994-09-13 | Motorola, Inc. | Method for forming a flip-chip bond from a gold-tin eutectic |
US5821627A (en) * | 1993-03-11 | 1998-10-13 | Kabushiki Kaisha Toshiba | Electronic circuit device |
US5508229A (en) * | 1994-05-24 | 1996-04-16 | National Semiconductor Corporation | Method for forming solder bumps in semiconductor devices |
US5918794A (en) * | 1995-12-28 | 1999-07-06 | Lucent Technologies Inc. | Solder bonding of dense arrays of microminiature contact pads |
US6137690A (en) * | 1997-08-18 | 2000-10-24 | Motorola | Electronic assembly |
JP3420917B2 (ja) | 1997-09-08 | 2003-06-30 | 富士通株式会社 | 半導体装置 |
US6157079A (en) * | 1997-11-10 | 2000-12-05 | Citizen Watch Co., Ltd | Semiconductor device with a bump including a bump electrode film covering a projecting photoresist |
US6184581B1 (en) * | 1997-11-24 | 2001-02-06 | Delco Electronics Corporation | Solder bump input/output pad for a surface mount circuit device |
SG111958A1 (en) * | 1998-03-18 | 2005-06-29 | Hitachi Cable | Semiconductor device |
JP3553413B2 (ja) * | 1999-04-26 | 2004-08-11 | 富士通株式会社 | 半導体装置の製造方法 |
US6638847B1 (en) * | 2000-04-19 | 2003-10-28 | Advanced Interconnect Technology Ltd. | Method of forming lead-free bump interconnections |
US6737353B2 (en) * | 2001-06-19 | 2004-05-18 | Advanced Semiconductor Engineering, Inc. | Semiconductor device having bump electrodes |
TWI245402B (en) * | 2002-01-07 | 2005-12-11 | Megic Corp | Rod soldering structure and manufacturing process thereof |
TW530402B (en) * | 2002-03-01 | 2003-05-01 | Advanced Semiconductor Eng | Bump process |
US6642158B1 (en) * | 2002-09-23 | 2003-11-04 | Intel Corporation | Photo-thermal induced diffusion |
US7088004B2 (en) * | 2002-11-27 | 2006-08-08 | International Rectifier Corporation | Flip-chip device having conductive connectors |
US7455787B2 (en) | 2003-08-01 | 2008-11-25 | Sunpower Corporation | Etching of solar cell materials |
US7109583B2 (en) * | 2004-05-06 | 2006-09-19 | Endwave Corporation | Mounting with auxiliary bumps |
DE102004023752B4 (de) * | 2004-05-11 | 2006-08-24 | Infineon Technologies Ag | Verfahren zur Vermeidung der Verringerung der Dicke der Umverdrahtung |
KR100660889B1 (ko) | 2005-11-14 | 2006-12-26 | 삼성전자주식회사 | 반도체 패키지의 위스커 결함을 억제하는 인쇄회로기판 및이를 이용한 반도체 패키지 탑재방법 |
US7919859B2 (en) * | 2007-03-23 | 2011-04-05 | Intel Corporation | Copper die bumps with electromigration cap and plated solder |
US8404160B2 (en) * | 2007-05-18 | 2013-03-26 | Applied Nanotech Holdings, Inc. | Metallic ink |
US10231344B2 (en) * | 2007-05-18 | 2019-03-12 | Applied Nanotech Holdings, Inc. | Metallic ink |
US8506849B2 (en) * | 2008-03-05 | 2013-08-13 | Applied Nanotech Holdings, Inc. | Additives and modifiers for solvent- and water-based metallic conductive inks |
US9730333B2 (en) * | 2008-05-15 | 2017-08-08 | Applied Nanotech Holdings, Inc. | Photo-curing process for metallic inks |
US20090286383A1 (en) * | 2008-05-15 | 2009-11-19 | Applied Nanotech Holdings, Inc. | Treatment of whiskers |
US20100000762A1 (en) * | 2008-07-02 | 2010-01-07 | Applied Nanotech Holdings, Inc. | Metallic pastes and inks |
KR101735710B1 (ko) | 2009-03-27 | 2017-05-15 | 어플라이드 나노테크 홀딩스, 인크. | 광 및/또는 레이저 소결을 향상시키기 위한 버퍼층 |
US8422197B2 (en) * | 2009-07-15 | 2013-04-16 | Applied Nanotech Holdings, Inc. | Applying optical energy to nanoparticles to produce a specified nanostructure |
US9598776B2 (en) | 2012-07-09 | 2017-03-21 | Pen Inc. | Photosintering of micron-sized copper particles |
US20150171039A1 (en) * | 2013-12-13 | 2015-06-18 | Chipmos Technologies Inc. | Redistribution layer alloy structure and manufacturing method thereof |
US9136237B2 (en) * | 2013-12-17 | 2015-09-15 | Oracle International Corporation | Electroplated solder for high-temperature interconnect |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3141226A (en) * | 1961-09-27 | 1964-07-21 | Hughes Aircraft Co | Semiconductor electrode attachment |
US3874072A (en) * | 1972-03-27 | 1975-04-01 | Signetics Corp | Semiconductor structure with bumps and method for making the same |
US4005472A (en) * | 1975-05-19 | 1977-01-25 | National Semiconductor Corporation | Method for gold plating of metallic layers on semiconductive devices |
JPS5459080A (en) * | 1977-10-19 | 1979-05-12 | Nec Corp | Semiconductor device |
US4418857A (en) * | 1980-12-31 | 1983-12-06 | International Business Machines Corp. | High melting point process for Au:Sn:80:20 brazing alloy for chip carriers |
JPS57152147A (en) * | 1981-03-16 | 1982-09-20 | Matsushita Electric Ind Co Ltd | Formation of metal projection on metal lead |
JPS57188848A (en) * | 1981-05-18 | 1982-11-19 | Hitachi Ltd | Circuit element |
JPS592352A (ja) * | 1982-06-28 | 1984-01-07 | Toshiba Corp | 半導体装置の製造方法 |
US4518112A (en) * | 1982-12-30 | 1985-05-21 | International Business Machines Corporation | Process for controlled braze joining of electronic packaging elements |
-
1989
- 1989-02-09 US US07/308,704 patent/US4922322A/en not_active Expired - Lifetime
-
1990
- 1990-02-01 EP EP90101959A patent/EP0382080B1/de not_active Expired - Lifetime
- 1990-02-01 DE DE69026631T patent/DE69026631D1/de not_active Expired - Lifetime
- 1990-02-08 KR KR1019900001527A patent/KR0166967B1/ko not_active IP Right Cessation
- 1990-02-09 JP JP2028648A patent/JPH02246335A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
US4922322A (en) | 1990-05-01 |
EP0382080A3 (de) | 1991-07-03 |
JPH02246335A (ja) | 1990-10-02 |
EP0382080B1 (de) | 1996-04-24 |
KR0166967B1 (ko) | 1999-01-15 |
KR900013625A (ko) | 1990-09-06 |
EP0382080A2 (de) | 1990-08-16 |
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