DE602004009078D1 - Speicherordnung - Google Patents

Speicherordnung

Info

Publication number
DE602004009078D1
DE602004009078D1 DE602004009078T DE602004009078T DE602004009078D1 DE 602004009078 D1 DE602004009078 D1 DE 602004009078D1 DE 602004009078 T DE602004009078 T DE 602004009078T DE 602004009078 T DE602004009078 T DE 602004009078T DE 602004009078 D1 DE602004009078 D1 DE 602004009078D1
Authority
DE
Germany
Prior art keywords
memory order
memory
order
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004009078T
Other languages
English (en)
Other versions
DE602004009078T2 (de
Inventor
Graziano Mirichigni
Andrea Martinelli
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Publication of DE602004009078D1 publication Critical patent/DE602004009078D1/de
Application granted granted Critical
Publication of DE602004009078T2 publication Critical patent/DE602004009078T2/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0416—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
DE602004009078T 2004-10-15 2004-10-15 Speicherordnung Active DE602004009078T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP04105094A EP1647991B1 (de) 2004-10-15 2004-10-15 Speicherordnung

Publications (2)

Publication Number Publication Date
DE602004009078D1 true DE602004009078D1 (de) 2007-10-31
DE602004009078T2 DE602004009078T2 (de) 2008-06-19

Family

ID=34929710

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004009078T Active DE602004009078T2 (de) 2004-10-15 2004-10-15 Speicherordnung

Country Status (3)

Country Link
US (1) US7196943B2 (de)
EP (1) EP1647991B1 (de)
DE (1) DE602004009078T2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080237696A1 (en) * 2004-07-01 2008-10-02 Chih-Hsin Wang Alignment protection in non-volatile memory and array
DE102004055929B4 (de) * 2004-11-19 2014-05-22 Qimonda Ag Nichtflüchtige Speicherzellen-Anordnung
EP1845532B1 (de) * 2006-04-12 2009-04-01 STMicroelectronics S.r.l. Spaltendekodierungssystem für mit Niederspannungstransistoren implementierte Halbleiterspeichervorrichtungen
JP4504397B2 (ja) * 2007-05-29 2010-07-14 株式会社東芝 半導体記憶装置
US7733718B2 (en) * 2007-07-04 2010-06-08 Hynix Semiconductor, Inc. One-transistor type DRAM
US7692975B2 (en) * 2008-05-09 2010-04-06 Micron Technology, Inc. System and method for mitigating reverse bias leakage
US20150071020A1 (en) * 2013-09-06 2015-03-12 Sony Corporation Memory device comprising tiles with shared read and write circuits
US9349447B1 (en) * 2015-03-02 2016-05-24 HGST, Inc. Controlling coupling in large cross-point memory arrays
US20160189755A1 (en) * 2015-08-30 2016-06-30 Chih-Cheng Hsiao Low power memory device
US11087824B2 (en) * 2020-01-10 2021-08-10 Micron Technology, Inc. Column select swizzle

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01113999A (ja) * 1987-10-28 1989-05-02 Toshiba Corp 不揮発性メモリのストレステスト回路
JPH0334198A (ja) * 1989-06-30 1991-02-14 Fujitsu Ltd 書き換え可能な不揮発性メモリ
US5814853A (en) * 1996-01-22 1998-09-29 Advanced Micro Devices, Inc. Sourceless floating gate memory device and method of storing data
US6975539B2 (en) * 1999-01-14 2005-12-13 Silicon Storage Technology, Inc. Digital multilevel non-volatile memory system
US6240020B1 (en) * 1999-10-25 2001-05-29 Advanced Micro Devices Method of bitline shielding in conjunction with a precharging scheme for nand-based flash memory devices
US6175523B1 (en) * 1999-10-25 2001-01-16 Advanced Micro Devices, Inc Precharging mechanism and method for NAND-based flash memory devices
EP1137011B1 (de) * 2000-03-21 2008-12-10 STMicroelectronics S.r.l. Strang-programmierbarer nichtflüchtiger Speicher mit NOR-Architektur
JP2002100196A (ja) * 2000-09-26 2002-04-05 Matsushita Electric Ind Co Ltd 半導体記憶装置
US6480419B2 (en) * 2001-02-22 2002-11-12 Samsung Electronics Co., Ltd. Bit line setup and discharge circuit for programming non-volatile memory
KR100399353B1 (ko) * 2001-07-13 2003-09-26 삼성전자주식회사 시분할 감지 기능을 구비한 불 휘발성 반도체 메모리 장치및 그것의 읽기 방법
KR100463195B1 (ko) * 2001-08-28 2004-12-23 삼성전자주식회사 가속 열 스캔닝 스킴을 갖는 불 휘발성 반도체 메모리 장치
KR100423894B1 (ko) * 2002-05-09 2004-03-22 삼성전자주식회사 저전압 반도체 메모리 장치
KR100465065B1 (ko) * 2002-05-17 2005-01-06 주식회사 하이닉스반도체 클램핑 회로 및 이를 이용한 불휘발성 메모리 소자
JP3833970B2 (ja) * 2002-06-07 2006-10-18 株式会社東芝 不揮発性半導体メモリ
US6717839B1 (en) * 2003-03-31 2004-04-06 Ramtron International Corporation Bit-line shielding method for ferroelectric memories

Also Published As

Publication number Publication date
EP1647991A1 (de) 2006-04-19
US7196943B2 (en) 2007-03-27
US20060083077A1 (en) 2006-04-20
EP1647991B1 (de) 2007-09-19
DE602004009078T2 (de) 2008-06-19

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Legal Events

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