DE60100109T2 - Umschaltbare Testschaltung für asymmetrischen und differentiellen Abschluss - Google Patents

Umschaltbare Testschaltung für asymmetrischen und differentiellen Abschluss

Info

Publication number: DE60100109T2
Authority: DE; Germany
Prior art keywords: asymmetrical; test circuit; differential termination; switchable test; switchable
Prior art date: 2001-03-10
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Lifetime

Application number

DE60100109T

Other languages

English (en)

Other versions

DE60100109D1 (de

Inventor

Bernhard Roth

Henriette Ossoinig

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Verigy Singapore Pte Ltd

Original Assignee

Agilent Technologies Inc

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

2001-03-10

Filing date

2001-03-10

Publication date

2003-10-16

2001-03-10 Application filed by Agilent Technologies Inc filed Critical Agilent Technologies Inc

2003-03-27 Application granted granted Critical

2003-03-27 Publication of DE60100109D1 publication Critical patent/DE60100109D1/de

2003-10-16 Publication of DE60100109T2 publication Critical patent/DE60100109T2/de

2021-03-11 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Links

Classifications

- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31924—Voltage or current aspects, e.g. driver, receiver
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response

Landscapes

Engineering & Computer Science (AREA)
General Engineering & Computer Science (AREA)
Physics & Mathematics (AREA)
General Physics & Mathematics (AREA)
Tests Of Electronic Circuits (AREA)
Dc Digital Transmission (AREA)
Logic Circuits (AREA)

DE60100109T 2001-03-10 2001-03-10 Umschaltbare Testschaltung für asymmetrischen und differentiellen Abschluss Expired - Lifetime DE60100109T2 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
EP01105970A EP1172661B1 (de)	2001-03-10	2001-03-10	Umschaltbare Testschaltung für asymmetrischen und differentiellen Abschluss

Publications (2)

Publication Number	Publication Date
DE60100109D1 DE60100109D1 (de)	2003-03-27
DE60100109T2 true DE60100109T2 (de)	2003-10-16

Family

ID=8176740

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE60100109T Expired - Lifetime DE60100109T2 (de)	2001-03-10	2001-03-10	Umschaltbare Testschaltung für asymmetrischen und differentiellen Abschluss

Country Status (4)

Country	Link
US (1)	US6639397B2 (de)
EP (1)	EP1172661B1 (de)
JP (1)	JP4171229B2 (de)
DE (1)	DE60100109T2 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US6798237B1 (en)	2001-08-29	2004-09-28	Altera Corporation	On-chip impedance matching circuit
US6812732B1 (en)	2001-12-04	2004-11-02	Altera Corporation	Programmable parallel on-chip parallel termination impedance and impedance matching
US6836144B1 (en)	2001-12-10	2004-12-28	Altera Corporation	Programmable series on-chip termination impedance and impedance matching
US6812734B1 (en)	2001-12-11	2004-11-02	Altera Corporation	Programmable termination with DC voltage level control
US7109744B1 (en)	2001-12-11	2006-09-19	Altera Corporation	Programmable termination with DC voltage level control
DE10207676A1 (de) *	2002-02-22	2003-09-04	Philips Intellectual Property	Schaltungsanordnung für einen stromgesteuerten Widerstand mit erweitertem Linearitätsbereich
US6888369B1 (en)	2003-07-17	2005-05-03	Altera Corporation	Programmable on-chip differential termination impedance
DE10338030B3 (de) *	2003-08-19	2005-04-28	Infineon Technologies Ag	Integrierte Schaltung zum Testen von Schaltungskomponenten eines Halbleiterchips
US6859064B1 (en)	2003-08-20	2005-02-22	Altera Corporation	Techniques for reducing leakage current in on-chip impedance termination circuits
US6888370B1 (en)	2003-08-20	2005-05-03	Altera Corporation	Dynamically adjustable termination impedance control techniques
US20050146320A1 (en) *	2003-12-31	2005-07-07	Gohel Tushar K.	Differential active load
US7218155B1 (en)	2005-01-20	2007-05-15	Altera Corporation	Techniques for controlling on-chip termination resistance using voltage range detection
US7221193B1 (en)	2005-01-20	2007-05-22	Altera Corporation	On-chip termination with calibrated driver strength
US7679397B1 (en)	2005-08-05	2010-03-16	Altera Corporation	Techniques for precision biasing output driver for a calibrated on-chip termination circuit
EP1832888B1 (de) *	2006-03-09	2009-06-17	Teradyne, Inc.	V/I-Quelle und Testsystem damit
US7408406B2 (en) *	2006-05-24	2008-08-05	Tektronix, Inc.	Mode selection amplifier circuit usable in a signal acquisition probe
DE102007045756B4 (de) *	2007-09-25	2014-05-15	Texas Instruments Deutschland Gmbh	Elektronische Leiterplatte und Verfahren für das automatische Prüfen
US8278936B2 (en) *	2007-11-23	2012-10-02	Evan Grund	Test circuits and current pulse generator for simulating an electrostatic discharge
US8836383B2 (en) *	2012-09-07	2014-09-16	Richtek Technology Corporation	Multipurpose half bridge signal output circuit
US9813050B1 (en) *	2016-04-13	2017-11-07	Analog Devices, Inc.	Comparator circuit with input attenuator
US10145893B2 (en)	2016-12-25	2018-12-04	Nuvoton Technology Corporation	Resolving automated test equipment (ATE) timing constraint violations

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4646299A (en) *	1983-08-01	1987-02-24	Fairchild Semiconductor Corporation	Method and apparatus for applying and monitoring programmed test signals during automated testing of electronic circuits
FR2648943B1 (fr) *	1989-06-23	1991-10-11	Radiotechnique Compelec	Circuit echantillonneur-bloqueur
US5010297A (en) *	1989-12-01	1991-04-23	Analog Devices, Incorporated	Automatic test equipment with active load having high-speed inhibit mode switching
US5200696A (en) *	1990-09-10	1993-04-06	Ltx Corporation	Test system apparatus with Schottky diodes with programmable voltages
US5101153A (en) *	1991-01-09	1992-03-31	National Semiconductor Corporation	Pin electronics test circuit for IC device testing
US5521493A (en) *	1994-11-21	1996-05-28	Megatest Corporation	Semiconductor test system including a novel driver/load circuit
JP3331109B2 (ja) *	1996-01-23	2002-10-07	株式会社アドバンテスト	半導体試験装置の比較器
JP3672136B2 (ja) *	1996-10-04	2005-07-13	株式会社アドバンテスト	Ｉｃ試験装置
US5942922A (en) *	1998-04-07	1999-08-24	Credence Systems Corporation	Inhibitable, continuously-terminated differential drive circuit for an integrated circuit tester
JP3872594B2 (ja) *	1998-05-21	2007-01-24	株式会社アドバンテスト	半導体試験装置
US6313657B1 (en) *	1998-12-24	2001-11-06	Advantest Corporation	IC testing apparatus and testing method using same
US6211723B1 (en) *	1999-01-20	2001-04-03	Ltx Corporation	Programmable load circuit for use in automatic test equipment
US6275023B1 (en) *	1999-02-03	2001-08-14	Hitachi Electronics Engineering Co., Ltd.	Semiconductor device tester and method for testing semiconductor device

2001
- 2001-03-10 DE DE60100109T patent/DE60100109T2/de not_active Expired - Lifetime
- 2001-03-10 EP EP01105970A patent/EP1172661B1/de not_active Expired - Lifetime
- 2001-10-31 US US09/999,315 patent/US6639397B2/en not_active Expired - Fee Related
2002
- 2002-02-27 JP JP2002051316A patent/JP4171229B2/ja not_active Expired - Fee Related

Also Published As

Publication number	Publication date
US20020125896A1 (en)	2002-09-12
EP1172661A1 (de)	2002-01-16
JP2002311108A (ja)	2002-10-23
EP1172661B1 (de)	2003-02-19
US6639397B2 (en)	2003-10-28
JP4171229B2 (ja)	2008-10-22
DE60100109D1 (de)	2003-03-27

Legal Events

Date

Code

Title

Description

2004-03-18

8364

No opposition during term of opposition

2007-06-21

8327

Change in the person/name/address of the patent owner

Owner name: VERIGY (SINGAPORE) PTE. LTD., SINGAPORE, SG

2012-05-15

R082

Change of representative

Ref document number: 1172661

Country of ref document: EP

Representative=s name: SCHOPPE, ZIMMERMANN, STOECKELER, ZINKLER & PARTNER

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