DE3786330D1 - Paralleldatenverarbeitungsvorrichtung und -verfahren. - Google Patents

Paralleldatenverarbeitungsvorrichtung und -verfahren.

Info

Publication number
DE3786330D1
DE3786330D1 DE8787117412T DE3786330T DE3786330D1 DE 3786330 D1 DE3786330 D1 DE 3786330D1 DE 8787117412 T DE8787117412 T DE 8787117412T DE 3786330 T DE3786330 T DE 3786330T DE 3786330 D1 DE3786330 D1 DE 3786330D1
Authority
DE
Germany
Prior art keywords
data processing
processing device
parallel data
parallel
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787117412T
Other languages
English (en)
Other versions
DE3786330T2 (de
Inventor
Junichi Takahashi
Takashi Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Application granted granted Critical
Publication of DE3786330D1 publication Critical patent/DE3786330D1/de
Publication of DE3786330T2 publication Critical patent/DE3786330T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
  • Multi Processors (AREA)
DE87117412T 1986-11-27 1987-11-25 Paralleldatenverarbeitungsvorrichtung und -verfahren. Expired - Fee Related DE3786330T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28084886 1986-11-27

Publications (2)

Publication Number Publication Date
DE3786330D1 true DE3786330D1 (de) 1993-07-29
DE3786330T2 DE3786330T2 (de) 1993-11-25

Family

ID=17630823

Family Applications (1)

Application Number Title Priority Date Filing Date
DE87117412T Expired - Fee Related DE3786330T2 (de) 1986-11-27 1987-11-25 Paralleldatenverarbeitungsvorrichtung und -verfahren.

Country Status (4)

Country Link
US (1) US5138704A (de)
EP (1) EP0269995B1 (de)
JP (1) JP2637749B2 (de)
DE (1) DE3786330T2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU641418B2 (en) * 1989-09-20 1993-09-23 Fujitsu Limited A parallel data processing system for processing and transmitting data concurrently
FR2663138B1 (fr) * 1990-06-08 1992-09-11 France Etat Procede et circuit de traitement de signaux numeriques representatifs de vecteurs ou tuples de meme dimension et leur application a des ensembles de cardinalite et a des vecteurs ou tuples de dimensions quelconques.
JP2579246B2 (ja) * 1990-12-21 1997-02-05 シャープ株式会社 データ伝送装置
JPH04290155A (ja) * 1991-03-19 1992-10-14 Fujitsu Ltd 並列データ処理方式
WO1993014459A1 (en) * 1992-01-17 1993-07-22 Caelum Research Corporation Modular parallel processing system
US5546598A (en) * 1993-02-04 1996-08-13 Matsushita Electric Industrial Co., Ltd. Working situation management apparatus
JPH07271744A (ja) * 1994-03-31 1995-10-20 Matsushita Electric Ind Co Ltd 並列計算機
JP3125842B2 (ja) * 1995-03-03 2001-01-22 株式会社日立製作所 並列計算機での通信処理方法及びそのシステム
US5708835A (en) * 1995-03-27 1998-01-13 Hughes Electronics Dual-directional parallel processor
JPH0981532A (ja) * 1995-09-08 1997-03-28 Fujitsu Ltd 分散記憶型並列計算機
JP2792501B2 (ja) * 1996-02-28 1998-09-03 日本電気株式会社 データ転送方式およびデータ転送方法
US5999961A (en) * 1997-09-15 1999-12-07 California Institute Of Technology Parallel prefix operations in asynchronous processors
WO2001086467A1 (fr) 2000-05-12 2001-11-15 Fujitsu Limited Controleur de donnees et controleur atm
JP4612546B2 (ja) * 2003-09-22 2011-01-12 日本電気株式会社 並列計算方法及び装置
CN101840383B (zh) * 2010-04-28 2012-07-04 中国科学院自动化研究所 支持连续/离散地址多数据并行访问的可配置存储器
JP5680466B2 (ja) 2011-03-29 2015-03-04 三菱重工業株式会社 並列処理システム及び並列処理システムの動作方法
CN106502806B (zh) * 2016-10-31 2020-02-14 华为技术有限公司 一种总线协议命令处理装置及相关方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52153714A (en) * 1976-06-16 1977-12-21 Matsushita Electric Ind Co Ltd Filing device
JPS54127653A (en) * 1978-03-28 1979-10-03 Toshiba Corp Data processor
WO1982001777A1 (en) * 1980-11-10 1982-05-27 Wang Laboratories Data transmitting link
JPS5953957A (ja) * 1982-09-20 1984-03-28 Sanyo Electric Co Ltd メモリアクセス回路
US4504909A (en) * 1982-09-30 1985-03-12 General Electric Company Method of using an array processor for real time processing
US4546431A (en) * 1982-11-03 1985-10-08 Burroughs Corporation Multiple control stores in a pipelined microcontroller for handling jump and return subroutines
NL192637C (nl) * 1984-02-27 1997-11-04 Nippon Telegraph & Telephone Stelselprocessor.
CA1240400A (en) * 1984-12-20 1988-08-09 Herbert R. Carleton Topologically-distributed-memory multiprocessor computer

Also Published As

Publication number Publication date
US5138704A (en) 1992-08-11
JP2637749B2 (ja) 1997-08-06
JPS63238653A (ja) 1988-10-04
DE3786330T2 (de) 1993-11-25
EP0269995A3 (en) 1989-03-22
EP0269995A2 (de) 1988-06-08
EP0269995B1 (de) 1993-06-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee