DE3684986D1 - Herstellungsverfahren von metallsilicidschichten von niedrigem widerstand auf halbleitersubstraten. - Google Patents
Herstellungsverfahren von metallsilicidschichten von niedrigem widerstand auf halbleitersubstraten.Info
- Publication number
- DE3684986D1 DE3684986D1 DE8686114398T DE3684986T DE3684986D1 DE 3684986 D1 DE3684986 D1 DE 3684986D1 DE 8686114398 T DE8686114398 T DE 8686114398T DE 3684986 T DE3684986 T DE 3684986T DE 3684986 D1 DE3684986 D1 DE 3684986D1
- Authority
- DE
- Germany
- Prior art keywords
- metal silicide
- semiconductor substrates
- resistance metal
- silicide layers
- producing low
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000002184 metal Substances 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- 229910021332 silicide Inorganic materials 0.000 title 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 title 1
- 239000000758 substrate Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
- H01L21/28052—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Electrodes Of Semiconductors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/791,241 US4663191A (en) | 1985-10-25 | 1985-10-25 | Salicide process for forming low sheet resistance doped silicon junctions |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3684986D1 true DE3684986D1 (de) | 1992-05-27 |
Family
ID=25153092
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8686114398T Expired - Fee Related DE3684986D1 (de) | 1985-10-25 | 1986-10-17 | Herstellungsverfahren von metallsilicidschichten von niedrigem widerstand auf halbleitersubstraten. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4663191A (de) |
EP (1) | EP0219827B1 (de) |
JP (2) | JPH079904B2 (de) |
DE (1) | DE3684986D1 (de) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5028554A (en) * | 1986-07-03 | 1991-07-02 | Oki Electric Industry Co., Ltd. | Process of fabricating an MIS FET |
US4873205A (en) * | 1987-12-21 | 1989-10-10 | International Business Machines Corporation | Method for providing silicide bridge contact between silicon regions separated by a thin dielectric |
NL8800222A (nl) * | 1988-01-29 | 1989-08-16 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij op zelfregistrerende wijze metaalsilicide wordt aangebracht. |
US5217923A (en) * | 1989-02-13 | 1993-06-08 | Kabushiki Kaisha Toshiba | Method of fabricating a semiconductor device having silicided source/drain regions |
JP3104271B2 (ja) * | 1991-03-27 | 2000-10-30 | 松下電器産業株式会社 | イオン注入を用いた半導体装置の製造方法 |
US5182232A (en) * | 1991-04-08 | 1993-01-26 | Micron Technology, Inc. | Metal silicide texturizing technique |
US5462895A (en) * | 1991-09-04 | 1995-10-31 | Oki Electric Industry Co., Ltd. | Method of making semiconductor device comprising a titanium nitride film |
US5624869A (en) * | 1994-04-13 | 1997-04-29 | International Business Machines Corporation | Method of forming a film for a multilayer Semiconductor device for improving thermal stability of cobalt silicide using platinum or nitrogen |
JP3360945B2 (ja) * | 1994-07-15 | 2003-01-07 | シャープ株式会社 | 電極構造及びその製造方法 |
US5858838A (en) * | 1998-02-23 | 1999-01-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for increasing DRAM capacitance via use of a roughened surface bottom capacitor plate |
TW337044B (en) * | 1994-11-28 | 1998-07-21 | At & T Corp | Method for manufacturing source/drain formation for flash EEPROM capable of avoiding electrical shorting |
EP0724287A3 (de) * | 1995-01-30 | 1999-04-07 | Nec Corporation | Verfahren zur Herstellung eines Halbleiterbauelements mit einer Titansilizidschicht |
JP2738333B2 (ja) * | 1995-03-30 | 1998-04-08 | 日本電気株式会社 | 半導体装置の製造方法 |
US5856235A (en) * | 1995-04-12 | 1999-01-05 | Northrop Grumman Corporation | Process of vacuum annealing a thin film metallization on high purity alumina |
JP2874626B2 (ja) * | 1996-01-23 | 1999-03-24 | 日本電気株式会社 | 半導体装置の製造方法 |
JPH10195649A (ja) * | 1996-12-27 | 1998-07-28 | Sony Corp | マグネトロンスパッタ装置および半導体装置の製造方法 |
US5911113A (en) | 1997-03-18 | 1999-06-08 | Applied Materials, Inc. | Silicon-doped titanium wetting layer for aluminum plug |
US6046105A (en) * | 1997-04-30 | 2000-04-04 | Texas Instruments Incorporated | Preferential lateral silicidation of gate with low source and drain silicon consumption |
US6040592A (en) * | 1997-06-12 | 2000-03-21 | Intel Corporation | Well to substrate photodiode for use in a CMOS sensor on a salicide process |
JPH11204791A (ja) * | 1997-11-17 | 1999-07-30 | Toshiba Corp | 半導体装置及びその製造方法 |
US5998273A (en) * | 1999-01-25 | 1999-12-07 | International Business Machines Corporation | Fabrication of semiconductor device having shallow junctions |
US6022771A (en) * | 1999-01-25 | 2000-02-08 | International Business Machines Corporation | Fabrication of semiconductor device having shallow junctions and sidewall spacers creating taper-shaped isolation where the source and drain regions meet the gate regions |
US5998248A (en) * | 1999-01-25 | 1999-12-07 | International Business Machines Corporation | Fabrication of semiconductor device having shallow junctions with tapered spacer in isolation region |
US6025242A (en) * | 1999-01-25 | 2000-02-15 | International Business Machines Corporation | Fabrication of semiconductor device having shallow junctions including an insulating spacer by thermal oxidation creating taper-shaped isolation |
DE10010583A1 (de) * | 2000-03-03 | 2001-09-06 | Atmel Germany Gmbh | Verfahren zur Strukturierung und Reinigung von silizidierten Siliziumscheiben |
US6706631B1 (en) * | 2000-07-25 | 2004-03-16 | Advanced Micro Devices, Inc. | Method of controlling sheet resistance of metal silicide regions by controlling the salicide strip time |
JP2002075905A (ja) | 2000-08-29 | 2002-03-15 | Nec Corp | 半導体装置の製造方法 |
US6593234B2 (en) | 2001-07-24 | 2003-07-15 | Micron Technology, Inc. | Methods of utilizing metal rich silicide in forming semiconductor constructions |
US20060130746A1 (en) * | 2003-02-07 | 2006-06-22 | Koichi Terashima | Method for forming nickel silicide film, method for manufacturing semiconductor device, and method for etching nickel silicide |
TWI229917B (en) * | 2003-09-09 | 2005-03-21 | Nanya Technology Corp | Interconnect process and method for removing silicide |
US7371333B2 (en) | 2005-06-07 | 2008-05-13 | Micron Technology, Inc. | Methods of etching nickel silicide and cobalt silicide and methods of forming conductive lines |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5057178A (de) * | 1973-09-17 | 1975-05-19 | ||
US4180596A (en) * | 1977-06-30 | 1979-12-25 | International Business Machines Corporation | Method for providing a metal silicide layer on a substrate |
US4332839A (en) * | 1978-12-29 | 1982-06-01 | Bell Telephone Laboratories, Incorporated | Method for making integrated semiconductor circuit structure with formation of Ti or Ta silicide |
US4337476A (en) * | 1980-08-18 | 1982-06-29 | Bell Telephone Laboratories, Incorporated | Silicon rich refractory silicides as gate metal |
JPS586125A (ja) * | 1981-07-02 | 1983-01-13 | Nec Corp | 半導体装置の製造方法 |
US4389257A (en) * | 1981-07-30 | 1983-06-21 | International Business Machines Corporation | Fabrication method for high conductivity, void-free polysilicon-silicide integrated circuit electrodes |
US4545116A (en) * | 1983-05-06 | 1985-10-08 | Texas Instruments Incorporated | Method of forming a titanium disilicide |
US4470189A (en) * | 1983-05-23 | 1984-09-11 | International Business Machines Corporation | Process for making polycide structures |
JPS6068612A (ja) * | 1983-09-26 | 1985-04-19 | Oki Electric Ind Co Ltd | 半導体素子の製造方法 |
US4563805A (en) * | 1984-03-08 | 1986-01-14 | Standard Telephones And Cables, Plc | Manufacture of MOSFET with metal silicide contact |
US4504521A (en) * | 1984-03-22 | 1985-03-12 | Rca Corporation | LPCVD Deposition of tantalum silicide |
US4567058A (en) * | 1984-07-27 | 1986-01-28 | Fairchild Camera & Instrument Corporation | Method for controlling lateral diffusion of silicon in a self-aligned TiSi2 process |
US4609568A (en) * | 1984-07-27 | 1986-09-02 | Fairchild Camera & Instrument Corporation | Self-aligned metal silicide process for integrated circuits having self-aligned polycrystalline silicon electrodes |
-
1985
- 1985-10-25 US US06/791,241 patent/US4663191A/en not_active Expired - Lifetime
-
1986
- 1986-09-12 JP JP61214228A patent/JPH079904B2/ja not_active Expired - Lifetime
- 1986-10-17 DE DE8686114398T patent/DE3684986D1/de not_active Expired - Fee Related
- 1986-10-17 EP EP86114398A patent/EP0219827B1/de not_active Expired
-
1994
- 1994-08-24 JP JP6199383A patent/JP2565665B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH079904B2 (ja) | 1995-02-01 |
EP0219827A2 (de) | 1987-04-29 |
EP0219827B1 (de) | 1992-04-22 |
US4663191A (en) | 1987-05-05 |
JPS62101049A (ja) | 1987-05-11 |
JPH07153717A (ja) | 1995-06-16 |
EP0219827A3 (en) | 1989-01-11 |
JP2565665B2 (ja) | 1996-12-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |