DE3581888D1 - Halbleiterspeicheranordnung. - Google Patents

Halbleiterspeicheranordnung.

Info

Publication number: DE3581888D1
Authority: DE; Germany
Prior art keywords: semiconductor memory; memory arrangement; arrangement; semiconductor; memory
Prior art date: 1984-11-05
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Fee Related

Application number

DE8585307971T

Other languages

English (en)

Inventor

Shigeki Nozaki

Tsuyoshi Ohira

Masaru Satoh

Tomio Nakano

Yoshihiro Takemae

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Fujitsu Ltd

Original Assignee

Fujitsu Ltd

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1984-11-05

Filing date

1985-11-04

Publication date

1991-04-04

1985-11-04 Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd

1991-04-04 Application granted granted Critical

1991-04-04 Publication of DE3581888D1 publication Critical patent/DE3581888D1/de

2005-11-05 Anticipated expiration legal-status Critical

Status Expired - Fee Related legal-status Critical Current

Links

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals

Landscapes

Engineering & Computer Science (AREA)
Microelectronics & Electronic Packaging (AREA)
Computer Hardware Design (AREA)
Static Random-Access Memory (AREA)
Dram (AREA)
Logic Circuits (AREA)

DE8585307971T 1984-11-05 1985-11-04 Halbleiterspeicheranordnung. Expired - Fee Related DE3581888D1 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP59232733A JPS61110396A (ja)	1984-11-05	1984-11-05	半導体記憶装置

Publications (1)

Publication Number	Publication Date
DE3581888D1 true DE3581888D1 (de)	1991-04-04

Family

ID=16943925

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE8585307971T Expired - Fee Related DE3581888D1 (de)	1984-11-05	1985-11-04	Halbleiterspeicheranordnung.

Country Status (5)

Country	Link
US (1)	US4970693A (de)
EP (1)	EP0181177B1 (de)
JP (1)	JPS61110396A (de)
KR (1)	KR900007999B1 (de)
DE (1)	DE3581888D1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPH0197014A (ja) *	1987-10-09	1989-04-14	Toshiba Corp	半導体集積回路
JP2777136B2 (ja) *	1988-03-08	1998-07-16	株式会社東芝	半導体集積回路の誤動作防止回路
JPH01238217A (ja) *	1988-03-18	1989-09-22	Toshiba Corp	半導体集積回路の誤動作防止回路
US5206833A (en) *	1988-09-12	1993-04-27	Acer Incorporated	Pipelined dual port RAM
JPH0756749B2 (ja) *	1989-09-29	1995-06-14	株式会社東芝	機能選択回路
TW198135B (de) *	1990-11-20	1993-01-11	Oki Electric Ind Co Ltd
US5485430A (en) *	1992-12-22	1996-01-16	Sgs-Thomson Microelectronics, Inc.	Multiple clocked dynamic sense amplifier
JP2605576B2 (ja) *	1993-04-02	1997-04-30	日本電気株式会社	同期型半導体メモリ
KR940026946A (ko) *	1993-05-12	1994-12-10	김광호	데이타출력 확장방법과 이를 통한 신뢰성있는 유효데이타의 출력이 이루어지는 반도체집적회로
JPH0715312A (ja) *	1993-06-15	1995-01-17	Fujitsu Ltd	半導体記憶装置
JP2697634B2 (ja) *	1994-09-30	1998-01-14	日本電気株式会社	同期型半導体記憶装置
US5550783A (en) *	1995-04-19	1996-08-27	Alliance Semiconductor Corporation	Phase shift correction circuit for monolithic random access memory
US8193599B2 (en) *	2009-09-02	2012-06-05	Himax Semiconductor, Inc.	Fabricating method and structure of a wafer level module

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4165541A (en) *	1977-12-12	1979-08-21	Fairchild Camera And Instrument Corporation	Serial-parallel-serial charge-coupled device memory having interlacing and ripple clocking of the parallel shift registers
US4337525A (en) *	1979-04-17	1982-06-29	Nippon Electric Co., Ltd.	Asynchronous circuit responsive to changes in logic level
JPS5835783A (ja) *	1981-08-24	1983-03-02	Fujitsu Ltd	半導体メモリ
US4585955B1 (en) *	1982-12-15	2000-11-21	Tokyo Shibaura Electric Co	Internally regulated power voltage circuit for mis semiconductor integrated circuit
JPS6052112A (ja) *	1983-08-31	1985-03-25	Toshiba Corp	論理回路
US4638182A (en) *	1984-07-11	1987-01-20	Texas Instruments Incorporated	High-level CMOS driver circuit

1984
- 1984-11-05 JP JP59232733A patent/JPS61110396A/ja active Granted
1985
- 1985-11-04 DE DE8585307971T patent/DE3581888D1/de not_active Expired - Fee Related
- 1985-11-04 EP EP85307971A patent/EP0181177B1/de not_active Expired - Lifetime
- 1985-11-05 KR KR1019850008230A patent/KR900007999B1/ko not_active IP Right Cessation
1990
- 1990-02-23 US US07/484,474 patent/US4970693A/en not_active Expired - Fee Related

Also Published As

Publication number	Publication date
KR860004380A (ko)	1986-06-20
EP0181177A2 (de)	1986-05-14
JPS61110396A (ja)	1986-05-28
EP0181177B1 (de)	1991-02-27
US4970693A (en)	1990-11-13
KR900007999B1 (ko)	1990-10-23
EP0181177A3 (en)	1988-03-02
JPH0439158B2 (de)	1992-06-26

Legal Events

Date	Code	Title	Description
1992-03-26	8364	No opposition during term of opposition
2003-09-11	8339	Ceased/non-payment of the annual fee

Publication	Publication Date	Title
DE3585711D1 (de)	1992-04-30	Halbleiterspeicheranordnung.
DE3583091D1 (de)	1991-07-11	Halbleiterspeicheranordnung.
DE3577944D1 (de)	1990-06-28	Halbleiterspeicheranordnung.
DE3686994D1 (de)	1992-11-26	Halbleiterspeicher.
DE3687322D1 (de)	1993-02-04	Halbleiterspeicheranordnung.
DE3582376D1 (de)	1991-05-08	Halbleiterspeicheranordnung.
DE3586377T2 (de)	1993-01-07	Halbleiterspeicheranordnung.
DE3576236D1 (de)	1990-04-05	Halbleiterspeicheranordnung.
DE3577367D1 (de)	1990-05-31	Halbleiterspeicheranordnung.
DE3675445D1 (de)	1990-12-13	Halbleiterspeicheranordnung.
DE3680562D1 (de)	1991-09-05	Halbleiterspeicheranordnung.
DE3586556T2 (de)	1993-01-14	Halbleiterspeicheranordnung.
DE3575225D1 (de)	1990-02-08	Halbleiterspeicheranordnung.
DE3580993D1 (de)	1991-02-07	Halbleiterspeicheranordnung.
DE3576754D1 (de)	1990-04-26	Halbleiterspeicheranordnung.
DE3582960D1 (de)	1991-07-04	Halbleiterspeicheranordnung.
DE3586675D1 (de)	1992-10-29	Halbleiterspeicheranordnung.
DE3578254D1 (de)	1990-07-19	Halbleiterspeicheranordnung.
DE3580454D1 (de)	1990-12-13	Halbleiterspeicheranordnung.
DE3586736D1 (de)	1992-11-12	Halbleiterspeicher.
DE3683783D1 (de)	1992-03-19	Halbleiterspeicheranordnung.
DE3687284T2 (de)	1993-05-06	Halbleiterspeicheranordnung.
DE3682346D1 (de)	1991-12-12	Halbleiterspeicheranordnung.
DE3581888D1 (de)	1991-04-04	Halbleiterspeicheranordnung.
DE3685889D1 (de)	1992-08-13	Halbleiterspeicheranordnung.