DE3580206D1 - Bipolarer transistor und verfahren zu seiner herstellung. - Google Patents

Bipolarer transistor und verfahren zu seiner herstellung.

Info

Publication number
DE3580206D1
DE3580206D1 DE8585109543T DE3580206T DE3580206D1 DE 3580206 D1 DE3580206 D1 DE 3580206D1 DE 8585109543 T DE8585109543 T DE 8585109543T DE 3580206 T DE3580206 T DE 3580206T DE 3580206 D1 DE3580206 D1 DE 3580206D1
Authority
DE
Germany
Prior art keywords
production
bipolar transistor
bipolar
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8585109543T
Other languages
English (en)
Inventor
Shigeru C O Patent Div Komatsu
Takao C O Patent Division Ito
Yasuhiro C O Patent Katsumata
Kiyoshi C O Patent Div Takaoki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP16051884A external-priority patent/JPS6140057A/ja
Priority claimed from JP59258520A external-priority patent/JPS61136266A/ja
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3580206D1 publication Critical patent/DE3580206D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66272Silicon vertical transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2254Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2257Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28525Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53271Conductive materials containing semiconductor material, e.g. polysilicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1004Base region of bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Bipolar Transistors (AREA)
DE8585109543T 1984-07-31 1985-07-30 Bipolarer transistor und verfahren zu seiner herstellung. Expired - Lifetime DE3580206D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP16051884A JPS6140057A (ja) 1984-07-31 1984-07-31 半導体装置及びその製造方法
JP59258520A JPS61136266A (ja) 1984-12-07 1984-12-07 バイポ−ラ型半導体装置の製造方法

Publications (1)

Publication Number Publication Date
DE3580206D1 true DE3580206D1 (de) 1990-11-29

Family

ID=26487001

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585109543T Expired - Lifetime DE3580206D1 (de) 1984-07-31 1985-07-30 Bipolarer transistor und verfahren zu seiner herstellung.

Country Status (2)

Country Link
EP (1) EP0170250B1 (de)
DE (1) DE3580206D1 (de)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8503408A (nl) * 1985-12-11 1987-07-01 Philips Nv Hoogfrequenttransistor en werkwijze ter vervaardiging daarvan.
US5077227A (en) * 1986-06-03 1991-12-31 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for fabricating the same
CA1279410C (en) * 1986-06-06 1991-01-22 Anatoly Feygenson Submicron bipolar transistor with buried silicide region
JPH0628266B2 (ja) * 1986-07-09 1994-04-13 株式会社日立製作所 半導体装置の製造方法
EP0253538B1 (de) * 1986-07-16 1993-03-24 Texas Instruments Incorporated Selbstjustierter VLSI bipolarer Transistor
US4979010A (en) * 1986-07-16 1990-12-18 Texas Instruments Incorporated VLSI self-aligned bipolar transistor
GB2194676B (en) * 1986-07-30 1991-03-20 Mitsubishi Electric Corp A semiconductor integrated circuit device and a method of producing same
GB8621536D0 (en) * 1986-09-08 1986-10-15 British Telecomm Bipolar fabrication process
DE3882251T2 (de) * 1987-01-30 1993-10-28 Texas Instruments Inc Verfahren zum Herstellen eines bipolaren Transistors unter Verwendung von CMOS-Techniken.
US4962053A (en) * 1987-01-30 1990-10-09 Texas Instruments Incorporated Bipolar transistor fabrication utilizing CMOS techniques
US4734382A (en) * 1987-02-20 1988-03-29 Fairchild Semiconductor Corporation BiCMOS process having narrow bipolar emitter and implanted aluminum isolation
US4728391A (en) * 1987-05-11 1988-03-01 Motorola Inc. Pedestal transistors and method of production thereof
US4774204A (en) * 1987-06-02 1988-09-27 Texas Instruments Incorporated Method for forming self-aligned emitters and bases and source/drains in an integrated circuit
EP0306213A3 (de) * 1987-09-02 1990-05-30 AT&T Corp. Submikron-Bipolartransistor mit seitlichen Kontakten
US4818713A (en) * 1987-10-20 1989-04-04 American Telephone And Telegraph Company, At&T Bell Laboratories Techniques useful in fabricating semiconductor devices having submicron features
KR900001034A (ko) * 1988-06-27 1990-01-31 야마무라 가쯔미 반도체장치
JP2666384B2 (ja) * 1988-06-30 1997-10-22 ソニー株式会社 半導体装置の製造方法
KR930004720B1 (ko) * 1988-11-04 1993-06-03 마쯔시따 덴끼 산교 가부시끼가이샤 반도체장치 및 그 제조방법
JPH06101473B2 (ja) * 1988-12-05 1994-12-12 日本電気株式会社 半導体装置
JPH0817180B2 (ja) * 1989-06-27 1996-02-21 株式会社東芝 半導体装置の製造方法
KR920007124A (ko) * 1990-09-04 1992-04-28 김광호 폴리 에미터 바이폴라 트랜지스터의 제조방법
JP3255916B2 (ja) * 1991-02-08 2002-02-12 シーメンス アクチエンゲゼルシヤフト バイポーラトランジスタ構造及びその製造方法
US5256896A (en) * 1991-08-30 1993-10-26 International Business Machines Corporation Polysilicon-collector-on-insulator polysilicon-emitter bipolar transistor
DE69427913T2 (de) * 1994-10-28 2002-04-04 Cons Ric Microelettronica Bipolarer Hochfrequenztransistor und Verfahren zur Herstellung
US5541121A (en) * 1995-01-30 1996-07-30 Texas Instruments Incorporated Reduced resistance base contact method for single polysilicon bipolar transistors using extrinsic base diffusion from a diffusion source dielectric layer
US5614422A (en) * 1995-03-17 1997-03-25 Harris Corporation Process for doping two levels of a double poly bipolar transistor after formation of second poly layer
DE102008050978A1 (de) 2008-10-09 2010-04-15 Bayer Technology Services Gmbh Urankatalysator und Verfahren zu dessen Herstellung sowie dessen Verwendung
DE102008050975A1 (de) 2008-10-09 2010-04-15 Bayer Technology Services Gmbh Mehrstufiges Verfahren zur Herstellung von Chlor
DE102009013905A1 (de) 2009-03-19 2010-09-23 Bayer Technology Services Gmbh Urankatalysator auf Träger besonderer Porengrößenverteilung und Verfahren zu dessen Herstellung, sowie dessen Verwendung

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8103032A (nl) * 1980-08-04 1982-03-01 Fairchild Camera Instr Co Werkwijze voor het vervaardigen van een snelwerkende bipolaire transistor en transistor vervaardigd volgens deze werkwijze.

Also Published As

Publication number Publication date
EP0170250A3 (en) 1986-12-30
EP0170250B1 (de) 1990-10-24
EP0170250A2 (de) 1986-02-05

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee