DE102008023216A1 - MOS-semiconductor power component e.g. MOS power transistor, operating temperature measuring method, involves measuring electrical resistance of gate electrode, and determining temperature of power component from resistance - Google Patents
MOS-semiconductor power component e.g. MOS power transistor, operating temperature measuring method, involves measuring electrical resistance of gate electrode, and determining temperature of power component from resistance Download PDFInfo
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- DE102008023216A1 DE102008023216A1 DE102008023216A DE102008023216A DE102008023216A1 DE 102008023216 A1 DE102008023216 A1 DE 102008023216A1 DE 102008023216 A DE102008023216 A DE 102008023216A DE 102008023216 A DE102008023216 A DE 102008023216A DE 102008023216 A1 DE102008023216 A1 DE 102008023216A1
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- 238000000034 method Methods 0.000 title claims abstract description 22
- 239000004065 semiconductor Substances 0.000 title claims abstract description 22
- 230000001419 dependent effect Effects 0.000 claims abstract description 5
- 238000005259 measurement Methods 0.000 claims description 31
- 239000007772 electrode material Substances 0.000 claims description 9
- 238000000926 separation method Methods 0.000 claims description 9
- 238000009529 body temperature measurement Methods 0.000 claims description 8
- 238000001514 detection method Methods 0.000 claims description 5
- 238000011156 evaluation Methods 0.000 claims 1
- 239000004020 conductor Substances 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 230000006378 damage Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 238000005457 optimization Methods 0.000 description 2
- BUHVIAUBTBOHAG-FOYDDCNASA-N (2r,3r,4s,5r)-2-[6-[[2-(3,5-dimethoxyphenyl)-2-(2-methylphenyl)ethyl]amino]purin-9-yl]-5-(hydroxymethyl)oxolane-3,4-diol Chemical compound COC1=CC(OC)=CC(C(CNC=2C=3N=CN(C=3N=CN=2)[C@H]2[C@@H]([C@H](O)[C@@H](CO)O2)O)C=2C(=CC=CC=2)C)=C1 BUHVIAUBTBOHAG-FOYDDCNASA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 238000013021 overheating Methods 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000035484 reaction time Effects 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 238000005496 tempering Methods 0.000 description 1
- 230000002123 temporal effect Effects 0.000 description 1
- 238000012549 training Methods 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
- G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
- G01K7/16—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements
- G01K7/18—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements the element being a linear resistance, e.g. platinum resistance thermometer
- G01K7/186—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements the element being a linear resistance, e.g. platinum resistance thermometer using microstructures
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
- G01K1/00—Details of thermometers not specially adapted for particular types of thermometer
- G01K1/14—Supports; Fastening devices; Arrangements for mounting thermometers in particular locations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/4238—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
- G01K2217/00—Temperature measurement using electric or magnetic components already present in the system to be measured
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Description
Die Erfindung bezieht sich auf ein Verfahren zur Betriebstemperaturmessung von MOS-gesteuerten Halbleiterleistungsbauelementen wie z. B. eines MOS-Leistungstransistors oder eines IGBT, sowohl auf Bauelemente mit einer Transistorzelle als auch auf solche, die aus einer Vielzahl identischer und parallel geschalteter Einzelzellen bestehen, bei denen die Gesamtbauelementfläche groß im Vergleich zur Fläche der Einzelzelle ist, und die aktive Fläche des Halbleiterchips in einzelne voneinander elektrisch isolierte Teile des Gateelektrodennetzwerkes unterteilt sein kann, wobei zur Durchführung des Verfahrens das entsprechende Bauelement mit zusätzlichen elektrischen Gatekontakten versehen ist. Die Erfindung bezieht sich weiterhin sowohl auf Halbleiterleistungsbauelemente mit vertikalem Stromfluss durch das Halbleiterchip als auch auf Bauelemente zur Integration in einem so genannten Smart-Power-IC mit lateralem Fluss des Hauptstromes und kommt zur Anwendung in Bauelementen aus Halbleitermaterial Silizium aber auch aus anderen Halbleitermaterialien, z. B. Siliziumkarbid (SiC), in Betracht, wobei es dann jeweils einen zusätzlichen elektrischen Kontakt je Bauelement gibt. Zur Durchführung des Verfahrens wird während des Bauelementbetriebes dessen Temperatur integral oder in einzelnen Flächenelementen des Bauelementchip gemessen. Einerseits wird damit dafür gesorgt, dass kein frühzeitiger Ausfall des Bauelementes durch Überlastung erfolgt, andererseits kann die mögliche Bauelementleistung besser ausgeschöpft werden.The The invention relates to a method for operating temperature measurement of MOS-controlled semiconductor power devices such. B. a MOS power transistor or an IGBT, both on devices with a transistor cell as well as those coming from a variety of identical and parallel switched single cells exist in which the total component area is large compared to the area of the single cell, and the active area of the semiconductor chip in individual from each other divided electrically isolated parts of the gate electrode network may be, wherein the implementation of the method Component with additional electrical gate contacts is provided. The invention further relates to both semiconductor power devices with vertical current flow through the semiconductor chip as well Components for integration in a so-called Smart Power IC with lateral flow of the main stream and is used in Components of semiconductor material silicon but also from others Semiconductor materials, eg. As silicon carbide (SiC), into consideration it then each one additional electrical contact each component gives. To carry out the process will during component operation, its temperature is integral or measured in individual surface elements of the component chip. On the one hand will ensure that no early Failure of the device is done by overload, on the other hand can better exploit the possible component performance become.
Wünschenswert ist ein Betrieb der Halbleiterbauelemente nahe der durch Bauelementzuverlässigkeit und Einhaltung der Bauelementkenndaten gesetzten oberen Temperaturgrenze von je nach Bauelementtyp und Entwicklungsstand z. B. 150°C bis 200°C. Die während des Betriebes durch die umgesetzte elektrische Verlustleistung auftretende Wärme muss abgeführt werden. Der Betrieb bei der prinzipiell durch die Bauelementkonstruktion vorgegebenen oberen Temperaturgrenze und deren Einhaltung ist meist nur eingeschränkt möglich, da auf Grund inhomogener Wärmeableiteigenschaften und/oder einer inhomogenen elektrischen Ansteuerung des Bauelements eine inhomogene Temperaturverteilung über die Bauelementoberfläche mit lokalen Temperaturspitzen, so genannten Hot- Spots entsteht. Unter Umständen kann durch eine thermisch/elektrische Mitkopplung die Temperatur der Hot-Spots sich dabei unkontrolliert bis zur Zerstörung des Bauelements erhöhen. Von besonderer Bedeutung ist diese thermische Grenzbelastung bei periodischem oder einmaligem Betreib des Bauelements nahe der elektrischen und thermischen Belastungsgrenzen, wie z. B. dem ungeklemmten Abschalten einer induktiven Last oder dem Abschalten des Bauelements nach dem Auftreten eines Kurzschlusses der Last.Desirable is an operation of the semiconductor devices close to that by device reliability and compliance with the device characteristics set upper temperature limit depending on the type of component and level of development z. B. 150 ° C to 200 ° C. The implemented during operation by the Electric heat loss occurring heat must be dissipated become. The operation in principle by the component construction given upper temperature limit and compliance is usually only limited possible, because due to inhomogeneous Heat dissipation properties and / or an inhomogeneous electrical Actuation of the device an inhomogeneous temperature distribution over the device surface with local temperature peaks, so-called hot spots is created. May be through a thermal / electrical positive feedback the temperature of the hot spots uncontrolled until the destruction of the device increase. Of particular importance is this thermal Limit load for periodic or single operation of the device near the electrical and thermal load limits, such. B. unchecked shutdown of an inductive load or shutdown of the device after the occurrence of a short circuit of the load.
Zur Lösung des Problems des sicheren Bauelementebetriebes, d. h. zum Vorbeugen einer Zerstörung bestehen verschiedene Wege.to Solving the problem of safe component operation, d. H. There are several ways to prevent destruction Ways.
Ein
Weg ist die Vorausberechnung und/oder die direkte Messung der Temperaturentwicklung
in Abhängigkeit von der dissipierten Verlustleistung und Angabe
eines transienten thermischen Widerstandes mit Hilfe dessen sich
dann die im aktuellen Bereich auftretende Chiptemperaturen berechnen
lassen, wie das bei
Da es sich hierbei in der Regel um eine auf die ganze Bauelementchipfläche bezogene Angabe handelt, können innerhalb der Bauelementchipfläche unterschiedliche Temperaturen nicht beschrieben werden und insbesondere das Auftreten von Hot-Spots nicht vermieden werden.There this is usually one on the entire device chip surface may be different within the device chip area Temperatures are not described and in particular the occurrence Hot spots can not be avoided.
Eine
andere Möglichkeit ist die Messung der während
des Betriebes des Bauelements auftretenden Temperatur mit Hilfe
eines eigens zu diesem Zweck in das Bauelement oder in die unmittelbare Umgebung
des Bauelements integrierten Temperatursensors, z. B. eines in Durchlassrichtung
betriebenen pn-Überganges, wie das zu entnehmen ist bei:
Nachteilig bei dem Verfahren ist, dass die Temperatur nur jeweils am Ort eines solchen Sensors gemessen werden kann und die Zahl der zu integrierenden Sensoren wegen ihres Chipflächenverbrauchs begrenzt ist. Darüber hinaus besteht zwischen Temperatursensor und benachbartem aktiven Bauelementbereich ein designtechnisch bedingter Mindestabstand, der dazu führt, dass die am Ort des Sensors gemessene Temperatur und die Temperatur im benachbarten aktiven Chipbereich voneinander abweichen und eine zeitliche Änderung der Temperatur des aktiven Chipbereiches erst mit erheblicher Verzögerung am Sensor gemessen wird.adversely In the process, the temperature is only at the place of one such sensor can be measured and the number of integrating Sensors is limited because of their chip area consumption. In addition, there is between temperature sensor and adjacent active device area a design-related minimum distance, which causes the temperature measured at the location of the sensor and the temperature in the adjacent active chip area are different and a temporal change in the temperature of the active Chip area only with considerable delay at the sensor is measured.
In
vielen Fällen, insbesondere wenn der aktive Bauelementbereich
von einem nicht elektrisch aktiven, jedoch zur Wärmeableitung
beitragenden Chipbereich umgeben ist, kommt es zu in der Mitte der
Bauelementfläche zentrierten Hot-Spots. Ein bekanntes Verfahren
zur Vermeidung dieser Hot-Spots besteht darin, dass man die im Zentrum
des Bauelementes gelegenen aktiven Zellen, z. B. eines vertikalen
Leistungs-MOSFET, durch das Layout mit einem größeren
Wert des Einschaltwiderstandes versieht als Zellen der peripheren
Chipbereiche, wie das bekannt ist durch:
Zweck der Erfindung ist es, bei der Messung der Temperatur des Halbleiterchips während des Betriebes des MOS-gesteuerten Halbleiterbauelementes die Genauigkeit und Schnelligkeit der Reaktionszeit bei Gegenmaßnahmen, z. B. bei Überhitzung zu steigern und damit die Bauelementezuverlässigkeit zu steigern.purpose The invention is in the measurement of the temperature of the semiconductor chip during operation of the MOS controlled semiconductor device the accuracy and speed of reaction time for countermeasures, z. B. increase in overheating and thus the component reliability increase.
Der Erfindung liegt die Aufgabe zu Grunde, ein elektrisches Temperaturmessverfahren der Betriebstemperatur und ein modifiziertes Bauelement zur Durchführung des Verfahrens anzugeben, welches die Überwachung des Bauelementes verbessert, d. h. Temperaturmesswerte ohne Zeitverzögerung liefert, keine zusätzlichen Flächen für Temperatursensoren benötigt und ggf. ortsbezogene Temperwerte liefern kann.Of the Invention is based on the object, an electrical temperature measuring method the operating temperature and a modified device for implementation specify the method, which monitoring the device improved, d. H. Temperature readings without time delay delivers, no additional space for Temperature sensors required and, if necessary, location-specific tempering values can deliver.
Gelöst wird diese Aufgabe mit den in den Ansprüchen 1 bis 4, 6, 8, 10 und 13 angegebenen Merkmalen.Solved This object is achieved with the in the claims 1 to 4, 6, 8, 10 and 13 specified characteristics.
Vorteilhafte Ausgestaltungen der Gegenstände der Ansprüche 1 bis 4, 6, 8, 10 und 13 sind in den übrigen Unteransprüchen gegeben.advantageous Embodiments of the subject matters of the claims 1 to 4, 6, 8, 10 and 13 are in the remaining subclaims where.
Die Gegenstände dieser Ansprüche weisen die Vorteile auf, dass Betriebstemperaturen genau, ortsnah und mit einer vernachlässigbaren Zeitverzögerung gemessen werden können. Die Ausbildung von Hot Spots kann schneller erkannt und einem Ausfall des Bauelementes besser vorgebeugt werden. Damit wir die Zuverlässigkeit verbessert. Während des Betriebes des Bauelementes wird der temperaturabhängige elektrische Widerstand der Gateelektrode oder des sowieso vorhandenen Gateelektrodennetzwerkes gemessen und bei bekanntem Temperaturkoeffizienten des Widerstandes des Gateelektrodenmaterials zur Bestimmung der aktuellen Bauelementtemperatur am Messort benutzt. Das üblicherweise nur mit einem Kontakt versehene Gateelektrodennetzwerk muss zur Widerstandsmessung mit mindestens einem zusätzlichen Kontakt versehen werden. Die ortsaufgelöste Erfassung der Temperatur geschieht durch mehrere von solchen zusätzlichen Kontaktierungen des Gateelektrodennetzwerkes, so dass durch die Widerstandsmessung zwischen jeweils zwei benachbarten Kontakten die Temperatur im Bereich zwischen diesen beiden Kontakten bestimmt werden kann. Zweckmäßigerweise wird die Gateelektrode bzw. das Gateelektrodennetzwerk in voneinander isolierte Segmente aufgeteilt, die dann unabhängig voneinander ohne Störeinflüsse gemessen werden können.The Objects of these claims have the advantages on that operating temperatures accurate, local and with a negligible Time delay can be measured. The training of Hot spots can be detected faster and a failure of the device be better prevented. So we reliability improved. During operation of the device is the temperature-dependent electrical resistance of the gate electrode or the anyway existing gate electrode network measured and at a known temperature coefficient of resistance of the gate electrode material used to determine the current component temperature at the measurement location. The usually only provided with a contact gate electrode network must for resistance measurement with at least one additional Be provided contact. The spatially resolved capture of Temperature happens through several of such additional ones Contacts of the gate electrode network, so that through the Resistance measurement between each two adjacent contacts the temperature in the area between these two contacts determined can be. Conveniently, the gate electrode or the gate electrode network in segments isolated from each other split, which then measured independently without interference can be.
Grundsätzlich ist diese Verfahrensweise bei allen Gateelektrodenmaterialien mit einem geeigneten Temperaturkoeffizienten des Widerstandes zu verwenden. Da die Gateelektrode zum großen Teil nur über ein dünnes Gateoxid thermisch an das darunter liegende Silizium gekoppelt ist, stellt die gemessene Gateelektrodentemperatur ein gutes Maß für die Temperatur des darunter liegenden Siliziums dar. Außerdem folgt dadurch die Gateelektrodentemperatur mit nur einer sehr geringen Verzögerung einer Temperaturänderung im darunter liegenden Silizium.in principle is this procedure with all gate electrode materials with to use a suitable temperature coefficient of resistance. Since the gate electrode for the most part only over a thin gate oxide thermally to the underlying Silicon is coupled, represents the measured gate electrode temperature a good measure of the temperature of the underneath In addition, this is followed by the gate electrode temperature with only a very slight delay of a temperature change in the underlying silicon.
Durch die Positionierung der zusätzlichen Gatekontakte besteht eine weitestgehende Flexibilität bezüglich Ausdehnung und Position des durch die Temperaturmessung erfassten Bauelementbereichs. Mit weit auseinander liegenden Kontakten kann die mittlere Temperatur ausgewählter Flächensegmente des Bauelements bestimmt werden, z. B. die Temperatur in konzentrischen ringförmigen Segmenten der Bauelementfläche. Andererseits lässt sich durch sehr nahe beieinander liegende Gatekontakte die Temperatur mit hoher Ortsauflösung bestimmen.By the positioning of the additional gate contacts is the greatest possible flexibility in terms of expansion and position of the device region detected by the temperature measurement. With far apart contacts can be the mean temperature selected surface segments of the device determined be, for. As the temperature in concentric annular Segments of the component surface. On the other hand lets the temperature is due to very close gate contacts determine with high spatial resolution.
Da die Messspannung zur Bestimmung des Gatewiderstandes klein im Vergleich zur Gatespannung bei ausgesteuertem Bauelement gewählt werden kann, ist die Messung des Gatewiderstandes durch eine der Gatespannung überlagerte Hilfsspannung und damit während des Betriebes des Bauelements möglich. Mit geeigneten Ansteuer- und Signalauswerteschaltungen lassen sich Gleichspannung oder Wechselspannung als Sonde zur Widerstandsmessung verwenden. Wechselspannungsmessungen besitzen dabei den Vorteil der größeren Empfindlichkeit und besseren Entkopplung der Temperaturmessung von der primären Gateansteuerung.There the measurement voltage for determining the gate resistance small in comparison selected for gate voltage with switched component can be, is the measurement of the gate resistance by one of Gate voltage superimposed auxiliary voltage and thus during the operation of the device possible. With suitable control and Signalauswerteschaltungen can be DC or AC voltage use as a probe for resistance measurement. AC voltage measurements have the advantage of greater sensitivity and better decoupling of the temperature measurement from the primary Gate drive.
Die Erfindung wird nun anhand eines Ausführungsbeispiels unter Zuhilfenahme der schematischen Zeichnung erläutert. Es zeigenThe Invention will now be based on an embodiment below With the aid of the schematic drawing explained. It demonstrate
Der
gemäß der Erfindung modifizierte MOS-Transistor
der
In
den
Das
in
Die
bei der Widerstandsmessung erforderlichen Stromeinspeisungskontakte
und Kontakte zur Spannungsmessung sind dabei in der in der
- 11
- Source-Body-BereichSourcebody area
- 22
- DriftzonenbereichDrift zone area
- 33
- Drainbereichdrain region
- 44
- Gateelektrodegate electrode
- 55
- Sourcekontakt (Source-Leiterbahn)source contact (Source track)
- 66
- Drainkontakt (Drain-Leiterbahn)drain contact (Drain conductor)
- 77
- Gatekontaktgate contact
- 71(1)71 (1)
- erster Gatekontakt des Gateabschittes 1first Gate contact of the gate section 1
- 72(1)72 (1)
- zweiter Gatekontakt des Gateabschittes 1second Gate contact of the gate section 1
- 71(2)71 (2)
- erster Gatekontakt des Gateabschittes 2first Gate contact of the gate section 2
- 72(2)72 (2)
- zweiter Gatekontakt des Gateabschittes 2second Gate contact of the gate section 2
- 71(3)71 (3)
- erster Gatekontakt des Gateabschnittes 3first Gate contact of the gate section 3
- 72(3)72 (3)
- zweiter Gatekontakt des Gateabschnittes 3second Gate contact of the gate section 3
- 71(4)71 (4)
- erster Gatekontakt für 4-Punktmesseungfirst Gate contact for 4-point measurement
- 72(4)72 (4)
- zweiter Gatekontakt für 4-Punktmesseungsecond Gate contact for 4-point measurement
- 73(4)73 (4)
- dritter Gatekontakt für 4-Punktmesseungthird Gate contact for 4-point measurement
- 74(4)74 (4)
- vierter erster Gatekontakt für 4-Punktmesseungfourth first gate contact for 4-point measurement
- 88th
- Kontaktpunkt der Gateelektrodecontact point the gate electrode
- 99
- zusätzlicher Kontaktpunkt der Gateelektrodeadditional Contact point of the gate electrode
- 1010
- zusätzlicher Gatekontakt (Leiterbahn des zusätzlichen Kontaktpunktes der Gateelektrodeadditional Gate contact (trace of the additional contact point the gate electrode
- 1111
- zusätzlicher Kontaktpunkt der Gateelektrodeadditional Contact point of the gate electrode
- 1212
-
zusätzlicher
Gatekontakt (Leiterbahn des zusätzlichen Kontaktpunktes
(
11 ) der Gateelektrodeadditional gate contact (trace of the additional contact point (11 ) of the gate electrode - 1313
- zusätzlicher Kontaktpunkt der Gateelektrodeadditional Contact point of the gate electrode
- 1414
-
zusätzlicher
Gatekontakt (Leiterbahn des zusätzlichen Kontaktpunktes
(
13 ) der Gateelektrodeadditional gate contact (trace of the additional contact point (13 ) of the gate electrode - 1515
- zusätzlicher Kontaktpunkt der Gateelektrodeadditional Contact point of the gate electrode
- 1616
-
zusätzlicher
Gatekontakt (Leiterbahn des zusätzlichen Kontaktpunktes
(
15 ) der Gateelektrodeadditional gate contact (trace of the additional contact point (15 ) of the gate electrode - 1717
- Trennstelle der Gateelektrodeseparation point the gate electrode
- 1818
- überkreuzende Leiterbahnenintersecting conductor tracks
- 1919
- Randbereich des großflächigen MOS-Transistorsborder area of the large-area MOS transistor
- 2020
-
fingerförmige
Einzelzelle wie in
1 –3 finger-shaped single cell as in1 -3 - B1B1
- Bereich 1 des MOS-TransistorsArea 1 of the MOS transistor
- B2B2
- Bereich 2 des MOS-TransistorsArea 2 of the MOS transistor
- B3B3
- Bereich 3 des MOS-TransistorsArea 3 of the MOS transistor
ZITATE ENTHALTEN IN DER BESCHREIBUNGQUOTES INCLUDE IN THE DESCRIPTION
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Zitierte Nicht-PatentliteraturCited non-patent literature
- - D. Schröder, ”Leistungselektronische Bauelemente”, Kap. 10, Springer-Verlag, Berlin Heidelberg, 2006 [0004] - D. Schröder, "Power Electronic Components", Chap. 10, Springer-Verlag, Berlin Heidelberg, 2006 [0004]
- - V. Khemka et al., ”Detection and Optimization of Temperature Distribution Across Large Area Power MOSFETs to improve Energy Capability”, IEEE Transactions an Electron Devices, Vol. 51, No. 6, 1025–1032, 2004 [0006] V. Khemka et al., "Detection and Optimization of Temperature Distribution Across Large Area Power MOSFETs to Improve Energy Capability", IEEE Transactions to Electron Devices, Vol. 6, 1025-1032, 2004 [0006]
- - M. Glavanovics and H. Zitta, „Dynamic Hot Spot Temperature Sensing in Smart Power Switches”, ESSCIRC 2002, 295–298, 2002 [0006] - M. Glavanovics and H. Zitta, "Dynamic Hot Spot Temperature Sensing in Smart Power Switches", ESSCIRC 2002, 295-298, 2002 [0006]
- - V. Khemka et al., ”Detection and Optimization of Temperature Distribution Across Large Area Power MOSFETs to improve Energy Capability”, IEEE Transactions an Electron Devices, Vol. 51, No. 6, 1025–1032, 2004 [0008] V. Khemka et al., "Detection and Optimization of Temperature Distribution Across Large Area Power MOSFETs to Improve Energy Capability", IEEE Transactions to Electron Devices, Vol. 6, 1025-1032, 2004 [0008]
- - Van der Pauw, L. J., „Messung des spez. Widerstandes und des Hall-Koeffizienten an Scheiben beliebiger Form”, Philips Techn. Rundschau, No. 20, 230, 1959 [0028] - Van der Pauw, LJ, "Measurement of the spec. Resistance and the Hall coefficient of disks of any shape ", Philips Techn. 20, 230, 1959 [0028]
Claims (15)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
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DE102008023216A DE102008023216A1 (en) | 2008-05-19 | 2008-05-19 | MOS-semiconductor power component e.g. MOS power transistor, operating temperature measuring method, involves measuring electrical resistance of gate electrode, and determining temperature of power component from resistance |
PCT/EP2009/056070 WO2009141347A1 (en) | 2008-05-19 | 2009-05-19 | Operating temperature measurement for an mos power component, and mos component for carrying out the method |
US12/993,559 US20110182324A1 (en) | 2008-05-19 | 2009-05-19 | Operating temperature measurement for an mos power component, and mos component for carrying out the method |
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DE102008023216A DE102008023216A1 (en) | 2008-05-19 | 2008-05-19 | MOS-semiconductor power component e.g. MOS power transistor, operating temperature measuring method, involves measuring electrical resistance of gate electrode, and determining temperature of power component from resistance |
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DE102008023216A1 true DE102008023216A1 (en) | 2009-12-03 |
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DE102008023216A Withdrawn DE102008023216A1 (en) | 2008-05-19 | 2008-05-19 | MOS-semiconductor power component e.g. MOS power transistor, operating temperature measuring method, involves measuring electrical resistance of gate electrode, and determining temperature of power component from resistance |
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Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
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DE102010029147A1 (en) * | 2010-05-20 | 2011-11-24 | Semikron Elektronik Gmbh & Co. Kg | Method for determining the temperature of a power semiconductor |
DE102010050315C5 (en) * | 2010-11-05 | 2014-12-04 | Danfoss Silicon Power Gmbh | Process for the production of sintered electrical assemblies and power semiconductor modules made therewith |
WO2015105625A1 (en) * | 2014-01-09 | 2015-07-16 | Marvell World Trade Ltd. | Method and apparatus for mitigating effects of parasitic capacitance in semiconductor devices |
DE102014013493A1 (en) | 2014-09-08 | 2016-03-10 | Elmos Semiconductor Aktiengesellschaft | Method for regulating the power load of a MOS power transistor |
DE102014013482A1 (en) | 2014-09-08 | 2016-03-10 | Elmos Semiconductor Aktiengesellschaft | 3D integrated monolithic circuit and associated electronic components for regulating the power load of a MOS power transistor |
DE102014013483A1 (en) | 2014-09-08 | 2016-03-10 | Elmos Semiconductor Aktiengesellschaft | Temperature measuring device for regulating the power load of a MOS power transistor |
DE102014013484A1 (en) | 2014-09-08 | 2016-03-10 | Elmos Semiconductor Aktiengesellschaft | Method for regulating the power load of a MOS power transistor by means of a polycrystalline PN diode |
DE102014013490A1 (en) | 2014-09-08 | 2016-03-10 | Elmos Semiconductor Aktiengesellschaft | Temperature measuring device for regulating the power load of a power transistor |
DE102014013485A1 (en) | 2014-09-08 | 2016-03-10 | Elmos Semiconductor Aktiengesellschaft | Method for regulating the power load of a MOS power transistor by means of a polycrystalline PNP or PNP transistor |
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US6948847B2 (en) * | 2002-05-08 | 2005-09-27 | Infineon Technologies Ag | Temperature sensor for a MOS circuit configuration |
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2008
- 2008-05-19 DE DE102008023216A patent/DE102008023216A1/en not_active Withdrawn
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Publication number | Priority date | Publication date | Assignee | Title |
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US6948847B2 (en) * | 2002-05-08 | 2005-09-27 | Infineon Technologies Ag | Temperature sensor for a MOS circuit configuration |
DE10220587B4 (en) * | 2002-05-08 | 2007-07-19 | Infineon Technologies Ag | Temperature sensor for MOS circuitry |
Non-Patent Citations (4)
Title |
---|
D. Schröder, "Leistungselektronische Bauelemente", Kap. 10, Springer-Verlag, Berlin Heidelberg, 2006 |
M. Glavanovics and H. Zitta, "Dynamic Hot Spot Temperature Sensing in Smart Power Switches", ESSCIRC 2002, 295-298, 2002 |
V. Khemka et al., "Detection and Optimization of Temperature Distribution Across Large Area Power MOSFETs to improve Energy Capability", IEEE Transactions an Electron Devices, Vol. 51, No. 6, 1025-1032, 2004 |
Van der Pauw, L. J., "Messung des spez. Widerstandes und des Hall-Koeffizienten an Scheiben beliebiger Form", Philips Techn. Rundschau, No. 20, 230, 1959 |
Cited By (16)
Publication number | Priority date | Publication date | Assignee | Title |
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DE102010029147A1 (en) * | 2010-05-20 | 2011-11-24 | Semikron Elektronik Gmbh & Co. Kg | Method for determining the temperature of a power semiconductor |
DE102010029147B4 (en) * | 2010-05-20 | 2012-04-12 | Semikron Elektronik Gmbh & Co. Kg | Method for determining the temperature of a power semiconductor |
US9010999B2 (en) | 2010-05-20 | 2015-04-21 | Semikron Elektronik Gmbh & Co., Kg | Method for determining the temperature of a power semiconductor |
EP2388563A3 (en) * | 2010-05-20 | 2015-05-27 | SEMIKRON Elektronik GmbH & Co. KG | Method for determining the temperature of a power semiconductor |
DE102010050315C5 (en) * | 2010-11-05 | 2014-12-04 | Danfoss Silicon Power Gmbh | Process for the production of sintered electrical assemblies and power semiconductor modules made therewith |
US9397218B2 (en) | 2014-01-09 | 2016-07-19 | Marvell World Trade Ltd. | Method and apparatus for mitigating effects of parasitic capacitance in semiconductor devices |
WO2015105625A1 (en) * | 2014-01-09 | 2015-07-16 | Marvell World Trade Ltd. | Method and apparatus for mitigating effects of parasitic capacitance in semiconductor devices |
DE102014013493A1 (en) | 2014-09-08 | 2016-03-10 | Elmos Semiconductor Aktiengesellschaft | Method for regulating the power load of a MOS power transistor |
DE102014013482A1 (en) | 2014-09-08 | 2016-03-10 | Elmos Semiconductor Aktiengesellschaft | 3D integrated monolithic circuit and associated electronic components for regulating the power load of a MOS power transistor |
DE102014013483A1 (en) | 2014-09-08 | 2016-03-10 | Elmos Semiconductor Aktiengesellschaft | Temperature measuring device for regulating the power load of a MOS power transistor |
DE102014013484A1 (en) | 2014-09-08 | 2016-03-10 | Elmos Semiconductor Aktiengesellschaft | Method for regulating the power load of a MOS power transistor by means of a polycrystalline PN diode |
DE102014013490A1 (en) | 2014-09-08 | 2016-03-10 | Elmos Semiconductor Aktiengesellschaft | Temperature measuring device for regulating the power load of a power transistor |
DE102014013485A1 (en) | 2014-09-08 | 2016-03-10 | Elmos Semiconductor Aktiengesellschaft | Method for regulating the power load of a MOS power transistor by means of a polycrystalline PNP or PNP transistor |
DE102014013482B4 (en) | 2014-09-08 | 2018-07-05 | Elmos Semiconductor Aktiengesellschaft | Bipolar electronic component |
DE102014013493B4 (en) | 2014-09-08 | 2023-02-09 | Elmos Semiconductor Se | Method of controlling the power loading of a MOS power transistor |
DE102014013485B4 (en) | 2014-09-08 | 2023-02-09 | Elmos Semiconductor Se | Device for regulating the power load of a MOS power transistor using a polycrystalline NPN or PNP transistor |
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