CN2874629Y - Error insert analogue device of computer test - Google Patents
Error insert analogue device of computer test Download PDFInfo
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- CN2874629Y CN2874629Y CN 200520046043 CN200520046043U CN2874629Y CN 2874629 Y CN2874629 Y CN 2874629Y CN 200520046043 CN200520046043 CN 200520046043 CN 200520046043 U CN200520046043 U CN 200520046043U CN 2874629 Y CN2874629 Y CN 2874629Y
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Abstract
The utility model discloses an insertion error simulator for computer test and collaborates with peripheral interfaces to verify the automatic error detection and correction on the hardware interface of computer mainboard. The simulator is connected with the hardware interface as above and comprises a PCI interface error simulating module, a storage interface error simulating module, an IDE interface error simulating module and a reverse storage interface error simulating module with relatively independent function. In addition, the device simulates peripheral interface devices, generates an error signal and transmits the signal to the corresponding interface of the mainboard to verify and test the mainboard function integrality according to whether the hardware interface can detect and correct the error signal. The utility model tackles the industry fails to verify the automatic error detection and correction function of the mainboard, shows optimal applicability and can be widely applied to various computer mainboard tests.
Description
Technical field
The utility model relates to a kind of computer testing device, especially relates to a kind of mistake simulation that is used for the test computer mainboard and inserts device.
Background technology
No matter it is the manufacturing or a research stage of computer motherboard, all need mainboard is done relevant validation test, such as, the pci bus of testing host, network function, multimedia function or the like, the general means of testing of industry is: the one, adopt the good peripheral device of known function that a certain function of mainboard is done test; Another means are to adopt simulation softward to do validation test.
But, the means of testing that industry is known, can't do comprehensive functional test to computer motherboard, especially the various hardware interfaces of present major part are contained automatic error-detecting and correct function (Error Checkingand Correcting, ECC) can't test especially or simplation verification, so need the test simulator of a kind of novel computer motherboard of exploitation, especially can test the mainboard that has automatic error-detecting and correct the hardware interface of function.
Summary of the invention
The purpose of this utility model is to provide a kind of mistake that is used for computer testing to insert analogue means, and it can be simulated and produce a particular error signal, and the mainboard that has automatic error-detecting and correct the hardware interface of function is carried out simulation test and checking.
The mistake of computer testing of the present utility model is inserted analogue means and taked following technical scheme to realize: a kind of mistake of computer testing is inserted analogue means, the test and validation that it cooperates peripheral interface device that the hardware interface of computer motherboard is done automatic error-detecting and corrected function, it comprises: a mainboard to be tested, and it has pci interface, memory interface, ide interface; One peripheral interface device, its connect with above-mentioned mainboard on the corresponding hardware interfaces, as above-mentioned mainboard extended function; The one wrong analogue means that inserts is connected setting with the hardware interface of above-mentioned mainboard, comprises the separate pci interface mistake analog module of function, memory interface mistake analog module, ide interface mistake analog module and memory interface backward error analog module.
Wherein, above-mentioned pci interface mistake analog module is connected with ide interface with the pci interface of above-mentioned mainboard respectively with above-mentioned ide interface mistake analog module, and above-mentioned memory interface mistake analog module and memory interface backward error analog module all are connected with above-mentioned memory interface; The above-mentioned wrong analogue means that inserts more comprises a switch module, the one end is connected with power supply, and the other end is connected with above-mentioned pci interface mistake analog module, memory interface mistake analog module, ide interface mistake analog module and memory interface backward error analog module respectively.
Owing to adopted as above technical scheme, the mistake of computer testing of the present utility model is inserted analogue means and is produced a particular error signal by the simulation peripheral interface device, and be input to above-mentioned mainboard corresponding hardware interfaces, can detect and correct this rub-out signal according to hardware interface and come the verification and testing mainboard.The utility model has solved industry can't and correct the problem that function is verified to the automatic error-detecting of mainboard, and has preferable usability, can extensively apply to the test to various computer motherboards.
Description of drawings
Block schematic diagram when Fig. 1 inserts analogue means and mainboard and is used for the mistake of computer testing of the present utility model.
Fig. 2 inserts the function block schematic diagram of analogue means for the mistake of the computer testing that the utility model disclosed.
Fig. 3 A, Fig. 3 B, Fig. 3 C close Fig. 3 D and are respectively the circuit diagram that mistake shown in Figure 2 is inserted each function square of analogue means.
Embodiment
Shown in Figure 1, the block schematic diagram when inserting analogue means and mainboard and be used for the mistake of computer testing of the present utility model.
The wrong analogue means 200 that inserts of the present utility model is used with peripheral interface device 300, be used for the automatic error-detecting that the various hardware interfaces that comprised on the mainboard 100 are contained and correct function (ErrorChecking and Correcting, ECC) verify, it is by the above-mentioned wrong analogue means 200 that inserts, the peripheral interface device 300 that simulation is attached thereto produces a rub-out signal, after above-mentioned mainboard 100 receives this rub-out signal, its hardware interface will carry out automatic error-detecting and correction to this rub-out signal, and all whether function is normal thereby verify various hardware interfaces on this mainboard 100.
Wherein, above-mentioned mainboard 100 comprise a central processing unit 150 (Center Process Unit, CPU), an and north bridge module 160 that is connected with central processing unit 150, this north bridge module 160 connects a memory interface 120, and this memory interface 120 is used to connect storage unit, such as internal memory; And above-mentioned north bridge module 160 is connected with a south bridge module 170, this south bridge module 170 is connected with IDE (Intergrated DriveElectronics, ide) interface 130 and PCI (PCI, Peripheral ComponentInterconnect, peripheral parts interconnected) interface 100 etc., wherein, in computing machine, disk (Hard Disk) is connected on the above-mentioned ide interface 130, and the equipment of numerous support PIC buses (PCI bus) is connected on the above-mentioned pci interface 100.
In addition, simultaneously referring to Fig. 2, insert the function block schematic diagram of analogue means 200 for the mistake that the utility model disclosed.This mistake is inserted analogue means 200 and is comprised the module that function is separate: pci interface mistake analog module 210, memory interface mistake analog module 220, ide interface mistake analog module 230 and memory interface backward error analog module 240 (in the following content, with " 4 modules " and replace expressing simultaneously this 210,220,230 and 240); An and switch module 280, it comprises 4 switches 281,282,283 and 284, one end ground connection, the other end are connected with 240 with above-mentioned 4 modules 210,220,230 respectively, can select wherein a module to make it and above-mentioned mainboard 100 and above-mentioned peripheral interface device 300 form signal paths; When one of them switch in the switch module 280 closed, it made low-potential signal be input to above-mentioned 4 modules 210,220,230 and 240 respectively.
Above-mentioned pci interface mistake analog module 210 and ide interface mistake analog module 230 not with above-mentioned mainboard 100 in pci interface 100 be connected with ide interface 130; Above-mentioned memory interface mistake analog module 220 and memory interface backward error analog module 220 all are coupled to the memory interface 120 in the above-mentioned mainboard 100.
Above-mentioned wrong end input of inserting the input power supply of analogue means 200 from above-mentioned switch module 280; Above-mentioned switch module 280 comprises and being connected among above-mentioned input power supply and above-mentioned 4 modules 210,220,230 and 240, when above-mentioned switch module 280 is selected one of them switch, above-mentioned input power supply will be input to the respective modules in above-mentioned 4 modules 210,220,230 and 240 and make its work.
Above-mentioned 4 modules 210,220,230 and 240 detailed circuit schematic are shown in Fig. 3 A, Fig. 3 B, Fig. 3 C, Fig. 3 D.Be that effective current potential, rub-out signal are the detailed operation principle that electronegative potential describes each module respectively in detail all below with noble potential.
And in conjunction with Fig. 1 and shown in Figure 1, above-mentioned 4 modules 210,220,230 and 240 the input signal of respectively importing pin is respectively the signal on each hardware interface of corresponding mainboard 110, and the I/O pin of above-mentioned peripheral interface device 300 correspondences respectively with above-mentioned mainboard 100 on corresponding I/O pin connect, even above-mentioned 4 modules 210,220,230 and 240 capture coherent signal the communication signal between above-mentioned mainboard 100 and above-mentioned peripheral interface device 300, signal according to this acquisition produces a specific rub-out signal, only after mainboard 100 can detect and this rub-out signal corrected, signal after this correction is exported to above-mentioned peripheral interface device 300, prove that just the hardware interface function of above-mentioned mainboard 100 is good.
The circuit diagram of the pci interface mistake analog module 210 as shown in Fig. 3 A, comprise an error condition generator 2101, it is an integrated circuit, pin and the above-mentioned mainboard 100 corresponding signal pins of respectively importing of this error condition generator 2101 connect, behind a certain particular state/address date of this error condition generator 2101 acquisitions, its output terminal 2103 will produce the output signal of an electronegative potential and be input to an input end of one or 2104; Simultaneously, the on-off element 281 in above-mentioned switch module 280 closes, and making another input end of be attached thereto above-mentioned or door 2104 is electronegative potential, so should or 210 be output as a low-potential signal; This or door 210 output signals are to a reverser 2106, because the input end of this reverser 2106 all is connected with output terminal above-mentioned or door 210 with Enable Pin, these reverser 2106 output one low-potential signals (being rub-out signal) are to the pci interface 110 of above-mentioned mainboard 100.Promptly produce a rub-out signal by the corresponding peripheral interface device 300 of these pci interface mistake analog module 210 simulations, if the function of the pci interface 110 of above-mentioned mainboard 100 is good, after can detecting and correct this rub-out signal, the signal after this correction outputs to above-mentioned peripheral interface device 300.Wherein, this peripheral interface device 300 can be a pci card, such as network interface card, video card etc.
In Fig. 3 B, be the detailed circuit schematic of above-mentioned memory interface mistake analog module 220.It is included as the particular address code translator 2202, one or door 2204 and one switch 2206 of an integrated circuit, when the on-off element 282 in the above-mentioned switch module 280 closes, above-mentioned decide address decoder 2202 will be from the data above-mentioned memory interface 120 and the above-mentioned peripheral interface device 300 a certain specific state/address date of acquisition, decide address decoder 2202 decoding back outputs one electronegative potential news back via this and give an input end above-mentioned or door 2204; And should or door 2204 another input end and above-mentioned switch module 280 be connected to an electronegative potential, so the time or 2204 be output as electronegative potential; When above-mentioned switch 2206 closes, be about to export one and give above-mentioned memory interface 120 for the rub-out signal of electronegative potential, if these memory interface 120 functions are good, promptly can detect and correct this rub-out signal, the rub-out signal after correcting is exported to above-mentioned peripheral interface device 300; If when above-mentioned switch 2206 was off-state, above-mentioned peripheral interface device 300 can't read or write the same signal that is captured from above-mentioned memory interface 120 about above-mentioned particular address code translator 2202, at this moment, above-mentioned mainboard 100 can be made relevant reaction.Wherein, this peripheral interface device 300 can be memory device, such as random memory etc.
Be depicted as the circuit diagram of above-mentioned ide interface mistake analog module 230 as Fig. 3 C.The circuit of its circuit formation and principle of work and above-mentioned memory interface mistake analog module 220 is similar, comprises an error condition generator 2302, one or door 2304 and one switch 2306, at this enumeration no longer.When making above-mentioned switch 2306 for off-state, above-mentioned IDE interface can't read in or write the data of a certain particular address/state and make a mistake, and after ide interface 130 these mistakes of detection of above-mentioned mainboard 100, will make correlated response.Wherein, this peripheral interface device 300 can be an IDE equipment, such as hard disk (Hard Disk).
It as shown in Fig. 3 D the circuit diagram of above-mentioned memory interface backward error analog module 240.It comprises that a particular address decoding scheme 241 and writes instruction decoding circuit 242, wherein, this particular address decoding scheme 241 comprises particular address decoding 2412 and one or door 2414, its structure and principle of work are similar to the circuit of above-mentioned memory interface mistake analog module 220, at this enumeration no longer.In addition, the above-mentioned instruction decoding circuit 242 that writes is included as one of integrated circuit and writes command decoder 2422 and switch 2424 and 2426, after deciphering via the data of a certain specific address/state of 241 pairs of above-mentioned particular address decoding schemes, and make above-mentioned switch 2424 state that closes, and above-mentioned switch 2426 off-states; When 100 pairs of above-mentioned interfacing equipments 300 of above-mentioned mainboard assign one when writing the instruction of data, above-mentionedly decide the reverse data (be in the data 0 become 1,1 become 0) that address decoding circuitry 241 makes specific data produce the bit-errors data and be written to above-mentioned peripheral interface device 300; And assign one when reading the instruction of data of above-mentioned peripheral interface device 300 to above-mentioned peripheral interface device 300 when above-mentioned mainboard 100, above-mentioned mainboard 100 promptly can read the misdata that is written in the above-mentioned peripheral interface device 300, and the misdata that this reads is made corresponding reaction.Wherein, this peripheral interface device 300 can be memory device, such as random memory etc.
Claims (13)
1. the mistake of a computer testing is inserted analogue means, the test and validation that it cooperates peripheral interface device that the hardware interface of computer motherboard is done automatic error-detecting and corrected function, and it comprises:
One mainboard to be tested, it has pci interface, memory interface, ide interface;
One peripheral interface device on the corresponding hardware interfaces, as above-mentioned mainboard extended function, is characterized in that also comprising on its connection and the above-mentioned mainboard,
The one wrong analogue means that inserts is connected setting with the hardware interface of above-mentioned mainboard, comprises the separate pci interface mistake analog module of function, memory interface mistake analog module, ide interface mistake analog module and memory interface backward error analog module.
2. the mistake of computer testing according to claim 1 is inserted analogue means, it is characterized in that, above-mentioned pci interface mistake analog module is connected with ide interface with the pci interface of above-mentioned mainboard respectively with above-mentioned ide interface mistake analog module, and above-mentioned memory interface mistake analog module and memory interface backward error analog module all are connected with above-mentioned memory interface.
3. the mistake of computer testing according to claim 1 is inserted analogue means, it is characterized in that, the above-mentioned wrong analogue means that inserts more comprises a switch module, the one end is connected with power supply, and the other end is connected with above-mentioned pci interface mistake analog module, memory interface mistake analog module, ide interface mistake analog module and memory interface backward error analog module respectively.
4. the mistake of computer testing according to claim 1 is inserted analogue means, it is characterized in that, above-mentioned pci interface mistake analog module comprises that one is the error condition generator of integrated circuit, this error condition generator captures on the pci interface of above-mentioned mainboard a certain particular state/address signal after decoding, output one and the opposite signal of institute's acquisition data, and output to be attached thereto one or the door, should or the output signal of door through a reverser after, output to the pci interface and the peripheral interface device of above-mentioned mainboard.
5. the mistake of computer testing according to claim 1 is inserted analogue means, it is characterized in that above-mentioned peripheral interface device is a pci card.
6. the mistake of computer testing according to claim 5 is inserted analogue means, it is characterized in that above-mentioned pci card is a video card.
7. the mistake of computer testing according to claim 5 is inserted analogue means, it is characterized in that above-mentioned pci card is a network interface card.
8. the mistake of computer testing according to claim 1 is inserted analogue means, it is characterized in that, above-mentioned ide interface mistake analog module comprises that one is the particular address code translator of integrated circuit, this particular address code translator captures on the ide interface of above-mentioned mainboard a certain particular state/address signal after decoding, output one and the opposite signal of institute's acquisition data, and output to be attached thereto one or the door, and make with should or the switch that is connected of output terminal of door be off-state, make above-mentioned or output signal can not be input to above-mentioned peripheral interface device.
9. the mistake of computer testing according to claim 1 is inserted analogue means, it is characterized in that above-mentioned peripheral interface device is an IDE equipment.
10. the mistake of computer testing according to claim 9 is inserted analogue means, it is characterized in that above-mentioned IDE equipment is hard disk.
11. the mistake of computer testing according to claim 1 is inserted analogue means, it is characterized in that, above-mentioned memory interface mistake analog module comprises that one is the error condition generator of integrated circuit, one or the door and a switch, this error condition generator captures on the memory interface of above-mentioned mainboard a certain particular state/address signal after decoding, output one and the opposite signal of institute's acquisition data, output to be attached thereto one or the door, and make with should or the switch that is connected of output terminal of door be off-state, make above-mentioned or output signal can not be input to above-mentioned peripheral interface device.
12. the mistake of computer testing according to claim 1 is inserted analogue means, it is characterized in that, above-mentioned memory interface backward error analog module comprises that a particular address decoding scheme and writes instruction decoding circuit, wherein this particular address decoding scheme captures on the memory interface of above-mentioned mainboard a certain particular state/address signal after decoding, output one and the opposite signal of institute's acquisition data; And the above-mentioned command decoder that writes that writes instruction decoding circuit one for integrated circuit, make the above-mentioned signal opposite be written to above-mentioned peripheral interface device, and the memory interface of above-mentioned mainboard will read the data that this is written to above-mentioned peripheral interface device with the institute acquisition data.
13. the mistake of computer testing according to claim 8 is inserted analogue means, it is characterized in that above-mentioned peripheral interface device is a memory device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200520046043 CN2874629Y (en) | 2005-10-28 | 2005-10-28 | Error insert analogue device of computer test |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200520046043 CN2874629Y (en) | 2005-10-28 | 2005-10-28 | Error insert analogue device of computer test |
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| CN2874629Y true CN2874629Y (en) | 2007-02-28 |
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| CN 200520046043 Expired - Fee Related CN2874629Y (en) | 2005-10-28 | 2005-10-28 | Error insert analogue device of computer test |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102253879A (en) * | 2010-05-20 | 2011-11-23 | 英业达科技有限公司 | Server system |
| US8392766B2 (en) | 2009-07-02 | 2013-03-05 | Silicon Motion Inc. | Operational method of a controller of a flash memory, and associated memory device and controller thereof |
| CN102033791B (en) * | 2009-09-25 | 2014-04-30 | 慧荣科技股份有限公司 | Method for improving verification efficiency of controller of flash memory, memory device and controller |
| CN111143145A (en) * | 2019-12-26 | 2020-05-12 | 山东方寸微电子科技有限公司 | Method for manufacturing errors in SATA error processing debugging and electronic equipment |
-
2005
- 2005-10-28 CN CN 200520046043 patent/CN2874629Y/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8392766B2 (en) | 2009-07-02 | 2013-03-05 | Silicon Motion Inc. | Operational method of a controller of a flash memory, and associated memory device and controller thereof |
| CN102033791B (en) * | 2009-09-25 | 2014-04-30 | 慧荣科技股份有限公司 | Method for improving verification efficiency of controller of flash memory, memory device and controller |
| CN102253879A (en) * | 2010-05-20 | 2011-11-23 | 英业达科技有限公司 | Server system |
| CN111143145A (en) * | 2019-12-26 | 2020-05-12 | 山东方寸微电子科技有限公司 | Method for manufacturing errors in SATA error processing debugging and electronic equipment |
| CN111143145B (en) * | 2019-12-26 | 2023-04-07 | 山东方寸微电子科技有限公司 | Method for manufacturing errors in SATA error processing debugging and electronic equipment |
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Legal Events
| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20070228 Termination date: 20091130 |