CN220473935U - PCIE (peripheral component interface express) expansion system supporting identification detection - Google Patents
PCIE (peripheral component interface express) expansion system supporting identification detection Download PDFInfo
- Publication number
- CN220473935U CN220473935U CN202322043352.2U CN202322043352U CN220473935U CN 220473935 U CN220473935 U CN 220473935U CN 202322043352 U CN202322043352 U CN 202322043352U CN 220473935 U CN220473935 U CN 220473935U
- Authority
- CN
- China
- Prior art keywords
- pcie
- module
- expansion
- unit
- system supporting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000001514 detection method Methods 0.000 title claims abstract description 42
- 230000002093 peripheral effect Effects 0.000 title description 2
- 230000003993 interaction Effects 0.000 claims abstract description 23
- 238000004891 communication Methods 0.000 claims description 10
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 2
- 239000010931 gold Substances 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 238000000034 method Methods 0.000 description 5
- 230000002159 abnormal effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000007774 longterm Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 241000218691 Cupressaceae Species 0.000 description 1
- 230000005856 abnormality Effects 0.000 description 1
- 238000013473 artificial intelligence Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
Landscapes
- Debugging And Monitoring (AREA)
Abstract
The utility model relates to the technical field of computers, and provides a PCIE expansion system supporting identification detection, which is used for identifying and detecting PCIE module cards by a server motherboard, and comprises a detection control module used for detecting the identification condition of the PCIE module cards and controlling the state of the server motherboard according to the identification condition, a signal interaction module used for signal interaction between the server motherboard and the PCIE module cards, and an expansion interface module used for connecting various PCIE module cards. The detection control module comprises a BIOS unit, a processor unit and a CPLD unit. The signal interaction module comprises a main board expansion slot unit and an expansion card connection unit. The expansion interface module comprises at least one PCIE slot, a first pin and a second pin are arranged, the first pin is grounded, and the second pin is connected with a pull-up resistor. After restarting and starting, all PCIE module cards connected with a plurality of PCIE slots on the expansion card can be normally identified, and the stability of the server is improved.
Description
Technical Field
The utility model relates to the technical field of computers, in particular to a PCIE expansion system supporting identification detection.
Background
With the advent of business scenarios such as big data, high concurrency, artificial intelligence, etc., the requirements on data processing capability of servers are becoming higher and higher. The high-speed serial computer expansion bus standard PCIE is used as a high-speed serial computer expansion bus standard, has the advantages of large bandwidth and strong data transmission capacity, and is increasingly used for data transmission of a Central Processing Unit (CPU) and equipment in a server system. PCIE is a high-speed serial computer bus standard, and can be connected with various PCIE devices on a motherboard, or can be made into PCIE slot forms to be connected with different PCIE module cards according to different application requirements, and the design needs to be performed by comprehensively considering the space resources and the chassis structure of the motherboard PCB.
In the prior art, a server usually selects to use a PCIE expansion card to expand the number of PCIE slots, so that a problem that normal identification cannot be performed due to a large number of PCIE slots placed on a motherboard is avoided, and accurate identification cannot be performed on the in-place state of PCIE devices.
Disclosure of Invention
In order to solve the above problems in the prior art, the utility model provides a PCIE expansion system supporting identification detection, which can ensure that when a server motherboard is used in long-term operation, after restarting and starting, all PCIE module cards connected to a plurality of PCIE slots on an expansion card can be identified normally, so that the situation that after a server enters an operating system, part of PCIE module cards are not identified normally is avoided, and stability of the server is improved.
In a first aspect, an embodiment of the present application provides a PCIE extension system supporting identification detection, including a detection control module, a signal interaction module, and an extension interface module that are connected in sequence; the detection control module is used for detecting the identification condition of the PCIE module card and controlling the state of the server according to the identification condition; the signal interaction module is used for signal interaction between the server main board and the expansion card; the expansion interface module is used for connecting with various PCIE module cards.
In an alternative of the first aspect, the detection control module includes a BIOS unit, a processor unit, and a CPLD unit that are sequentially connected.
In yet another alternative of the first aspect, the BIOS unit is coupled to the processor unit via SPI signal communication.
In a further alternative of the first aspect, the processor unit is connected to the CPLD unit in signal communication via an I2C signal. The SPI signals and the I2C signals are low-speed signals, are more used on a server, can be developed and designed more conveniently, and the SPI signals are needed to be used for communication when the processor unit reads and loads BIOS unit information.
In yet another alternative of the first aspect, the signal interaction module includes a motherboard expansion slot unit and an expansion card connection unit.
In yet another alternative of the first aspect, the expansion card connection unit in the signal interaction module is a gold finger.
In yet another alternative of the first aspect, the expansion interface module includes at least one PCIE slot.
In yet another alternative of the first aspect, a PCIE slot in the expansion interface module is provided with a first pin and a second pin, the first pin is grounded, and the second pin is connected to a pull-up resistor.
In still another alternative of the first aspect, the expansion interface module includes a plurality of PCIE slots, first pins of the PCIE slots are all grounded, and after second pins of the PCIE slots are connected in parallel, pull-up resistors are connected.
In yet another alternative of the first aspect, the CPLD unit in the detection control module is connected to the second pin of the PCIE slot in the expansion interface module through the signal interaction module.
The beneficial technical effects of the utility model include:
the PCIE expansion system supporting the identification detection can realize the chain building identification detection of PCIE module cards on the PCIE expansion card in the power-on process of the server main board, avoid the situation that the PCIE module cards cannot be identified normally by an operating system due to sporadic chain building abnormality of the server main board, realize the stable and reliable identification of the module cards inserted on the PCIE expansion card, and be beneficial to improving the reliability and the expandability of the PCIE expansion card.
Drawings
In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the utility model, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a block diagram of a PCIE expansion system supporting identification detection in the present utility model;
fig. 2 is a flowchart of a PCIE extension method supporting identification detection in the present utility model.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.
In the following description, the terms "first," "second," and "first," are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. The following description provides various embodiments of the present application, and various embodiments may be substituted or combined, so that the present application is also intended to encompass all possible combinations of the same and/or different embodiments described. Thus, if one embodiment includes feature A, B, C and another embodiment includes feature B, D, then the present application should also be considered to include embodiments that include one or more of all other possible combinations including A, B, C, D, although such an embodiment may not be explicitly recited in the following.
The following description provides examples and does not limit the scope, applicability, or examples set forth in the claims. Changes may be made in the function and arrangement of elements described without departing from the scope of the application. Various examples may omit, replace, or add various procedures or components as appropriate. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Furthermore, features described with respect to some examples may be combined into other examples.
Embodiment one:
referring to fig. 1, a PCIE extension system supporting identification detection includes a detection control module, a signal interaction module, and an extension interface module connected in sequence. And the PCIE expansion card and the server mainboard are enabled to generate signal interaction, detection control is carried out, and the effect of stably and reliably identifying the PCIE module card is achieved.
The detection control module is used for detecting the identification condition of the PCIE module card and controlling the state of the server according to the identification condition, and comprises a BIOS unit, a Basic Input Output System unit, a CPU unit, a Central Processor Unit unit and a CPLD unit, and Complex Programmable Logic Device which are sequentially connected, wherein the BIOS unit is connected with the processor unit through SPI signal communication, and the processor unit is connected with the CPLD unit through I2C signal communication.
Further, the BIOS unit employs a model CYPRESS S25FL128P0 XMUI 00, and the CPLD unit employs an Altera EPM2210F324C5N.
The signal interaction module is used for signal interaction between the server main board and the expansion card and comprises a main board expansion slot unit and an expansion card connection unit.
Further, the main board expansion slot unit is Sup>A nonstandard PCIE high-speed connector, the model is Samtec HSEC8-1100-01-L-DV-A, and the expansion card connection unit is Sup>A golden finger connector and can be directly inserted into the main board expansion slot unit in the signal interaction module.
The expansion interface module is used for connecting various PCIE module cards, the expansion interface module comprises a plurality of PCIE slots, each PCIE slot comprises a pin 1, a PRSNT1# signal and a pin 2, and the PRSNT2# signal, and the PRSNT1# signal and the PRSNT2# signal are connected on a standard PCIE module card. The pins corresponding to the PCIE slot PRSNT2# signals according to the different signal bandwidths are different, the pin B81 corresponds to PCIE X16, the pin B48 corresponds to PCIEX8, the pin B31 corresponds to PCIE X4, and the pin B17 corresponds to PCIE X1.
Further, the PCIE slot 1 is a PCIEX 16 connector, PCIE-164-02-F-D-TH with the model Samtec is included, the PRSNT1# signal on the PCIE slot 1 is led out for grounding, and 4 PRSNT2# (pins B81, B48, B31 and B17) signals are led out in parallel and pulled up to a 3.3V high level through resistors.
The PCIE slot 2 and the PCIE slot 3 are PCIEX8 connectors, and the PCIE-098-02-F-D-TH is Samtec. The PRSNT1# signals on the PCIE slot 2 and the PCIE slot 3 are led out for grounding treatment, and the 3 PRSNT2# signals (pins B48, B31 and B17) are led out in parallel and pulled up to a 3.3V high level through resistors.
The PRSNT2# signals of the 3 PCIE slots in the expansion interface module are connected to the CPLD unit of the main board detection control unit through the signal interaction unit. When the PCIE module card is inserted into the slot of the expansion interface module, the PRSNT2# signal received by the CPLD unit is in a high level, and when the PCIE module card is inserted into the slot of the expansion interface module, the PRSNT2# signal is connected with the PRSNT1# signal through the PCIE module card, and the PRSNT2# signal received by the CPLD unit is in a low level.
Therefore, the CPLD unit can determine the number of bits of the PCIE module card through the high-low states of the prsnt2# signals of the three slots in the expansion interface module and write the number of bits into the register, and then the processor unit can read the number of bits in the register through I2C communication. And the processor module CPU of the detection control module is used for respectively connecting 3 groups of PCIE X8 buses to PCIE slots 1/2/3 on the PCIE expansion card through the mainboard expansion slot units.
The PCIE expansion system consists of a server main board and a PCIE expansion card, wherein the server main board comprises a BIOS unit of a detection control module, a processor unit, a CPLD unit and a main board expansion slot unit of a signal interaction module. The PCIE expansion card comprises an expansion card connection unit of the signal interaction module, a PCIE slot 1, a PCIE slot 2 and a PCIE slot 3 of the expansion interface module.
Embodiment two:
referring to fig. 2, a PCIE extension method supporting identification detection, based on a PCIE extension system supporting identification detection provided in the first embodiment, includes the steps of:
and step A, powering up a processor unit of the detection control module, loading a BIOS unit, reading the number of PCIE devices successfully built in a chain, and marking the number as A and the number as B of PCIE devices on a server main board.
And B, detecting the number of PCIE module cards on the expansion card by the CPLD unit through the PRSNT2# signal high-low states of 3 PCIE slots on the PCIE expansion card, and reading the bit number of the PCIE module cards in the CPLD unit through I2C communication, wherein the bit number is marked as C.
And C, judging whether the difference between the A and the B is equal to C, judging whether the number of PCIE devices which are successfully built up the chain minus the number of PCIE devices on a server motherboard is equal to the number of PCIE module cards in place, entering an operating system if the PCIE devices are equal to the number of PCIE module cards in place, restarting the processor unit if the PCIE devices are not equal to the number of PCIE module cards in place, retrying the chain building, and returning to the step A until the PCIE devices are equal to the PCIE module cards in place. If the PCIE module card on the expansion card is judged to fail to normally establish the chain for identification, the processor module of the detection control unit is restarted in the BIOS loading stage, and the chain establishment is performed again to ensure that the PCIE module card on the expansion card can be normally identified under the operating system, so that the normal function of the server is ensured.
And D, judging whether the restarting time is less than 3 times, if so, returning to the step A, if not less than 3 times, judging that the PCIE module card is abnormal, and directly entering an operating system, wherein the restarting time is necessary to be limited because the starting time of the server cannot be too long.
The problem that PCIE module cards accessed by slots on an expansion card cannot be identified normally is solved, and the expansion card is provided with three slots, and 1 to 3 PCIE cards can be inserted.
The utility model can ensure that when the expansion server main board is used in long-term operation, all PCIE module cards connected with a plurality of PCIE slots on the expansion card can be normally identified after restarting and starting, so that the situation that the server is accidentally abnormal in chain establishment and part of PCIE module cards are not normally identified after entering an operating system is avoided, the reliability of the PCIE expansion card is improved, and the stability, reliability and expandability of the server are improved.
The above examples are merely illustrative of the preferred embodiments of the present utility model and are not intended to limit the scope of the present utility model, and various modifications and improvements made by those skilled in the art to the technical solution of the present utility model should fall within the protection scope of the present utility model without departing from the design spirit of the present utility model.
Claims (10)
1. The PCIE expansion system supporting identification detection is characterized by comprising a detection control module, a signal interaction module and an expansion interface module which are connected in sequence, wherein the detection control module is used for identifying and detecting PCIE module cards of a server main board; the detection control module is used for detecting the identification condition of the PCIE module card and controlling the state of the server mainboard according to the identification condition; the signal interaction module is used for signal interaction between the server main board and the PCIE module card; the expansion interface module is used for connecting with various PCIE module cards.
2. The PCIE expansion system supporting identification detection of claim 1 wherein the detection control module comprises a BIOS unit, a processor unit, and a CPLD unit connected in sequence.
3. The PCIE expansion system supporting identification detection of claim 2 wherein the BIOS unit is in communication with the processor unit via an SPI signal communication connection.
4. The PCIE expansion system supporting identification detection of claim 2 wherein the processor unit is connected to the CPLD unit in signal communication via I2C signals.
5. The PCIE expansion system supporting identification detection of claim 1 wherein the signal interaction module comprises a motherboard expansion slot unit and an expansion card connection unit.
6. The PCIE expansion system supporting identification detection of claim 5 wherein the expansion card connection unit in the signal interaction module is a gold finger.
7. The PCIE expansion system supporting identification detection of claim 1 wherein the expansion interface module comprises at least one PCIE slot.
8. The PCIE expansion system supporting identification detection of claim 7 wherein PCIE slots in the expansion interface module are provided with a first pin and a second pin, the first pin being grounded and the second pin being connected to a pull-up resistor.
9. The PCIE expansion system supporting identification detection of claim 8 wherein the expansion interface module comprises a plurality of PCIE slots, first pins of the PCIE slots are grounded, and second pins of the PCIE slots are connected in parallel and then connected to a pull-up resistor.
10. The PCIE expansion system supporting identification detection according to any one of claims 8 or 9, wherein the CPLD unit in the detection control module is connected to the second pin of the PCIE slot in the expansion interface module through the signal interaction module.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202322043352.2U CN220473935U (en) | 2023-08-01 | 2023-08-01 | PCIE (peripheral component interface express) expansion system supporting identification detection |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202322043352.2U CN220473935U (en) | 2023-08-01 | 2023-08-01 | PCIE (peripheral component interface express) expansion system supporting identification detection |
Publications (1)
Publication Number | Publication Date |
---|---|
CN220473935U true CN220473935U (en) | 2024-02-09 |
Family
ID=89803500
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202322043352.2U Active CN220473935U (en) | 2023-08-01 | 2023-08-01 | PCIE (peripheral component interface express) expansion system supporting identification detection |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN220473935U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN118069569A (en) * | 2024-04-18 | 2024-05-24 | 上海壁仞科技股份有限公司 | PCIe expansion card and server |
-
2023
- 2023-08-01 CN CN202322043352.2U patent/CN220473935U/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN118069569A (en) * | 2024-04-18 | 2024-05-24 | 上海壁仞科技股份有限公司 | PCIe expansion card and server |
CN118069569B (en) * | 2024-04-18 | 2024-07-19 | 上海壁仞科技股份有限公司 | PCIe expansion card and server |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN220473935U (en) | PCIE (peripheral component interface express) expansion system supporting identification detection | |
US6745345B2 (en) | Method for testing a computer bus using a bridge chip having a freeze-on-error option | |
CN113127302A (en) | Method and device for monitoring GPIO (general purpose input/output) of board card | |
CN109947682B (en) | Server mainboard and server | |
CN112799985B (en) | USB interface control method, USB control circuit and intelligent networking equipment mainboard | |
US6751740B1 (en) | Method and system for using a combined power detect and presence detect signal to determine if a memory module is connected and receiving power | |
US20040015634A1 (en) | Information handling system with improved bus system | |
CN115167629A (en) | Double-circuit server CPU mainboard | |
US9946552B2 (en) | System and method for detecting redundant array of independent disks (RAID) controller state from baseboard management controller (BMC) | |
US20230297533A1 (en) | Signal bridging using an unpopulated processor interconnect | |
CN210324191U (en) | Computer module and mainboard | |
CN112306938A (en) | Hot plug method and device for OCP card and multi-host card | |
CN215729742U (en) | Hard disk interface circuit and mainboard | |
CN114461142B (en) | Method, system, device and medium for reading and writing Flash data | |
CN213365381U (en) | Main board | |
CN210324179U (en) | Double-firmware circuit structure applied to computer mainboard | |
CN113567834A (en) | Small card circuit path testing method and device, computer equipment and storage medium | |
CN115905072A (en) | Computer system, control method based on PCIe device and related device | |
CN113867812A (en) | Method, system, equipment and medium for BMC to acquire link information | |
US7159104B2 (en) | Simplified memory detection | |
CN111414201A (en) | PCIe card loading method, device, equipment and storage medium | |
CN213814665U (en) | Double-control storage device VPD information writing structure | |
CN217521590U (en) | Mainboard and server | |
CN114579381B (en) | Remote debugging method, system, terminal and storage medium for disk array | |
CN221200334U (en) | Double-path server |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |