CN219696450U - Anti-interference gallium nitride DFN5X6-8L packaging frame - Google Patents
Anti-interference gallium nitride DFN5X6-8L packaging frame Download PDFInfo
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- CN219696450U CN219696450U CN202320338807.0U CN202320338807U CN219696450U CN 219696450 U CN219696450 U CN 219696450U CN 202320338807 U CN202320338807 U CN 202320338807U CN 219696450 U CN219696450 U CN 219696450U
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- interference
- electrode pin
- gallium nitride
- dfn5x6
- base island
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- 229910002601 GaN Inorganic materials 0.000 title claims abstract description 20
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 20
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 16
- 239000003292 glue Substances 0.000 claims abstract description 41
- 230000017525 heat dissipation Effects 0.000 claims description 9
- 238000007747 plating Methods 0.000 claims description 6
- 239000002994 raw material Substances 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
- 239000000463 material Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
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- Junction Field-Effect Transistors (AREA)
Abstract
The utility model provides an anti-interference gallium nitride DFN5X6-8L packaging frame, which is a basic raw material for guaranteeing the realization of an anti-interference gallium nitride semiconductor packaging structure and comprises a base island, wherein the periphery of the base island is respectively provided with a drain electrode pin, a source electrode pin, a Kelvin source electrode pin and a grid electrode pin, the edge of one side of the base island extends outwards to form a radiating part, a plurality of glue locking holes are formed in each radiating fin, a plurality of drain electrode pins are connected with one radiating fin, and a glue locking gap is reserved between every two adjacent drain electrode pins. The utility model adopts a mode of increasing Kelvin source pins, so that a source loop can be independently led out by a source pin, a switching signal and a conducting current are separately processed, signal interference on the chip is reduced, the area of a base island is increased by arranging a radiating part on one side of the base island, the contact area between a chip fixing part and the outside is increased, the radiating efficiency of a chip part is improved, and meanwhile, the radiating efficiency of a drain electrode pin is improved by a radiating fin mode.
Description
Technical Field
The utility model belongs to the technical field of integrated circuits, and particularly relates to an anti-interference gallium nitride DFN5X6-8L packaging frame.
Background
The chip frame is a carrier of the integrated circuit chip, plays a bridge role between the chip and an external circuit, simultaneously gives consideration to the role of leading out heat generated in the chip work, has quicker change of an electric signal at the input end of a gallium nitride product, is influenced by factors such as a current magnetic field and the like, is easy to generate interference between signals, causes misjudgment of circuit signals in use, and influences the reliability and the use safety of the electronic product. When gallium nitride products require frequent switching, dV/dt at high frequencies may cause ringing waves or other forms of interference and inject unwanted high frequencies into the circuits they drive. For smaller packaged products, the heat dissipation efficiency of the internal chip is reduced due to less copper materials and the like used in the internal package product, and the influence of temperature on the electronic product is larger, so that the product performance is reduced when the product works in a high-temperature environment.
Disclosure of Invention
In view of this, the present utility model is directed to providing an anti-interference gallium nitride DFN5X6-8L package frame to reduce signal interference in the product and improve heat dissipation capability of the product.
In order to achieve the above purpose, the technical scheme of the utility model is realized as follows:
the utility model provides an anti-interference gallium nitride DFN5X6-8L package frame, includes the base island, and its week side is equipped with drain electrode pin, source pin, kelvin source pin and grid pin respectively, base island one side edge outwards extends radiating portion, just open on the radiating portion has a plurality of lock glue holes, drain electrode pin has a plurality ofly, and drain electrode pin all is connected with a fin, and leaves the lock between every adjacent two drain electrode pins and glue the clearance.
Further, a plurality of first connecting ribs extend outwards from two sides of the base island respectively.
Further, a glue locking space is reserved between every two adjacent first connecting ribs.
Further, chamfer angles are arranged on two sides of the outer ends of the drain electrode pin, the source electrode pin, the Kelvin source electrode pin and the grid electrode pin, so that weak parts are formed at the outer ends of the pins.
Further, the inner end of the source electrode is connected with the base island through a connecting part, and a glue locking hole is formed in the connecting part.
Further, the glue locking holes on the heat dissipation part are divided into a first glue locking hole and a second glue locking hole, the shapes of the first glue locking hole and the second glue locking hole are different, the first glue locking holes are multiple, and the second glue locking holes are arranged at the corners of the heat dissipation part.
Further, the two ends of the radiating fin are respectively extended with a second connecting rib outwards.
Further, the second connecting rib is arranged on one side of the radiating fin away from the drain electrode pin.
Further, the outer side surfaces of the drain electrode pin, the source electrode pin, the Kelvin source electrode pin, the grid electrode pin and the base island are provided with conductive plating layers.
Compared with the prior art, the anti-interference gallium nitride DFN5X6-8L packaging frame has the following advantages:
the utility model adopts a mode of increasing Kelvin source pins, so that a source loop can be independently led out by a source pin, a switching signal and a conducting current are separately processed, signal interference on the chip is reduced, a radiating part is arranged at one side of a base island, the area of the base island is increased, the contact area between a chip fixing part and the outside is increased, the radiating efficiency of a chip part is improved, and meanwhile, the radiating efficiency of a drain electrode pin is improved in a mode that a drain electrode passes through a radiating fin;
the mode of arranging the glue locking holes on the heat dissipation part is adopted, so that adverse phenomena such as layering and the like after product packaging caused by overlarge whole area of the base island and the heat dissipation part are prevented.
Drawings
The accompanying drawings, which are included to provide a further understanding of the utility model and are incorporated in and constitute a part of this specification, illustrate embodiments of the utility model and together with the description serve to explain the utility model. In the drawings:
FIG. 1 is a schematic diagram of a distribution in a frame production;
FIG. 2 is an enlarged schematic view of FIG. 1 at A;
FIG. 3 is a schematic diagram of a frame structure;
FIG. 4 is a schematic diagram showing the distribution structure of a plating layer.
Reference numerals illustrate:
1-islands; 11-a heat sink; 12-a chip fixing part; 13-a first glue locking hole; 14-a second glue locking hole; 15-first connecting ribs; 16-locking a glue space; 17-a connection; 2-drain pins; 21-a heat sink; 22-locking a glue gap; 23-weaknesses; 3-source pins; a 4-Kelvin source pin; 5-gate pins; 6-a basic frame; 7-fixing strips; 8-plating layer.
Detailed Description
It should be noted that, without conflict, the embodiments of the present utility model and features of the embodiments may be combined with each other.
In the description of the present utility model, it should be understood that the terms "center", "longitudinal", "lateral", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are merely for convenience in describing the present utility model and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present utility model. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first", "a second", etc. may explicitly or implicitly include one or more such feature. In the description of the present utility model, unless otherwise indicated, the meaning of "a plurality" is two or more.
In the description of the present utility model, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present utility model can be understood by those of ordinary skill in the art in a specific case.
The utility model will be described in detail below with reference to the drawings in connection with embodiments.
The utility model relates to an anti-interference gallium nitride DFN5X6-8L package frame, which comprises a base island 1, wherein the periphery of the base island 1 is respectively provided with a drain electrode pin 2, a source electrode pin 3, kelvin source electrode pins 4 and a grid electrode pin 5, and a person skilled in the art can set the number of each pin according to the needs. The chip is fixedly arranged on the base island 1, the edge of one side of the base island 1 is outwards extended to form a radiating part 11 so as to improve the radiating area, heat generated by the chip is conveniently and rapidly radiated, in order to avoid the fact that packaging media of upper and lower layers are combined in an unfixed mode after packaging due to the area passageway of the base island 1 and the radiating part 11, a plurality of glue locking holes are formed in the radiating part 11, a plurality of drain electrode pins 2 are arranged, the drain electrode pins 2 are connected with one radiating fin 21, glue locking gaps 22 are reserved between every two adjacent drain electrode pins 2, in order to facilitate distinguishing the frame direction, the glue locking holes are divided into a first glue locking hole 13 and a second glue locking hole 14, the shapes of the first glue locking hole 13 and the second glue locking hole 14 are different, the first glue locking hole 13 can be a plurality, the second glue locking hole 14 is arranged at the corner of the radiating part 11, and the second glue locking hole 14 is arranged at the corner of the radiating part 11 so as to conveniently identify product characteristics of a machine in the processing process to position.
In order to further improve the heat dissipation efficiency of the product, a plurality of first connecting ribs 15 extend outwards from two sides of the base island 1 respectively, second connecting ribs extend outwards from two ends of the radiating fin 21 respectively, after packaging, the first connecting ribs 15 and the second connecting ribs are arranged at the ends of the packaging medium so as to guide heat in the product to the outside, reduce the temperature of the product, and simultaneously, in order to improve the combination degree of the packaging medium and the frame of the packaged product, a glue locking space 16 is reserved between two first connecting ribs 15 and the second connecting ribs which are not adjacent, so that the packaging medium enters the glue locking space 16, the combination strength of the packaging medium on two sides of the base island 1 is enhanced, and the second connecting ribs are arranged on one side of the radiating fin 21 away from the drain electrode pin 2 so that the second connecting ribs are close to the base island 1 as much as possible, so as to radiate the heat at the position of the base island 1.
In the processing production process of the frame, in order to facilitate processing, a foundation frame 6 is firstly arranged, a base material is fixed in the foundation frame 6, in the embodiment, the base material is sheet copper material, the space in the base material is divided into matrix segments to determine the position of the frame, the frame is formed by dividing the base material, a fixing strip 7 is reserved between every two frames, the end part of the fixing strip 7 is connected with the foundation frame 6 into a whole so as to facilitate fixing the position of the frame, the first connecting rib 15 and the second connecting rib are respectively connected with the adjacent fixing strip 7 into a whole, the outer edge of each pin is connected with the adjacent fixing strip 7 into a whole, and the outer ends of the drain electrode pin 2, the source electrode pin 3, the Kelvin source electrode pin 4 and the grid electrode pin 5 are provided with chamfer angles, so that the outer ends of the pins form weak parts 23, the frames are cut to facilitate the division of the pins and the fixing strip 7, and the phenomenon of more pins, curled edges and the like due to overlarge strength of the connection parts of the pins and the fixing strip 7 is avoided.
Most of the prior chips are directly fixedly connected with the base island 1 through conductive adhesive, the inner end of the source is connected with the base island 1 through a connecting part 17, so that the chips are connected with an external circuit through a frame, and the connecting part 17 is provided with adhesive locking holes.
The outer side surfaces of the drain electrode pin 2, the source electrode pin 3, the Kelvin source electrode pin 4, the grid electrode pin 5 and the base island 1 are provided with a conductive plating layer 8, and in the embodiment, the conductive plating layer 8 is a silver layer so as to improve the electric connection effect of the product and an external circuit.
The foregoing description of the preferred embodiments of the utility model is not intended to be limiting, but rather is intended to cover all modifications, equivalents, alternatives, and improvements that fall within the spirit and scope of the utility model.
Claims (9)
1. An anti-interference gallium nitride DFN5X6-8L packaging frame, which is characterized in that: the LED lamp comprises a base island, wherein drain electrode pins, source electrode pins, kelvin source electrode pins and grid electrode pins are respectively arranged on the periphery of the base island, a radiating part outwards extends from the edge of one side of the base island, a plurality of glue locking holes are formed in the radiating part, a plurality of drain electrode pins are arranged, the drain electrode pins are connected with a radiating fin, and a glue locking gap is reserved between every two adjacent drain electrode pins.
2. An anti-interference gallium nitride DFN5X6-8L package frame according to claim 1, wherein: and a plurality of first connecting ribs extend outwards from two sides of the base island respectively.
3. An anti-interference gallium nitride DFN5X6-8L package frame according to claim 1, wherein: a glue locking space is reserved between every two adjacent first connecting ribs.
4. An anti-interference gallium nitride DFN5X6-8L package frame according to claim 1, wherein: and chamfer angles are arranged on two sides of the outer ends of the drain electrode pin, the source electrode pin, the Kelvin source electrode pin and the grid electrode pin, so that a weak part is formed at the outer ends of the pins.
5. An anti-interference gallium nitride DFN5X6-8L package frame according to claim 1, wherein: the inner end of the source electrode is connected with the base island through a connecting part, and a glue locking hole is formed in the connecting part.
6. An anti-interference gallium nitride DFN5X6-8L package frame according to claim 1, wherein: the glue locking holes on the heat dissipation part are divided into a first glue locking hole and a second glue locking hole, the shapes of the first glue locking hole and the second glue locking hole are different, the first glue locking holes are multiple, and the second glue locking holes are arranged at the corners of the heat dissipation part.
7. An anti-interference gallium nitride DFN5X6-8L package frame according to claim 1, wherein: and second connecting ribs extend outwards from two ends of the radiating fin respectively.
8. An anti-interference gallium nitride DFN5X6-8L packaging frame according to claim 7, wherein: the second connecting rib is arranged on one side of the radiating fin away from the drain electrode pin.
9. An anti-interference gallium nitride DFN5X6-8L package frame according to claim 1, wherein: and the outer side surfaces of the drain electrode pin, the source electrode pin, the Kelvin source electrode pin, the grid electrode pin and the base island are provided with conductive plating layers.
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CN202320338807.0U CN219696450U (en) | 2023-02-28 | 2023-02-28 | Anti-interference gallium nitride DFN5X6-8L packaging frame |
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CN202320338807.0U CN219696450U (en) | 2023-02-28 | 2023-02-28 | Anti-interference gallium nitride DFN5X6-8L packaging frame |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN117253871A (en) * | 2023-11-20 | 2023-12-19 | 佛山市蓝箭电子股份有限公司 | Semiconductor packaging device and packaging method thereof |
CN117637661A (en) * | 2024-01-26 | 2024-03-01 | 中科华艺(天津)科技有限公司 | RF (radio frequency) chip packaging structure with switching characteristic and manufacturing method thereof |
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2023
- 2023-02-28 CN CN202320338807.0U patent/CN219696450U/en active Active
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN117253871A (en) * | 2023-11-20 | 2023-12-19 | 佛山市蓝箭电子股份有限公司 | Semiconductor packaging device and packaging method thereof |
CN117253871B (en) * | 2023-11-20 | 2024-02-13 | 佛山市蓝箭电子股份有限公司 | Semiconductor packaging device and packaging method thereof |
CN117637661A (en) * | 2024-01-26 | 2024-03-01 | 中科华艺(天津)科技有限公司 | RF (radio frequency) chip packaging structure with switching characteristic and manufacturing method thereof |
CN117637661B (en) * | 2024-01-26 | 2024-04-05 | 中科华艺(天津)科技有限公司 | RF (radio frequency) chip packaging structure with switching characteristic and manufacturing method thereof |
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GR01 | Patent grant | ||
GR01 | Patent grant | ||
PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of utility model: An anti-interference gallium nitride DFN5X6-8L packaging framework Granted publication date: 20230915 Pledgee: Tianjin Hengzhi Intellectual Property Co.,Ltd. Pledgor: Zhongke Huayi (Tianjin) Technology Co.,Ltd. Registration number: Y2024120000027 |
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PE01 | Entry into force of the registration of the contract for pledge of patent right |