CN219086799U - Transient surge voltage suppression circuit and power supply system - Google Patents
Transient surge voltage suppression circuit and power supply system Download PDFInfo
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- CN219086799U CN219086799U CN202223579321.0U CN202223579321U CN219086799U CN 219086799 U CN219086799 U CN 219086799U CN 202223579321 U CN202223579321 U CN 202223579321U CN 219086799 U CN219086799 U CN 219086799U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The embodiment of the utility model discloses a transient surge voltage suppression circuit and a power supply system, wherein the circuit comprises a resistor R1, a field effect transistor Q1, a resistor R2, a triode Q2, a resistor R3, a resistor R4, a diode TVS1, a resistor R5, a triode Q3 and a resistor R6. The utility model realizes transient surge voltage suppression based on the field effect transistor, can accurately control the surge voltage, can effectively reduce starting impact current, reduce adverse effect on equipment, clamps the surge voltage, effectively protects a post-stage power supply, improves the stability of a power supply system, has simple structure, uses fewer peripheral devices, has low power consumption during working, and has high efficiency, stability and reliability.
Description
Technical Field
The embodiment of the utility model relates to the technical field of power supplies, in particular to a transient surge voltage suppression circuit and a power supply system.
Background
The surge voltage suppression circuit is realized by passive devices such as a transient printed diode and a plurality of piezoresistors, and the like, and the surge voltage suppression circuit can realize surge voltage suppression to a certain extent, but has poor stability and reliability, low control precision and sensitivity, easy aging of components, short service life and incapability of being used on electronic equipment with high requirements on surge voltage printing.
The above problems are to be solved.
Disclosure of Invention
In order to solve the related technical problems, the utility model provides a transient surge voltage suppression circuit and a power supply system, which are used for solving the problems mentioned in the background art section.
In order to achieve the above purpose, the embodiment of the present utility model adopts the following technical scheme:
in a first aspect, an embodiment of the present utility model provides a transient surge voltage suppression circuit, where the circuit includes a resistor R1, a field effect transistor Q1, a resistor R2, a transistor Q2, a resistor R3, a resistor R4, a diode TVS1, a resistor R5, a transistor Q3, and a resistor R6; one end of the resistor R1 is connected with one end of the resistor R2 and the positive end DC+ of the power supply, the grid electrode of the field effect transistor Q1 is connected with the other end of the resistor R1, one end of the resistor R4 is connected with the cathode of the diode TVS1 and the positive end DC+ of the power supply, the source electrode of the field effect transistor Q1 is connected, the other end of the resistor R2 is connected with one end of the resistor R6, the base electrode of the triode Q2 and the collector electrode of the triode Q3, the collector electrode of the triode Q2 is connected with the other end of the resistor R4, the other end of the resistor R6 is connected with the negative end DC-of the power supply, the emitter of the triode Q3 and one end of the resistor R5, the other end of the resistor R5 is connected with the base electrode of the triode Q3 and one end of the resistor R3, and the other end of the resistor R3 is connected with the anode of the diode TVS 1.
As an alternative embodiment, the field effect transistor Q1 is, but not limited to, a MOS transistor.
As an alternative embodiment, the drain of the field effect transistor Q1 is connected to the power input terminal vin+, and the emitter of the transistor Q3 is DC-connected to the power negative terminal and then to the ground terminal GND.
As an alternative embodiment, the transistor Q2 and the transistor Q3 employ, but are not limited to, bipolar transistors; the diode TVS1 employs a transient voltage suppression diode.
In a second aspect, an embodiment of the present utility model provides a power supply system, where the power supply system uses the transient surge voltage suppression circuit according to the first aspect.
The technical scheme of the embodiment of the utility model realizes transient surge voltage suppression based on the field effect transistor, can accurately control the surge voltage, can effectively reduce starting impact current, reduce adverse effect on equipment, clamps the surge voltage, effectively protects a post-stage power supply, improves the stability of a power supply system, has a simple structure, uses fewer peripheral devices, has low power consumption in working, has high efficiency, and is stable and reliable.
Drawings
For a clearer description and understanding of the technical solutions of the embodiments of the present utility model, the following description will make a brief introduction to the drawings required for the description of the embodiments of the present utility model, and it is obvious that the drawings in the following description are only some embodiments of the present utility model, and other drawings may be obtained according to the contents of the embodiments of the present utility model and the drawings without inventive effort for those skilled in the art.
Fig. 1 is a schematic diagram of a transient surge voltage suppression circuit according to an embodiment of the present utility model.
Detailed Description
In order to make the technical problems solved by the present utility model, the technical solutions adopted and the technical effects achieved more clear, the technical solutions of the embodiments of the present utility model will be described in further detail below with reference to the accompanying drawings, and it is obvious that the described embodiments are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to fall within the scope of the utility model.
Example 1
Referring to fig. 1, fig. 1 is a schematic diagram of a transient surge voltage suppression circuit according to an embodiment of the present utility model.
The transient surge voltage suppression circuit in this embodiment specifically includes a resistor R1, a field effect transistor Q1, a resistor R2, a triode Q2, a resistor R3, a resistor R4, a diode TVS1, a resistor R5, a triode Q3, and a resistor R6; one end of the resistor R1 is connected with one end of the resistor R2 and the positive end DC+ of the power supply, the grid electrode of the field effect transistor Q1 is connected with the other end of the resistor R1, one end of the resistor R4 is connected with the cathode of the diode TVS1 and the positive end DC+ of the power supply, the source electrode of the field effect transistor Q1 is connected, the other end of the resistor R2 is connected with one end of the resistor R6, the base electrode of the triode Q2 and the collector electrode of the triode Q3, the collector electrode of the triode Q2 is connected with the other end of the resistor R4, the other end of the resistor R6 is connected with the negative end DC-of the power supply, the emitter of the triode Q3 and one end of the resistor R5, the other end of the resistor R5 is connected with the base electrode of the triode Q3 and one end of the resistor R3, and the other end of the resistor R3 is connected with the anode of the diode TVS 1.
Illustratively, the field effect transistor Q1 in this embodiment is, but not limited to, a MOS transistor. Illustratively, in this embodiment, the drain of the field effect transistor Q1 is connected to the power input terminal vin+, and the emitter of the transistor Q3 is DC-connected to the power negative terminal and then to the ground terminal GND. Illustratively, the transistors Q2 and Q3 in this embodiment are, but not limited to, bipolar transistors; the diode TVS1 employs a transient voltage suppression diode.
Specifically, when the transient surge voltage suppression circuit in this embodiment works, if the voltage is normal, the diode TVS1 is in a high-resistance state, the resistor R3 and the resistor R5 have no voltage, the base voltage of the triode Q3 is zero, the triode Q3 is in an off state, the input voltage is divided by the resistor R2, the voltage divided by the resistor R6 generates a high level at the base of the triode Q2 and is greater than the on voltage of the triode Q2, the emitter and the collector (ce) of the triode Q2 are conducted, the input voltage is divided by the resistor R1, the voltage divided by the resistor R4 generates a high level at the gate of the field effect transistor Q1 and reaches the on voltage of the field effect transistor Q1, the field effect transistor Q1 is conducted, and the input direct current normally supplies power to the device. When the surge voltage is output from the input end, the diode TVS1 is quickly changed from a high-resistance state to a low-resistance state, the abnormal overvoltage is clamped at a lower voltage, the input voltage is changed from a low level to a high level at the diode TVS1, the resistor R3 and the resistor R5 are divided, the base electrode of the triode Q3 is changed from a cut-off state to an on state, the resistor R2 and the voltage between the resistors R6 is changed from a high level to a low level, the triode Q2 is changed from a conducting state to a cut-off state, the voltage between the resistor R1 and the resistor R4 is changed from a high level to a low level, the voltage is smaller than the starting voltage of the field effect transistor Q1, the field effect transistor Q1 is changed from a conducting state to a cut-off state, the input is stopped to supply power to the equipment, and damage to the equipment caused by the surge voltage is effectively avoided. When the abnormal instant surge voltage disappears, the resistance value of the diode TVS1 is recovered to a high resistance state, the triode Q3 is cut off, the field effect transistor Q1 and the triode Q2 are conducted, and the circuit is recovered to a normal power supply state. The transient surge voltage suppression circuit provided by the embodiment of the utility model realizes transient surge voltage suppression based on the field effect transistor, can accurately control the surge voltage, can effectively reduce starting impact current, reduce adverse effects on equipment, clamps the surge voltage, effectively protects a post-stage power supply, improves the stability of a power supply system, has a simple structure, uses fewer peripheral devices, has low power consumption in working, and is high in efficiency, stable and reliable.
Example two
The present embodiment provides a power supply system, which adopts the transient surge voltage suppression circuit described in the first embodiment.
The power supply system provided by the embodiment of the utility model is added with the transient surge voltage suppression circuit, the transient surge voltage suppression circuit is used for realizing transient surge voltage suppression based on the field effect transistor, can accurately control the surge voltage, can effectively reduce the starting impact current, reduce the adverse effect on equipment, clamp the surge voltage, effectively protect the secondary power supply, improve the stability of the power supply system, and has the advantages of simple structure, few used peripheral devices, low power consumption during working, high efficiency, stability and reliability.
Note that the above is only a preferred embodiment of the present utility model and the technical principle applied. The present utility model is not limited to the specific embodiments described herein, but is capable of numerous modifications, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the utility model. Therefore, while the utility model has been described in connection with the above embodiments, the utility model is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the utility model, which is set forth in the following claims.
Claims (5)
1. The transient surge voltage suppression circuit is characterized by comprising a resistor R1, a field effect transistor Q1, a resistor R2, a triode Q2, a resistor R3, a resistor R4, a diode TVS1, a resistor R5, a triode Q3 and a resistor R6; one end of the resistor R1 is connected with one end of the resistor R2 and the positive end DC+ of the power supply, the grid electrode of the field effect transistor Q1 is connected with the other end of the resistor R1, one end of the resistor R4 is connected with the cathode of the diode TVS1 and the positive end DC+ of the power supply, the source electrode of the field effect transistor Q1 is connected, the other end of the resistor R2 is connected with one end of the resistor R6, the base electrode of the triode Q2 and the collector electrode of the triode Q3, the collector electrode of the triode Q2 is connected with the other end of the resistor R4, the other end of the resistor R6 is connected with the negative end DC-of the power supply, the emitter of the triode Q3 and one end of the resistor R5, the other end of the resistor R5 is connected with the base electrode of the triode Q3 and one end of the resistor R3, and the other end of the resistor R3 is connected with the anode of the diode TVS 1.
2. The transient surge voltage suppression circuit according to claim 1, wherein the field effect transistor Q1 employs, but is not limited to, a MOS transistor.
3. The transient surge voltage suppression circuit according to claim 2, wherein the drain of the field effect transistor Q1 is connected to the power input terminal vin+, and the emitter of the transistor Q3 is DC-connected to the power negative terminal and then to the ground terminal GND.
4. A transient surge voltage suppression circuit according to claim 3, wherein said transistor Q2 and said transistor Q3 employ, but are not limited to, bipolar transistors; the diode TVS1 employs a transient voltage suppression diode.
5. A power supply system employing the transient surge voltage suppression circuit according to any one of claims 1 to 4.
Priority Applications (1)
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CN202223579321.0U CN219086799U (en) | 2022-12-31 | 2022-12-31 | Transient surge voltage suppression circuit and power supply system |
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CN202223579321.0U CN219086799U (en) | 2022-12-31 | 2022-12-31 | Transient surge voltage suppression circuit and power supply system |
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CN219086799U true CN219086799U (en) | 2023-05-26 |
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CN202223579321.0U Active CN219086799U (en) | 2022-12-31 | 2022-12-31 | Transient surge voltage suppression circuit and power supply system |
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