CN217240326U - Anti-reverse connection circuit, electronic equipment and vehicle - Google Patents
Anti-reverse connection circuit, electronic equipment and vehicle Download PDFInfo
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- CN217240326U CN217240326U CN202220315210.XU CN202220315210U CN217240326U CN 217240326 U CN217240326 U CN 217240326U CN 202220315210 U CN202220315210 U CN 202220315210U CN 217240326 U CN217240326 U CN 217240326U
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Abstract
The application provides a reverse connection preventing circuit, electronic equipment and a vehicle. The reverse connection preventing circuit comprises two NMOS tubes, a reverse connection turn-off circuit and a driving circuit, wherein the drain electrode of a first NMOS tube is used for being connected with a power supply, the drain electrode of a second NMOS tube is used for being connected with a load, the reverse connection turn-off circuit is respectively connected with the grid electrode of the first NMOS tube and the grid electrode of the second NMOS tube, the reverse connection turn-off circuit is used for turning off the two NMOS tubes under the condition that the power supply is reversely connected, the driving circuit comprises a driving chip, a first input pin of the driving chip is used for being connected with the power supply, a second input pin of the driving chip is used for being connected with the load, an output pin is connected with a second input pin of the reverse connection turn-off circuit, and the driving circuit is used for driving the two NMOS tubes. The anti-reverse connection circuit adopts two NMOS tubes to form a high-current path, so that great voltage attenuation cannot be caused when high current flows through the anti-reverse connection circuit, and the service life of the anti-reverse connection circuit is prolonged.
Description
Technical Field
The application relates to the field of reverse connection prevention circuits, in particular to a reverse connection prevention circuit, electronic equipment and a vehicle.
Background
The reverse connection of the power supply is strictly prevented in the use process, and once the power supply is reversely connected, the load and components are easily burnt. At present, a plurality of reverse connection circuits are provided, for example, a diode is directly connected in series in the circuit, and electronic components are prevented from being damaged due to wrong wiring of a power supply anode and a power supply cathode. However, although the anti-reverse connection circuit has a simple structure, because the voltage drop across the diode is relatively high, when a large current flows through the diode, the loss across the diode is very large, the efficiency of the system is reduced, and the service life of the diode and the system is shortened.
Therefore, there is a need for an anti-reverse connection circuit that does not affect the system lifetime.
The above information disclosed in this background section is only for enhancement of understanding of the background of the technology described herein and, therefore, certain information may be included in the background that does not form the prior art that is already known in this country to a person of ordinary skill in the art.
SUMMERY OF THE UTILITY MODEL
The application mainly aims to provide an anti-reverse connection circuit, electronic equipment and a vehicle, so that the problem that the anti-reverse connection circuit which cannot influence the service life of a system is lacked in the prior art is solved.
In order to achieve the above object, according to one aspect of the present application, there is provided an anti-reverse connection line including: the two NMOS tubes are respectively a first NMOS tube and a second NMOS tube, the drain electrode of the first NMOS tube is used for being connected with a power supply, the source electrode of the first NMOS tube is connected with the source electrode of the second NMOS tube, the grid electrode of the first NMOS tube is connected with the grid electrode of the second NMOS tube, and the drain electrode of the second NMOS tube is used for being connected with a load; the reverse connection turn-off circuit comprises a first input end, a second input end and an output end, wherein the first input end of the reverse connection turn-off circuit is respectively connected with the source electrode of the first NMOS tube and the source electrode of the second NMOS tube, the second input end of the reverse connection turn-off circuit is respectively connected with the grid electrode of the first NMOS tube and the grid electrode of the second NMOS tube, the output end of the reverse connection turn-off circuit is grounded, and the reverse connection turn-off circuit is used for turning off the first NMOS tube and the second NMOS tube under the condition that the power supply is reversely connected; the driving circuit comprises a driving chip, the driving chip comprises a first input pin, a second input pin and an output pin, the first input pin is used for being connected with the power supply, the second input pin is used for being connected with the load, the output pin is connected with a second input end of the reverse connection turn-off circuit, and the driving circuit is used for driving the first NMOS tube and the second NMOS tube to work.
Optionally, the driving circuit further comprises: the buffer circuit comprises an input end, a first output end and a second output end, the input end of the buffer circuit is connected with the output pin, the first output end of the buffer circuit is connected with the second input end of the reverse connection turn-off circuit, the second output end of the buffer circuit is grounded, and the buffer circuit is used for enabling the second NMOS tube to be slowly turned on; the first protection unit comprises an input end and an output end, the input end of the first protection unit is connected with the first output end of the buffer circuit, and the output end of the first protection unit is connected with the input end of the buffer circuit; and the second protection unit comprises an input end and an output end, the input end of the second protection unit is used for being connected with the power supply, and the output end of the second protection unit is connected with the first input pin.
Optionally, the buffer circuit includes a first resistor, a first diode, and a first capacitor, a first end of the first resistor is an input end of the buffer circuit, a second end of the first resistor is a first output end of the buffer circuit, an anode of the first diode is a first output end of the buffer circuit, a cathode of the first diode is connected to a first end of the first capacitor, and a second end of the first capacitor is grounded.
Optionally, the first protection unit includes a second diode, an anode of the second diode is an input end of the first protection unit, and a cathode of the second diode is an output end of the first protection unit.
Optionally, the second protection unit includes a third diode, an anode of the third diode is an input end of the second protection unit, and a cathode of the third diode is an output end of the second protection unit.
Optionally, the reverse connection shutdown circuit includes a triode, a fourth diode, and a second resistor, a collector of the triode is a second input terminal of the reverse connection shutdown circuit, an emitter of the triode is a first input terminal of the reverse connection shutdown circuit, an anode of the fourth diode is connected with an emitter of the triode, a first end of the second resistor is connected with a cathode of the fourth diode and a base of the triode, respectively, and a second end of the second resistor is an output terminal of the reverse connection shutdown circuit.
Optionally, the driver chip further includes a third input pin, a fourth input pin, a fifth input pin, and a sixth input pin, and the reverse connection preventing circuit further includes: the overcurrent protection circuit comprises a first detection unit and a second detection unit, wherein the first detection unit comprises an input end and an output end, the second detection unit comprises an input end and an output end, the input end of the first detection unit is respectively connected with the source electrode of the first NMOS tube and the source electrode of the second NMOS tube, the output end of the first detection unit is connected with the third input pin, the input end of the second detection unit is connected with the drain electrode of the second NMOS tube, the output end of the second detection unit is connected with the second input pin, the first detection unit and the second detection unit are respectively used for detecting the voltage of the third input pin and the second input pin, the driving chip is further used for turning off the first NMOS tube and the second NMOS tube under the condition that the voltage difference value of the second input pin and the third input pin is larger than a preset value; the voltage protection circuit comprises an input end, a first output end, a second output end and a third output end, the input end of the voltage protection circuit is connected with the first input pin, the first output end of the voltage protection circuit is connected with the fourth input pin, the second output end of the voltage protection circuit is connected with the fifth input pin, the third output end of the voltage protection circuit is grounded, and the driving chip is further used for turning off the first NMOS tube and the second NMOS tube when the voltage of the power supply is not in a preset range; the external enabling circuit comprises an input end, a first output end, a second output end and a third output end, wherein the input end of the external enabling circuit is used for accessing a switching signal, the first output end of the external enabling circuit is connected with the sixth input pin, the second output end of the external enabling circuit is grounded, the third output end of the external enabling circuit is grounded, and the driving chip is used for discontinuously controlling the first NMOS tube and the second NMOS tube to be opened according to the switching signal; the protection circuit comprises an input end and an output end, the input end of the protection circuit is used for being connected with the power supply, the output end of the protection circuit is grounded, and the protection circuit is used for inhibiting the transient change of the voltage of the power supply under the condition that the first NMOS tube and the second NMOS tube are turned off.
Optionally, the first detection unit includes a third resistor, a first end of the third resistor is an input end of the first detection unit, and a second end of the third resistor is an output end of the first detection unit.
Optionally, the second detection unit includes a fourth resistor, a first end of the fourth resistor is an input end of the second detection unit, and a second end of the fourth resistor is an output end of the second detection unit.
Optionally, the voltage protection circuit includes a fifth resistor, a sixth resistor and a seventh resistor, the first end of the fifth resistor is the input end of the voltage protection circuit, the second end of the fifth resistor is connected to the first end of the sixth resistor, the second end of the fifth resistor is the first output end of the voltage protection circuit, the second end of the sixth resistor is connected to the first end of the seventh resistor, the second end of the sixth resistor is the first output end of the voltage protection circuit, and the second end of the seventh resistor is grounded.
Optionally, the external enable circuit includes an eighth resistor, a ninth resistor, and a second capacitor, the first end of the eighth resistor is the input end of the external enable circuit, the second end of the eighth resistor is connected to the first end of the ninth resistor, the second end of the eighth resistor is the first output end of the external enable circuit, the second end of the ninth resistor is the second output end of the external enable circuit, the first end of the second capacitor is connected to the first end of the ninth resistor, and the second end of the second capacitor is the third output end of the external enable circuit.
Optionally, the protection circuit includes a fifth diode, a first end of the fifth diode is an input end of the protection circuit, and a second end of the fifth diode is an output end of the protection circuit.
According to another aspect of the present application, there is provided an electronic apparatus including a reverse connection preventing circuit, the reverse connection preventing circuit being any one of the reverse connection preventing circuits.
According to still another aspect of the present application, there is provided a vehicle including a reverse-connection preventing circuit, the reverse-connection preventing circuit being any one of the reverse-connection preventing circuits.
By applying the technical scheme, the reverse connection preventing circuit comprises two NMOS tubes, a reverse connection turn-off circuit and a driving circuit, wherein the drain electrode of the first NMOS tube is used for being connected with a power supply, the source electrode of the first NMOS tube is connected with the source electrode of the second NMOS tube, the grid electrode of the first NMOS tube is connected with the grid electrode of the second NMOS tube, the drain electrode of the second NMOS tube is used for being connected with a load, the first input end of the reverse connection turn-off circuit is connected with the grid electrode of the first NMOS tube and the grid electrode of the second NMOS tube, the reverse connection turn-off circuit is respectively connected with the grid electrode of the first NMOS tube and the grid electrode of the second NMOS tube, the reverse connection turn-off circuit is used for turning off the first NMOS tube and the second NMOS tube under the condition that the power supply is reversely connected, the driving circuit comprises a driving chip, the first input pin of the driving chip is used for being connected with the power supply, the second input pin of the driving chip is used for being connected with the load, and the output pin is connected with the second input pin of the reverse connection turn-off circuit, the driving circuit is used for driving the first NMOS tube and the second NMOS tube. This prevent reverse-connection circuit adopts two NMOS pipes, reverse-connection turn-off circuit and drive circuit, two NMOS pipes constitute the route of heavy current, can not arouse very big voltage attenuation when the heavy current flows through, compare and adopt the diode as preventing reverse-connection circuit among the prior art, the voltage drop ratio at diode both ends is higher, because two NMOS pipes can not arouse very big voltage attenuation when the heavy current flows through, so the voltage drop at the both ends of two NMOS pipes of this application can not be very big, simultaneously the reverse-connection turn-off circuit of this application, when the power is reverse-connected, can in time turn-off two NMOS pipes, can further avoid two NMOS pipes to receive the loss, thereby further promoted the life of preventing reverse-connection circuit, and then solved and lacked the problem that one kind can not influence the anti-connection circuit of system life among the prior art.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this application, are included to provide an alternative understanding of the application, and the description and illustrations of the embodiments of the application are intended to illustrate and not to limit the application. In the drawings:
FIG. 1 shows a schematic diagram of an anti-reverse wiring according to an embodiment of the present application;
fig. 2 shows a circuit diagram of an anti-reverse connection line according to an embodiment of the present application.
Wherein the figures include the following reference numerals:
10. a first NMOS transistor; 20. a second NMOS transistor; 30. a power source; 40. a load; 50. the reverse connection turn-off circuit; 60. a driver chip; 70. an overcurrent protection circuit; 80. a voltage protection circuit; 90. a switching signal; 100. an external enable circuit; 101. an eighth resistor; 102. a ninth resistor; 103. a second capacitor; 110. a protection circuit; 501. a triode; 502. a fourth diode; 503. a second resistor; 601. a buffer circuit; 602. a first protection unit; 603. a second protection unit; 604. a first resistor; 605. a first diode; 606. a first capacitor; 607. a third capacitor; 701. a first detection unit; 702. a second detection unit; 801. a fifth resistor; 802. a sixth resistor; 803. and a seventh resistor.
Detailed Description
It should be noted that the following detailed description is exemplary and is intended to provide an alternative description of the present application. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments according to the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, and it should be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof, unless the context clearly indicates otherwise.
It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present. Also, in the specification and claims, when an element is described as being "connected" to another element, the element may be "directly connected" to the other element or "connected" to the other element through a third element.
As described in the background art, an anti-reverse connection circuit which does not affect the service life of a system is lacked in the prior art, and in order to solve the problems, the application provides the anti-reverse connection circuit, the electronic equipment and the vehicle.
According to an embodiment of the present application, there is provided an anti-reverse connection line. Fig. 1 shows a schematic diagram of an anti-reverse connection circuit according to an embodiment of the present application, as shown in fig. 1, the anti-reverse connection circuit includes two NMOS transistors, a reverse connection turn-off circuit 50 and a driving circuit, where the two NMOS transistors are a first NMOS transistor 10 and a second NMOS transistor 20, respectively, a drain of the first NMOS transistor 10 is used for connecting to a power supply 30, a source of the first NMOS transistor 10 is connected to a source of the second NMOS transistor 20, a gate of the first NMOS transistor 10 is connected to a gate of the second NMOS transistor 20, and a drain of the second NMOS transistor 20 is used for connecting to a load 40; the reverse connection shutdown circuit 50 includes a first input terminal, a second input terminal and an output terminal, the first input terminal of the reverse connection shutdown circuit 50 is respectively connected to the source of the first NMOS transistor 10 and the source of the second NMOS transistor 20, the second input terminal of the reverse connection shutdown circuit 50 is respectively connected to the gate of the first NMOS transistor 10 and the gate of the second NMOS transistor 20, the output terminal of the reverse connection shutdown circuit 50 is grounded, and the reverse connection shutdown circuit 50 is configured to shut down the first NMOS transistor 10 and the second NMOS transistor 20 when the power supply 30 is in reverse connection; the driving circuit includes a driving chip 60, the driving chip 60 includes a first input pin, a second input pin and an output pin, the first input pin is used for connecting the power supply 30, the second input pin is used for connecting the load 40, the output pin is connected with a second input end of the reverse connection turn-off circuit 50, and the driving circuit is used for driving the first NMOS transistor 10 and the second NMOS transistor 20 to work.
The reverse connection preventing circuit comprises two NMOS tubes, a reverse connection turn-off circuit and a drive circuit, wherein, the drain electrode of the first NMOS tube is used for connecting a power supply, the source electrode of the first NMOS tube is connected with the source electrode of the second NMOS tube, the grid electrode of the first NMOS tube is connected with the grid electrode of the second NMOS tube, the drain electrode of the second NMOS tube is used for connecting a load, the first input end of the reverse connection turn-off circuit is connected with the grid electrode of the first NMOS tube and the grid electrode of the second NMOS tube, the reverse connection turn-off circuit is respectively connected with the grid electrode of the first NMOS tube and the grid electrode of the second NMOS tube, the reverse connection turn-off circuit is used for switching on the power supply under the condition of reverse connection, the first NMOS tube and the second NMOS tube are turned off, the driving circuit comprises a driving chip, a first input pin of the driving chip is used for being connected with a power supply, a second input pin of the driving chip is used for being connected with a load, an output pin of the driving chip is connected with a second input pin of the reverse connection turn-off circuit, and the driving circuit is used for driving the first NMOS tube and the second NMOS tube. This prevent reverse-connection circuit adopts two NMOS pipes, reverse-connection turn-off circuit and drive circuit, two NMOS pipes constitute the route of heavy current, can not arouse very big voltage attenuation when the heavy current flows through, compare and adopt the diode as preventing reverse-connection circuit among the prior art, the voltage drop ratio at diode both ends is higher, because two NMOS pipes can not arouse very big voltage attenuation when the heavy current flows through, so the voltage drop at the both ends of two NMOS pipes of this application can not be very big, simultaneously the reverse-connection turn-off circuit of this application, when the power is reverse-connected, can in time turn-off two NMOS pipes, can further avoid two NMOS pipes to receive the loss, thereby further promoted the life of preventing reverse-connection circuit, and then solved and lacked the problem that one kind can not influence the anti-connection circuit of system life among the prior art.
In an embodiment of the present application, as shown in fig. 2, the driving circuit further includes a buffer circuit 601, a first protection unit 602, and a second protection unit 603, wherein the buffer circuit 601 includes an input terminal, a first output terminal, and a second output terminal, the input terminal of the buffer circuit 601 is connected to the output pin, the first output terminal of the buffer circuit 601 is connected to the second input terminal of the reverse connection shutdown circuit 50, the second output terminal of the buffer circuit 601 is grounded, and the buffer circuit 601 is configured to enable the second NMOS transistor 20 to be turned on slowly; the first protection unit 602 includes an input terminal and an output terminal, the input terminal of the first protection unit 602 is connected to the first output terminal of the buffer circuit 601, and the output terminal of the first protection unit 602 is connected to the input terminal of the buffer circuit 601; the second protection unit 603 includes an input terminal and an output terminal, the input terminal of the second protection unit 603 is used for connecting to the power supply, and the output terminal of the second protection unit 603 is connected to the first input pin. In this embodiment, the driving circuit further includes a buffer circuit, a first protection unit and a second protection unit, where the buffer circuit makes the second NMOS transistor turn on slowly, so as to avoid an excessive load capacitance, and an excessive transient current causes the input voltage to be pulled low, the first protection unit can realize a fast turn-off of the first NMOS transistor and the second NMOS transistor under a condition that a power supply is reversely connected, and the second protection unit avoids a reverse connection voltage from being applied to a pin of the driving chip under a condition that the power supply is reversely connected, thereby further prolonging a service life of the circuit.
In order to further prolong the service life of the system, in another embodiment of the present application, as shown in fig. 2, the buffer circuit 601 includes a first resistor 604, a first diode 605 and a first capacitor 606, a first end of the first resistor 604 is an input end of the buffer circuit 601, a second end of the first resistor 604 is a first output end of the buffer circuit 601, an anode of the first diode 605 is a first output end of the buffer circuit 601, a cathode of the first diode 605 is connected to a first end of the first capacitor 606, and a second end of the first capacitor 606 is grounded.
In another embodiment of the present application, as shown in fig. 2, the first protection unit 602 includes a second diode, an anode of the second diode is an input end of the first protection unit 602, and a cathode of the second diode is an output end of the first protection unit 602. In this embodiment, when the power supply is reversely connected, the second diode is turned on to form a loop with the first resistor, so that the voltage flowing to the first NMOS transistor and the second NMOS transistor flows to the second diode, thereby realizing the rapid turn-off of the first NMOS transistor and the second NMOS transistor, and further prolonging the service life of the circuit.
In another embodiment of the present application, as shown in fig. 2, the second protection unit 603 includes a third diode, an anode of the third diode is an input terminal of the second protection unit 603, and a cathode of the third diode is an output terminal of the second protection unit 603. In this embodiment, when the power is reversely connected, the third diode is turned off, and the power voltage does not flow into the driving chip, so that the service life of the circuit is further prolonged.
Of course, in practical applications, the first protection unit and the second protection unit may be not only diodes, but also other switching devices, and those skilled in the art may select the protection units according to practical situations.
In still another embodiment of the present application, as shown in fig. 2, the reverse shutdown circuit 50 includes a transistor 501, a fourth diode 502, and a second resistor 503, a collector of the transistor 501 is a second input terminal of the reverse shutdown circuit 50, an emitter of the transistor 501 is a first input terminal of the reverse shutdown circuit 50, an anode of the fourth diode 502 is connected to the emitter of the transistor 501, a first end of the second resistor 503 is connected to a cathode of the fourth diode 502 and a base of the transistor 501, respectively, and a second end of the second resistor 503 is an output terminal of the reverse shutdown circuit 50. In this embodiment, when the power is connected, the fourth diode is turned on to clamp the emitter and collector voltages of the transistor to the same voltage, and the collector voltage is lower than the emitter voltage, so that the transistor is turned off, and therefore the gate voltages of the first and second NMOS transistors are driven by the driving coreThe output pin of the chip. When V of the first NMOS transistor and the second NMOS transistor GS The voltage is higher than the starting voltage, the first NMOS tube and the second NMOS tube are completely conducted, and the circuit outputs the voltage. When the power supply is reversely connected, the base electrode of the triode is positive, the emitting electrode of the triode is connected to the ground through the body diode of the first NMOS tube, so that the triode is conducted, and the V of the triode is CE The voltage is almost 0, namely V of the first NMOS tube and the second NMOS tube GS The voltage is 0, the first NMOS tube and the second NMOS tube are turned off, and the first NMOS tube, the second NMOS tube and the driving chip can be protected from being damaged when a power supply is reversely connected, so that the stability of the system is further improved.
In another embodiment of the present application, as shown in fig. 1 and fig. 2, the driving chip 60 further includes a third input pin, a fourth input pin, a fifth input pin and a sixth input pin, the reverse connection preventing circuit further includes an overcurrent protection circuit 70, a voltage protection circuit 80, an external enable circuit 100 and a protection circuit 110, wherein the overcurrent protection circuit 70 includes a first detection unit 701 and a second detection unit 702, the first detection unit 701 includes an input end and an output end, the second detection unit 702 includes an input end and an output end, the input end of the first detection unit 701 is respectively connected to the source of the first NMOS transistor 10 and the source of the second NMOS transistor 20, the output end of the first detection unit 701 is connected to the third input pin, the input end of the second detection unit 702 is connected to the drain of the second NMOS transistor 20, the output end of the second detecting unit 702 is connected to the second input pin, the first detecting unit 701 and the second detecting unit 702 are respectively configured to detect voltages of the third input pin and the second input pin, and the driving chip 60 is further configured to turn off the first NMOS transistor 10 and the second NMOS transistor 20 when a voltage difference between the second input pin and the third input pin is greater than a predetermined value; the voltage protection circuit 80 includes an input terminal, a first output terminal, a second output terminal, and a third output terminal, the input terminal of the voltage protection circuit 80 is connected to the first input pin, the first output terminal of the voltage protection circuit 80 is connected to the fourth input pin, the second output terminal of the voltage protection circuit 80 is connected to the fifth input pin, the third output terminal of the voltage protection circuit 80 is grounded, and the driving chip 60 is further configured to turn off the first NMOS transistor 10 and the second NMOS transistor 20 when the voltage of the power supply 30 is not within a predetermined range; the external enable circuit 100 includes an input terminal, a first output terminal, a second output terminal, and a third output terminal, the input terminal of the external enable circuit 100 is configured to be connected to a switching signal 90, the first output terminal of the external enable circuit 100 is connected to the sixth input pin, the second output terminal of the external enable circuit 100 is grounded, the third output terminal of the external enable circuit 100 is grounded, and the driving chip 60 is configured to intermittently control the first NMOS transistor 10 and the second NMOS transistor 20 to be turned on according to the switching signal 90; the protection circuit 110 includes an input terminal and an output terminal, the input terminal of the protection circuit 110 is configured to be connected to the power supply 30, the output terminal of the protection circuit 110 is grounded, and the protection circuit 110 is configured to suppress a transient change in voltage of the power supply 30 when the first NMOS transistor 10 and the second NMOS transistor 20 are turned off. In this embodiment, the reverse connection preventing circuit further includes an overcurrent protection circuit, a voltage protection circuit, an external enabling circuit and a protection circuit, and when the power supply voltage is too large or too small, the overcurrent protection circuit, the voltage protection circuit and the protection circuit timely turn off the first NMOS transistor and the second NMOS transistor, so that the two NMOS transistors are prevented from being damaged, and the service life of the circuit is further prolonged. Meanwhile, the reverse connection preventing circuit also comprises an external enabling circuit, wherein the input end of the external enabling circuit is used for accessing a switching signal, a sixth input pin of a driving chip is linked with a first output end of the external enabling circuit, the driving chip can discontinuously control the first NMOS tube and the second NMOS tube to be started according to the switching signal, when the voltage of the switching signal is higher than the starting voltage of the driving chip and higher than the minimum value of the preset range, the driving chip is started, the output pin outputs voltage, so that the first NMOS tube and the second NMOS tube are started, when the voltage of the switching signal is lower than the starting voltage of the driving chip, the driving chip cannot be started, the output pin cannot output voltage, so that the first NMOS tube and the second NMOS tube are turned off, so that the first NMOS tube and the second NMOS tube can be discontinuously started according to the requirements of users, the operation of the user is more flexible.
In another embodiment of the present invention, as shown in fig. 2, the first detecting unit 701 includes a third resistor, a first end of the third resistor is an input end of the first detecting unit 701, and a second end of the third resistor is an output end of the first detecting unit 701, so as to obtain an accurate voltage value of the input pin.
In order to obtain an accurate voltage value of the input pin, as shown in fig. 2, in another embodiment of the present application, the second detecting unit 702 includes a fourth resistor, a first end of the fourth resistor is an input end of the second detecting unit 702, and a second end of the fourth resistor is an output end of the second detecting unit 702.
In a specific embodiment of the present application, the maximum sustainable current value of the reverse connection preventing circuit may be set by setting the third resistor.
Of course, in practical applications, the first detecting unit and the second detecting unit may be not only resistors but also electronic devices, and those skilled in the art may select the detecting units according to practical situations.
In another embodiment of the present application, as shown in fig. 2, the voltage protection circuit 80 includes a fifth resistor 801, a sixth resistor 802 and a seventh resistor 803, a first end of the fifth resistor 801 is an input end of the voltage protection circuit 80, a second end of the fifth resistor 801 is connected to a first end of the sixth resistor 802, a second end of the fifth resistor 801 is a first output end of the voltage protection circuit 80, a second end of the sixth resistor 802 is connected to a first end of the seventh resistor 803, a second end of the sixth resistor 802 is a first output end of the voltage protection circuit 80, and a second end of the seventh resistor 803 is grounded. In this embodiment, the predetermined range may be set by setting the fifth resistor, the sixth resistor and the seventh resistor, the power supply circuit is turned off when the power supply voltage exceeds the maximum value of the predetermined range, so as to protect the load from being damaged by a high voltage, the power supply circuit is turned off when the power supply voltage is lower than the minimum value of the predetermined range, so as to prevent the driver chip and the subsequent circuit from entering an unstable state under a low voltage condition, and when the power supply voltage rises from zero to the minimum value of the predetermined range, the driver chip starts to operate, so as to prevent the driver chip from entering an unstable state, thereby further improving the service life of the system.
In another embodiment of the present invention, as shown in fig. 2, the external enable circuit 100 includes an eighth resistor 101, a ninth resistor 102 and a second capacitor 103, wherein a first end of the eighth resistor 101 is an input end of the external enable circuit 100, a second end of the eighth resistor 101 is connected to a first end of the ninth resistor 102, a second end of the eighth resistor 101 is a first output end of the external enable circuit 100, a second end of the ninth resistor 102 is a second output end of the external enable circuit 100, a first end of the second capacitor 103 is connected to a first end of the ninth resistor 102, and a second end of the second capacitor 103 is a third output end of the external enable circuit 100.
In a specific embodiment of the present application, as shown in fig. 2, the driving chip 60 further includes a first output pin and a second output pin. The driving chip 60 includes a timer, a first current source, a second current source, and a third capacitor 607. The first output pin is an output pin of the timer, the first output pin is connected to a first end of the third capacitor 607, and a second end of the third capacitor 607 is grounded. The first current source charges the third capacitor 607, and the second current source charges the first NMOS transistor 10, the second NMOS transistor 20, and the first capacitor through an output pin, if V of the first NMOS transistor 10 and the second NMOS transistor 20 is larger than V GS The time for the voltage to rise to the predetermined voltage is less than the charging time set by the third capacitor 607, the driver chip 60 is started, and the line outputs the voltage. If V of the first NMOS transistor 10 and the second NMOS transistor 20 GS The time for the voltage to rise to the predetermined voltage is greater thanThe driving chip 60 cannot be started up and the circuit has no output for the error time set by the three capacitors 607. The second output pin of the driving chip 60 is used for displaying whether the driving chip 60 works normally, and a low level indicates that the driving chip 60 has a fault and cannot be started normally; the high level indicates that the driving chip 60 is working properly.
In another specific embodiment of the present application, as shown in fig. 2, the driving chip 60 further includes a ground pin, and the driving chip 60 further includes two diodes, all the pins except the first input pin and the ground pin are connected to the first input pin and the ground pin through the two diodes, an anode of one diode is connected to all the other pins, a cathode of the diode is connected to the first input pin, an anode of the other diode is connected to all the other pins, and a cathode of the other diode is connected to the ground pin.
In yet another embodiment of the present invention, as shown in fig. 2, the protection circuit 110 includes a fifth diode, a first terminal of the fifth diode is an input terminal of the protection circuit 110, and a second terminal of the fifth diode is an output terminal of the protection circuit 110. In this embodiment, the fifth diode is configured to limit a power voltage from changing instantaneously when the first NMOS transistor and the second NMOS transistor are turned off quickly.
Similarly, in practical applications, the protection circuit may be not only a diode, but also other electronic devices, and those skilled in the art may select the protection circuit according to practical situations.
According to another aspect of the present application, an electronic device is provided, which includes an anti-reverse connection line, where the anti-reverse connection line is any one of the anti-reverse connection lines.
The electronic equipment comprises an anti-reverse connection circuit, and the anti-reverse connection circuit is any one of the anti-reverse connection circuits. This prevent reverse-connection circuit adopts two NMOS pipes, reverse-connection turn-off circuit and drive circuit, two NMOS pipes constitute the route of heavy current, can not arouse very big voltage attenuation when the heavy current flows through, compare and adopt the diode as preventing reverse-connection circuit among the prior art, the voltage drop ratio at diode both ends is higher, because two NMOS pipes can not arouse very big voltage attenuation when the heavy current flows through, so the voltage drop at the both ends of two NMOS pipes of this application can not be very big, simultaneously the reverse-connection turn-off circuit of this application, when the power is reverse-connected, can in time turn-off two NMOS pipes, can further avoid two NMOS pipes to receive the loss, thereby further promoted the life of preventing reverse-connection circuit, and then solved and lacked the problem that one kind can not influence the anti-connection circuit of system life among the prior art.
According to another aspect of the present application, there is provided a vehicle including a reverse connection preventing circuit, the reverse connection preventing circuit being any one of the reverse connection preventing circuits described above.
The vehicle comprises a reverse connection preventing circuit, and the reverse connection preventing circuit is any reverse connection preventing circuit. This prevent reverse-connection circuit adopts two NMOS pipes, reverse-connection turn-off circuit and drive circuit, two NMOS pipes constitute the route of heavy current, can not arouse very big voltage attenuation when the heavy current flows through, compare and adopt the diode as preventing reverse-connection circuit among the prior art, the voltage drop ratio at diode both ends is higher, because two NMOS pipes can not arouse very big voltage attenuation when the heavy current flows through, so the voltage drop at the both ends of two NMOS pipes of this application can not be very big, simultaneously the reverse-connection turn-off circuit of this application, when the power is reverse-connected, can in time turn-off two NMOS pipes, can further avoid two NMOS pipes to receive the loss, thereby further promoted the life of preventing reverse-connection circuit, and then solved and lacked the problem that one kind can not influence the anti-connection circuit of system life among the prior art.
From the above description, it can be seen that the above-mentioned embodiments of the present application achieve the following technical effects:
1) the reverse connection preventing circuit comprises two NMOS tubes, a reverse connection turn-off circuit and a driving circuit, wherein a drain electrode of the first NMOS tube is used for being connected with a power supply, a source electrode of the first NMOS tube is connected with a source electrode of the second NMOS tube, a grid electrode of the first NMOS tube is connected with a grid electrode of the second NMOS tube, a drain electrode of the second NMOS tube is used for being connected with a load, a first input end of the reverse connection preventing circuit is connected with the grid electrode of the first NMOS tube and the grid electrode of the second NMOS tube, the reverse connection preventing circuit is respectively connected with the grid electrode of the first NMOS tube and the grid electrode of the second NMOS tube, the reverse connection preventing circuit is used for cutting off the first NMOS tube and the second NMOS tube under the condition that the power supply is reversely connected, the driving circuit comprises a driving chip, a first input pin of the driving chip is used for being connected with the power supply, a second input pin of the driving chip is used for being connected with the load, and a second input pin of the reverse connection preventing circuit is connected with a second input pin of the reverse connection preventing circuit, the driving circuit is used for driving the first NMOS tube and the second NMOS tube. This prevent reverse-connection circuit adopts two NMOS pipes, reverse-connection turn-off circuit and drive circuit, two NMOS pipes constitute the route of heavy current, can not arouse very big voltage attenuation when the heavy current flows through, compare and adopt the diode as preventing reverse-connection circuit among the prior art, the voltage drop ratio at diode both ends is higher, because two NMOS pipes can not arouse very big voltage attenuation when the heavy current flows through, so the voltage drop at the both ends of two NMOS pipes of this application can not be very big, simultaneously the reverse-connection turn-off circuit of this application, when the power is reverse-connected, can in time turn-off two NMOS pipes, can further avoid two NMOS pipes to receive the loss, thereby further promoted the life of preventing reverse-connection circuit, and then solved and lacked the problem that one kind can not influence the anti-connection circuit of system life among the prior art.
2) The electronic equipment comprises the reverse connection preventing circuit, and the reverse connection preventing circuit is any reverse connection preventing circuit. This prevent reverse-connection circuit adopts two NMOS pipes, reverse-connection turn-off circuit and drive circuit, two NMOS pipes constitute the route of heavy current, can not arouse very big voltage attenuation when the heavy current flows through, compare and adopt the diode as preventing reverse-connection circuit among the prior art, the voltage drop ratio at diode both ends is higher, because two NMOS pipes can not arouse very big voltage attenuation when the heavy current flows through, so the voltage drop at the both ends of two NMOS pipes of this application can not be very big, simultaneously the reverse-connection turn-off circuit of this application, when the power is reverse-connected, can in time turn-off two NMOS pipes, can further avoid two NMOS pipes to receive the loss, thereby further promoted the life of preventing reverse-connection circuit, and then solved and lacked the problem that one kind can not influence the anti-connection circuit of system life among the prior art.
3) The vehicle comprises a reverse connection preventing circuit, wherein the reverse connection preventing circuit is any reverse connection preventing circuit. This prevent reverse-connection circuit adopts two NMOS pipes, reverse-connection turn-off circuit and drive circuit, two NMOS pipes constitute the route of heavy current, can not arouse very big voltage attenuation when the heavy current flows through, compare and adopt the diode as preventing reverse-connection circuit among the prior art, the voltage drop ratio at diode both ends is higher, because two NMOS pipes can not arouse very big voltage attenuation when the heavy current flows through, so the voltage drop at the both ends of two NMOS pipes of this application can not be very big, simultaneously the reverse-connection turn-off circuit of this application, when the power is reverse-connected, can in time turn-off two NMOS pipes, can further avoid two NMOS pipes to receive the loss, thereby further promoted the life of preventing reverse-connection circuit, and then solved and lacked the problem that one kind can not influence the anti-connection circuit of system life among the prior art.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (14)
1. An anti-reverse connection circuit, comprising:
the two NMOS tubes are respectively a first NMOS tube and a second NMOS tube, the drain electrode of the first NMOS tube is used for being connected with a power supply, the source electrode of the first NMOS tube is connected with the source electrode of the second NMOS tube, the grid electrode of the first NMOS tube is connected with the grid electrode of the second NMOS tube, and the drain electrode of the second NMOS tube is used for being connected with a load;
the reverse connection turn-off circuit comprises a first input end, a second input end and an output end, wherein the first input end of the reverse connection turn-off circuit is respectively connected with the source electrode of the first NMOS tube and the source electrode of the second NMOS tube, the second input end of the reverse connection turn-off circuit is respectively connected with the grid electrode of the first NMOS tube and the grid electrode of the second NMOS tube, the output end of the reverse connection turn-off circuit is grounded, and the reverse connection turn-off circuit is used for turning off the first NMOS tube and the second NMOS tube under the condition that the power supply is reversely connected;
the driving circuit comprises a driving chip, the driving chip comprises a first input pin, a second input pin and an output pin, the first input pin is used for being connected with the power supply, the second input pin is used for being connected with the load, the output pin is connected with a second input end of the reverse connection turn-off circuit, and the driving circuit is used for driving the first NMOS tube and the second NMOS tube to work.
2. The reverse-connection preventing circuit according to claim 1, wherein the drive circuit further comprises:
the buffer circuit comprises an input end, a first output end and a second output end, the input end of the buffer circuit is connected with the output pin, the first output end of the buffer circuit is connected with the second input end of the reverse connection turn-off circuit, the second output end of the buffer circuit is grounded, and the buffer circuit is used for enabling the second NMOS tube to be slowly turned on;
the first protection unit comprises an input end and an output end, the input end of the first protection unit is connected with the first output end of the buffer circuit, and the output end of the first protection unit is connected with the input end of the buffer circuit;
and the second protection unit comprises an input end and an output end, the input end of the second protection unit is used for being connected with the power supply, and the output end of the second protection unit is connected with the first input pin.
3. The reverse-connection-prevention line as claimed in claim 2, wherein the buffer circuit comprises a first resistor, a first diode and a first capacitor, a first end of the first resistor is an input end of the buffer circuit, a second end of the first resistor is a first output end of the buffer circuit, an anode of the first diode is a first output end of the buffer circuit, a cathode of the first diode is connected with a first end of the first capacitor, and a second end of the first capacitor is grounded.
4. The reverse-connection-preventing line according to claim 2, wherein the first protection unit comprises a second diode, the anode of the second diode is the input end of the first protection unit, and the cathode of the second diode is the output end of the first protection unit.
5. The reverse-connection preventing circuit as claimed in claim 2, wherein the second protection unit comprises a third diode, the anode of the third diode is the input end of the second protection unit, and the cathode of the third diode is the output end of the second protection unit.
6. The reverse connection prevention circuit according to claim 1, wherein the reverse connection shutdown circuit comprises a triode, a fourth diode and a second resistor, a collector of the triode is a second input end of the reverse connection shutdown circuit, an emitter of the triode is a first input end of the reverse connection shutdown circuit, an anode of the fourth diode is connected with an emitter of the triode, a first end of the second resistor is respectively connected with a cathode of the fourth diode and a base of the triode, and a second end of the second resistor is an output end of the reverse connection shutdown circuit.
7. The reverse connection prevention circuit according to any one of claims 1 to 6, wherein the driver chip further comprises a third input pin, a fourth input pin, a fifth input pin, and a sixth input pin, and the reverse connection prevention circuit further comprises:
the overcurrent protection circuit comprises a first detection unit and a second detection unit, wherein the first detection unit comprises an input end and an output end, the second detection unit comprises an input end and an output end, the input end of the first detection unit is respectively connected with the source electrode of the first NMOS tube and the source electrode of the second NMOS tube, the output end of the first detection unit is connected with the third input pin, the input end of the second detection unit is connected with the drain electrode of the second NMOS tube, the output end of the second detection unit is connected with the second input pin, the first detection unit and the second detection unit are respectively used for detecting the voltage of the third input pin and the second input pin, the driving chip is further used for turning off the first NMOS tube and the second NMOS tube under the condition that the voltage difference value of the second input pin and the third input pin is larger than a preset value;
the voltage protection circuit comprises an input end, a first output end, a second output end and a third output end, the input end of the voltage protection circuit is connected with the first input pin, the first output end of the voltage protection circuit is connected with the fourth input pin, the second output end of the voltage protection circuit is connected with the fifth input pin, the third output end of the voltage protection circuit is grounded, and the driving chip is further used for turning off the first NMOS tube and the second NMOS tube when the voltage of the power supply is not in a preset range;
the external enabling circuit comprises an input end, a first output end, a second output end and a third output end, wherein the input end of the external enabling circuit is used for accessing a switching signal, the first output end of the external enabling circuit is connected with the sixth input pin, the second output end of the external enabling circuit is grounded, the third output end of the external enabling circuit is grounded, and the driving chip is used for discontinuously controlling the first NMOS tube and the second NMOS tube to be opened according to the switching signal;
the protection circuit comprises an input end and an output end, the input end of the protection circuit is used for being connected to the power supply, the output end of the protection circuit is grounded, and the protection circuit is used for inhibiting the transient change of the voltage of the power supply under the condition that the first NMOS tube and the second NMOS tube are turned off.
8. The reverse-connection preventing circuit according to claim 7, wherein the first detecting unit comprises a third resistor, a first end of the third resistor is an input end of the first detecting unit, and a second end of the third resistor is an output end of the first detecting unit.
9. The reverse-connection preventing circuit according to claim 7, wherein the second detecting unit comprises a fourth resistor, a first end of the fourth resistor is an input end of the second detecting unit, and a second end of the fourth resistor is an output end of the second detecting unit.
10. The reverse connection prevention circuit of claim 7, wherein the voltage protection circuit comprises a fifth resistor, a sixth resistor and a seventh resistor, the first end of the fifth resistor is the input end of the voltage protection circuit, the second end of the fifth resistor is connected with the first end of the sixth resistor, the second end of the fifth resistor is the first output end of the voltage protection circuit, the second end of the sixth resistor is connected with the first end of the seventh resistor, the second end of the sixth resistor is the first output end of the voltage protection circuit, and the second end of the seventh resistor is grounded.
11. The anti-reverse connection circuit according to claim 7, wherein the external enable circuit comprises an eighth resistor, a ninth resistor and a second capacitor, a first end of the eighth resistor is an input end of the external enable circuit, a second end of the eighth resistor is connected with a first end of the ninth resistor, a second end of the eighth resistor is a first output end of the external enable circuit, a second end of the ninth resistor is a second output end of the external enable circuit, a first end of the second capacitor is connected with a first end of the ninth resistor, and a second end of the second capacitor is a third output end of the external enable circuit.
12. The anti-reverse connection circuit according to claim 7, wherein the protection circuit comprises a fifth diode, a first terminal of the fifth diode is an input terminal of the protection circuit, and a second terminal of the fifth diode is an output terminal of the protection circuit.
13. An electronic device comprising an anti-reverse connection circuit, characterized in that the anti-reverse connection circuit is the anti-reverse connection circuit of any one of claims 1 to 12.
14. A vehicle comprising a reverse-connection preventing circuit, characterized in that the reverse-connection preventing circuit is the reverse-connection preventing circuit according to any one of claims 1 to 12.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220315210.XU CN217240326U (en) | 2022-02-16 | 2022-02-16 | Anti-reverse connection circuit, electronic equipment and vehicle |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220315210.XU CN217240326U (en) | 2022-02-16 | 2022-02-16 | Anti-reverse connection circuit, electronic equipment and vehicle |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN217240326U true CN217240326U (en) | 2022-08-19 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202220315210.XU Active CN217240326U (en) | 2022-02-16 | 2022-02-16 | Anti-reverse connection circuit, electronic equipment and vehicle |
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| Country | Link |
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| CN (1) | CN217240326U (en) |
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2022
- 2022-02-16 CN CN202220315210.XU patent/CN217240326U/en active Active
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