CN217935612U - Multimode EoC terminal equipment - Google Patents
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Abstract
The application relates to multimode EoC terminal equipment, and relates to the technical field of grounding of multimode Ethernet data through EoC. The multimode EoC terminal equipment comprises a power supply module, a Micro Control Unit (MCU) module, a high-frequency EoC module, a low-frequency EoC module and a radio frequency interface module; the power module is respectively connected with the MCU module, the high-frequency EoC module and the low-frequency EoC module. In the multimode EoC terminal equipment, the setting of a high-frequency EoC module and a low-frequency EoC module is carried out, so that the terminal has the capability of simultaneously processing a high-frequency signal and a low-frequency signal. In the using process, the radio frequency interface module is used for separating and correspondingly sending signals, and after the signals are processed, the data converted into the internet digital signals are converged by the MCU module and forwarded to the user end equipment, so that the user end equipment receives the signals. The process reduces the requirement for prepositive determination of the signal received by the EoC terminal and improves the application flexibility of the EoC terminal.
Description
Technical Field
The application relates to the technical field of realizing the landing of multimode Ethernet data through coaxial cable transmission (Ethernet over Coax, eoC), in particular to multimode EoC terminal equipment.
Background
The basic principle of the EoC technology is to adopt a specific medium conversion technology to transmit data signals meeting other standards through a home coaxial cable.
In the related art, the mainstream technical ground of EoC is embodied by a low-frequency EoC device and a high-frequency EoC device, wherein the low-frequency EoC device adopts the HomePlug AV standard, and the high-frequency EoC device adopts the HINOC2.0 standard. In the using process, an operator installs the two devices at the same time to meet the EoC device requirements in different application scenes.
However, the above usage requirements require that an operator needs to arrange the user groups according to the distribution of the user groups when performing machine room deployment, and strictly perform terminal-corresponding setting and usage. That is, in the related art, the application flexibility of the EoC terminal device is insufficient.
Disclosure of Invention
The application relates to multimode EoC terminal equipment, which can improve the use flexibility of the EoC terminal equipment. The multimode EoC terminal equipment comprises a power supply module, a Micro Control Unit (MCU) module, a high-frequency EoC module, a low-frequency EoC module and a radio frequency interface module;
the power supply module is respectively connected with the MCU module, the high-frequency EoC module and the low-frequency EoC module;
the radio frequency interface module and the MCU module are respectively connected with the high-frequency EoC module and the low-frequency EoC module;
the power module comprises a first power pack, a second power pack and a third power pack, the first power pack is connected with the high-frequency EoC module, the second power pack is connected with the low-frequency EoC module, and the third power pack is connected with the MCU module;
the radio frequency interface module comprises a mixer and a duplexer, the mixer is in communication connection with the duplexer, and the duplexer is used for receiving signals;
the MCU module comprises at least one output interface which is used for outputting signals.
In one possible implementation, the high frequency EoC module is implemented as a HINOC module;
the HINOC module comprises a switch circuit, a PA chip, a first balun chip, a second balun chip, a high-frequency radio frequency processing chip, a high-frequency baseband chip, a phy chip, a first clock chip and a second clock chip;
the exchanger circuit is connected with the frequency mixer;
the PA chip and the first balun chip are connected with the switch circuit;
the high-frequency radio frequency processing chip is respectively connected with the first balun chip, the second balun chip, the high-frequency baseband chip and the first clock chip;
the high-frequency baseband chip is connected with the first clock chip and the phy chip;
the phy chip is connected with the second clock chip, and the phy chip is connected with the MCU module.
In one possible implementation, the first power supply group comprises a 5V power supply, a 1.5V power supply, a first 1.2V power supply, and a first 3.3V power supply;
the 5V power supply is connected with the PA chip;
the 1.5V power supply and the first 1.2V power supply are connected with the high-frequency radio frequency processing chip;
the first 3.3V power supply is respectively connected with the baseband chip and the phy chip.
In one possible implementation, the low frequency EoC module is implemented as a homeplug av module;
the Homeplug AV module comprises a third balun chip, a low-frequency radio frequency processing chip, a low-frequency baseband chip and a third clock chip;
the third balun chip is connected with the frequency mixer;
the low-frequency radio frequency processing chip is connected with the third balun chip;
the low-frequency baseband chip is connected with the low-frequency radio frequency processing chip;
and the third clock chip is connected with the low-frequency baseband chip.
In one possible implementation manner, the second power module includes a 12V power supply, a second 1.2V power supply, and a second 3.3V power supply;
the 12V power supply is connected with the low-frequency radio frequency processing chip;
the second 1.2V power supply and the second 3.3V power supply are respectively connected with the low-frequency baseband chip.
In a possible implementation manner, the MCU module includes a central control chip, a memory chip and a fourth clock chip;
the central control chip is connected with the high-frequency EoC module and the low-frequency EoC module;
the storage chip is connected with the central control chip;
the fourth clock chip is connected with the storage chip;
the output interface is connected with the central control chip.
In one possible implementation manner, the third power module includes a 1.8V power supply, a 1.0V power supply, and a third 3.3V power supply;
the 1.8V power supply is in communication connection with the storage chip;
the 1.0V power supply and the third 3.3V power supply are connected with the central control chip.
The beneficial effect that technical scheme that this application provided brought includes at least:
in the multimode EoC terminal equipment, the high-frequency EoC module and the low-frequency EoC module are arranged, so that the terminal has the capability of simultaneously processing high-frequency signals and low-frequency signals. In the using process, the radio frequency interface module is used for separating and correspondingly sending signals, and after the signals are processed, the data converted into the internet digital signals are converged by the MCU module and forwarded to the user end equipment, so that the user end equipment receives the signals. The process reduces the requirement for prepositive determination of the signal received by the EoC terminal, and improves the application flexibility of the EoC terminal.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the description below are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 shows a schematic structural diagram of a multimode EoC terminal device according to an exemplary embodiment of the present application.
Fig. 2 is a schematic diagram illustrating an application scenario of a multimode EoC terminal device according to an exemplary embodiment of the present application.
Fig. 3 illustrates an application scenario diagram of a multimode EoC terminal device according to an exemplary embodiment of the present application.
The reference numbers in the drawings are as follows:
1-a power supply module, 2-an MCU module, 3-a high-frequency EoC module, 4-a low-frequency EoC module and 5-a radio frequency interface module;
11-a first power pack, 12-a second power pack, 13-a third power pack;
111-5V power supply, 112-1.5V power supply, 113-first 1.2V power supply, 114-first 3.3V power supply;
121-12V power supply, 122-second 1.2V power supply, 123-second 3.3V power supply;
131-1.8V power supply, 132-1.0V power supply, 133-third 3.3V power supply;
21-an output interface, 22-a central control chip, 23-a storage chip and 24-a fourth clock chip;
31-switch circuit, 32-PA chip, 33-first balun chip, 34-second balun chip, 35-high frequency radio frequency processing chip, 36-high frequency baseband chip, 37-phy chip, 38-first clock chip, 39-second clock chip;
41-a third balun chip, 42-a low-frequency radio frequency processing chip, 43-a low-frequency baseband chip and 44-a third clock chip;
51-mixer, 52-duplexer.
Detailed Description
To make the objects, technical solutions and advantages of the present application more clear, the following detailed description of the embodiments of the present application will be made with reference to the accompanying drawings.
Fig. 1 shows a schematic structural diagram of a multimode EoC terminal device according to an exemplary embodiment of the present application. Referring to fig. 1, the multimode EoC terminal device includes a power module 1, a Micro Control Unit (MCU) module, a high frequency EoC module 3, a low frequency EoC module 4, and a radio frequency interface module 5, the power module 1 is respectively connected to an MCU module 2, the high frequency EoC module 3, and the low frequency EoC module 4, the radio frequency interface module 5 and the MCU module 2 are respectively connected to the high frequency EoC module 3 and the low frequency EoC module 4, the power module 1 includes a first power pack 11, a second power pack 12, and a third power pack 13, the first power pack 11 is connected to the high frequency EoC module 3, the second power pack 12 is connected to the low frequency EoC module 4, and the third power pack 13 is connected to the MCU module 2, the radio frequency interface module 5 includes a mixer 51 and a duplexer 52, the mixer 51 and the duplexer 52 are in communication connection, the MCU module 2 includes at least one output interface 21, and the output interface 21 is used for outputting signals.
In this embodiment, the radio frequency interface module 5 is a signal receiving module, the MCU module 2 is a signal transmitting module, and the high frequency EoC module 3 and the low frequency EoC module 4 are both signal processing modules.
When a signal is inputted into the multi-mode EoC terminal device, the mixer 51 and the duplexer 52 in the radio frequency interface module 5 are connected to each other, and the mixer 51 separates the signal after the duplexer 52 receives the signal. In one example, the signal input to the radio frequency interface module 5 is a MIX RF signal, which is separated into an HF signal, i.e. a high frequency signal, and an LF signal, i.e. a low frequency signal, by the separation of the mixer 51, the high frequency signal being sent to the high frequency EoC module 3 for processing, and the low frequency signal being sent to the low frequency EoC module 4 for processing, respectively.
In the embodiment of the present application, the power module 1 is configured to supply power to other modules, and because voltages required by electrical components inside each module are different, the on-off power module 1 includes three power packs for correspondingly controlling the high-frequency EoC module 3, the low-frequency EoC module 4, and the MCU module 2. According to the distribution in the embodiment of the application, the high-frequency EoC module 3 corresponds to the first power supply group 11, the low-frequency EoC module 4 corresponds to the second power supply group 12, and the mcu module 2 corresponds to the third power supply group 13.
It should be noted that the multimode EoC terminal device described in the present application is implemented as an EoC terminal at a user side, and is implemented as a terminal device in communication connection with a user set top box and a network access device including a router.
In summary, in the method provided by the embodiment of the present application, in the multimode EoC terminal device, the terminal has the capability of simultaneously processing the high-frequency signal and the low-frequency signal by setting the high-frequency EoC module and the low-frequency EoC module. During the use process, the radio frequency interface module is used for separating and correspondingly sending signals, after the signals are processed, the data converted into the internet digital signals are gathered by the MCU module and forwarded to the user side equipment, and the user side equipment receives the signals through the arrangement of the distributed power supply group in the power supply module. The process reduces the requirement for prepositive determination of the signal received by the EoC terminal and improves the application flexibility of the EoC terminal.
Next, some alternative embodiments are provided, and an alternative implementation manner of each part in the multimode EoC terminal device related to the present application is described.
In an alternative embodiment, please refer to fig. 1, the high frequency EoC module 3 is implemented as a HINOC module. The HINOC module includes a switch circuit 31, a PA chip 32, a first balun chip 33, a second balun chip 34, a high-frequency rf processing chip 35, a high-frequency baseband chip 36, a phy chip 37, a first clock chip 38, and a second clock chip 39. The switch circuit 31 is connected to the mixer 51, the PA chip 32 and the first balun chip 33 are connected to the switch circuit 31, the high-frequency rf processing chip 35 is connected to the first balun chip 33, the second balun chip 34, the high-frequency baseband chip 36 and the first clock chip 38, respectively, and the high-frequency baseband chip 36 is connected to the first clock chip 38 and the phy chip 37. The phy chip 37 is connected to the second clock chip 39, and the phy chip 37 is connected to the MCU module 2.
Corresponding to the embodiment of the present application, the first power supply set 11 includes a 5V power supply 111, a 1.5V power supply 112111, a first 1.2V power supply 113, and a first 3.3V power supply 114, the 5V power supply 111 is connected to the PA chip 32, the 1.5V power supply 112111 and the first 1.2C power supply are connected to the high frequency rf processing chip 35, and the first 3.3V power supply 114 is connected to the baseband chip and the phy chip 37, respectively.
In the embodiment of the application, the high-frequency EoC module 3, which is implemented as a HINOC module, receives the separated high-frequency signals via the switch circuit 31. Optionally, the high frequency signal includes a reception signal and a signaling signal, the reception signal is an RX signal, the signaling signal is a TX signal, the high frequency EoC module 3 performs amplification processing through the PA chip 32 and performs impedance conversion preprocessing through the first balun chip 33, and performs impedance conversion preprocessing on the RX signal through the second balun chip 34. After the corresponding processing, the RX signal and the TX signal both enter the high frequency rf processing chip 35 for processing. In the embodiment of the present application, the high-frequency rf processing chip 35 and the baseband chip are connected to each other, and share the first clock chip 38 as a clock source. The processed signals enter the phy chip 37 through the RGMII bus, are finally converted into UTP signals, and are transmitted to the computer device.
It should be noted that, in the embodiment of the present application, the high-frequency radio frequency processing chip 35 is implemented as an YD6901 chip, the high-frequency baseband chip 36 is implemented as an YD6501 chip, and the phy chip 37 is implemented as an RTL8211F. The first power pack 11 includes a 5V power supply 111, a 1.5V power supply 112111, a first 1.2V power supply 113, and a first 3.3V power supply 114, corresponding to the actual power consumption requirements of the chip and the PA chip 32. And electrical connection relations are established between the chip and different chips.
In an alternative embodiment, the low frequency EoC module 4 is implemented as a homeplug av module. The homeplug av module includes a third balun chip 41, a low-frequency rf processing chip 42, a low-frequency baseband chip 43, and a third clock chip 44, the third balun chip 41 is connected to the mixer 51, the low-frequency rf processing chip 42 is connected to the third balun chip 41, the low-frequency baseband chip 43 is connected to the low-frequency rf processing chip 42, and the third clock chip 44 is connected to the low-frequency baseband chip 43.
In an alternative embodiment, the second power module 1 includes a 12V power supply 121, a second 1.2V power supply 122, and a second 3.3V power supply 123. The 12V power supply 121 is connected to the low-frequency RF processing chip 42, and the second 1.2V power supply 122 and the second 3.3V power supply 123 are respectively connected to the low-frequency baseband chip 43.
In the embodiment of the present application, the low-frequency EoC module 4 implemented as a homeplug av module also receives a low-frequency RX signal and a low-frequency TX signal during operation. The RX signal and the TX signal are pre-processed through impedance conversion by the balun chip, and after the TX signal is pre-processed, the TX signal enters the low frequency rf processing chip 42 separately, and after being processed, the RX signal and the RX signal enter the low frequency baseband chip 43 using the third clock chip 44 as a clock source together, and finally, the RX signal and the TX signal are realized in the form of an RGMII signal and enter the MCU module 2.
It should be noted that, in the embodiment of the present application, the model of the low-frequency rf processing chip 42 is MSEX23, and the model of the low-frequency baseband chip 43 is MSE510CE. Correspondingly, the second power module 1 includes a 12V power supply 121, a second 1.2V power supply 122, and a second 3.3V power supply 123, and is connected to the chip.
In an alternative embodiment, the MCU module 2 includes a central control chip 22, a memory chip 23 and a fourth clock chip 24. The central control chip 22 is connected with the high-frequency EoC module 3 and the low-frequency EoC module 4, the storage chip 23 is connected with the central control chip 22, the fourth clock chip 24 is connected with the storage chip 23, and the output interface 21 is connected with the central control chip 22.
In an alternative embodiment, the third power module 1 includes a 1.8V power 131, a 1.0V power 132, and a third 3.3V power 133. The 1.8V power supply 131 is connected with the memory chip 23 in a communication mode, and the 1.0V power supply 132 and the third 3.3V power supply 133 are connected with the central control chip 22.
In the embodiment of the present application, after the high frequency signal and the low frequency signal are processed and finally output to the MCU module 2, the MCU module 2 performs final signal conversion and output. Optionally, the MCU module 2 uses a fourth clock chip 24 as a clock source, and is provided with a memory chip 23, and at least two output interfaces 21. Optionally, the number of output interfaces 21 is 4.
In one example, the central control chip 22 in the MCU module 2 is an RTL8198 chip, and has functions of data aggregation, forwarding, and management chips. The memory chip 23 is implemented as a DDR2 chip, and the output interface 21 is an RJ45 network port. Correspondingly, the third power module 1 includes a 1.8V power 131, a 1.0V power 132 and a third 3.3V power 133 to fit different chips in the MCU module 2.
In an optional embodiment, the radio frequency interface module 5 further comprises a MIX RF interface.
Referring to fig. 2 and fig. 3, in an actual application scenario:
(1) As shown in fig. 2, the operator machine room outputs HF and LF signals simultaneously, the user-side multimode EoC terminal device receives, processes high and low frequency signals simultaneously and outputs internet access signals to the client, the MCU module 2 has a multiple-mode premise for the HINOC module and the homeplug av module transmission frequency, a multiple-frequency-point scanning mode is preset in the MCU module 2, the MCU module 2 controls the HINOC module through UTP, and the RGMII controls the homeplug av module to switch different working frequencies to actively adapt to the frequency points of the operator machine room devices.
(2) As shown in fig. 3, when the operator room only transmits a signal frequency HF or LF, and the MCU fails to scan and receive the transmission signal of the HINOC module or homeplug av module within a predetermined time, the corresponding 3.3V power supply is actively turned off, and the rescanning signal is turned on for a short time at a preset time interval to determine whether to turn on the corresponding power supply again, so as to finally achieve the purpose of high efficiency and dynamic energy saving.
The above description is only exemplary of the present application and should not be taken as limiting, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the protection scope of the present application.
Claims (8)
1. The multimode EoC terminal equipment is characterized by comprising a power supply module (1), a Micro Control Unit (MCU) module (2), a high-frequency EoC module (3), a low-frequency EoC module (4) and a radio frequency interface module (5);
the power supply module (1) is respectively connected with the MCU module (2), the high-frequency EoC module (3) and the low-frequency EoC module (4);
the radio frequency interface module (5) and the MCU module (2) are respectively connected with the high-frequency EoC module (3) and the low-frequency EoC module (4);
the power module (1) comprises a first power pack (11), a second power pack (12) and a third power pack (13), the first power pack (11) is connected with the high-frequency EoC module (3), the second power pack (12) is connected with the low-frequency EoC module (4), and the third power pack (13) is connected with the MCU module (2);
the radio frequency interface module (5) comprises a mixer (51) and a duplexer (52), the mixer (51) and the duplexer (52) are connected in a communication manner, and the duplexer (52) is used for receiving signals;
the MCU module (2) comprises at least one output interface (21), and the output interface (21) is used for outputting signals.
2. The multimode EoC terminal device according to claim 1, characterized in that said high-frequency EoC module (3) is implemented as a HINOC module;
the HINOC comprises a switch circuit (31), a PA chip (32), a first balun chip (33), a second balun chip (34), a high-frequency radio frequency processing chip (35), a high-frequency baseband chip (36), a phy chip (37), a first clock chip (38) and a second clock chip (39);
the switch circuit (31) is connected to the mixer (51);
the PA chip (32) and the first balun chip (33) are connected with the switch circuit (31);
the high-frequency radio frequency processing chip (35) is respectively connected with the first balun chip (33), the second balun chip (34), the high-frequency baseband chip (36) and the first clock chip (38);
the high-frequency baseband chip (36) is connected with the first clock chip (38) and the phy chip (37);
the phy chip (37) is connected with the second clock chip (39), and the phy chip (37) is connected with the MCU module (2).
3. A multi-mode EoC terminal device according to claim 2, characterized in that said first power supply group (11) comprises a 5V power supply (111), a 1.5V power supply (112), a first 1.2V power supply (113) and a first 3.3V power supply (114);
the 5V power supply (111) is connected with the PA chip (32);
the 1.5V power supply (112) and the first 1.2V power supply (113) are connected with the high-frequency radio frequency processing chip (35);
the first 3.3V power supply (114) is respectively connected with the baseband chip (36) and the phy chip.
4. Multimode EoC terminal device according to claim 1, characterized in that said low-frequency EoC module (4) is implemented as a homeplug av module;
the Homeplug AV module comprises a third balun chip (41), a low-frequency radio frequency processing chip (42), a low-frequency baseband chip (43) and a third clock chip (44);
the third balun chip (41) is connected with the mixer (51);
the low-frequency radio frequency processing chip (42) is connected with the third balun chip (41);
the low-frequency baseband chip (43) is connected with the low-frequency radio frequency processing chip (42);
the third clock chip (44) is connected with the low-frequency baseband chip (43).
5. The multimode EoC terminal device according to claim 4, characterized in that said second power supply group (12) comprises a 12V power supply (121), a second 1.2V power supply (122) and a second 3.3V power supply (123);
the 12V power supply (121) is connected with the low-frequency radio frequency processing chip (42);
the second 1.2V power supply (122) and the second 3.3V power supply (123) are respectively connected with the low-frequency baseband chip (43).
6. The multimode EoC terminal device according to claim 1, characterized in that said MCU module (2) comprises a central control chip (22), a memory chip (23) and a fourth clock chip (24);
the central control chip (22) is connected with the high-frequency EoC module (3) and the low-frequency EoC module (4);
the storage chip (23) is connected with the central control chip (22);
the fourth clock chip (24) is connected with the memory chip (23);
the output interface (21) is connected with the central control chip (22).
7. The multimode EoC terminal device according to claim 6, characterized in that said third power supply group (13) comprises a 1.8V power supply (131), a 1.0V power supply (132) and a third 3.3V power supply (133);
the 1.8V power supply (131) is in communication connection with the memory chip (23);
the 1.0V power supply (132) and the third 3.3V power supply (133) are connected with the central control chip (22).
8. The multi-mode EoC terminal device of claim 1, wherein said radio frequency interface module further comprises a MIX RF interface.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202221643464.0U CN217935612U (en) | 2022-06-29 | 2022-06-29 | Multimode EoC terminal equipment |
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| CN202221643464.0U CN217935612U (en) | 2022-06-29 | 2022-06-29 | Multimode EoC terminal equipment |
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