CN112463660B - Multifunctional real-time interaction system based on CPCI bus - Google Patents
Multifunctional real-time interaction system based on CPCI bus Download PDFInfo
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Abstract
The invention provides a multifunctional real-time interaction system based on CPCI bus, belonging to the technical field of signal processing, comprising a communication protocol/level standard expansion module, a non-standard level signal expansion module, an FPGA and a CPCI bus interface; the FPGA is connected with the communication protocol/level standard expansion module and the non-standard level signal expansion module and is used for transmitting standard data signals and non-standard level signals; and the FPGA establishes data interaction between the communication protocol/level standard expansion module and the nonstandard level signal expansion module and the CPCI bus case according to function setting parameters provided by the CPCI bus interface. The invention can connect a plurality of modules needed by the simulation system through the communication protocol/level standard expansion module and the non-standard level signal expansion module, and only occupies one slot of the CPCI bus chassis, thereby greatly saving the slot of the CPCI bus chassis and being convenient for expanding more functions in simulation.
Description
Technical Field
The invention belongs to the technical field of signal processing, and particularly relates to a multifunctional real-time interaction system based on a CPCI bus.
Background
In the simulation system, data and signals interact with information among a plurality of other devices in real time in a main control device of a CPCI bus (Compact Peripheral Component Interconnect, compact peripheral component interconnect standard), and the communication protocols and level standards supported by the other devices are different. In order to meet the real-time requirement, a main control device is inserted into a CPCI bus chassis, and a plurality of modules are configured according to the communication protocol and signal level standard of other devices, and each module also needs to support CPCI bus and be inserted into the chassis.
Because the slots of the CPCI bus chassis are limited, if the slots in the CPCI bus chassis are occupied by the modules too much, more modules cannot be inserted into the CPCI bus chassis, and other functions cannot be expanded.
Disclosure of Invention
The invention aims to provide a multifunctional real-time interaction system based on a CPCI bus, which aims to solve the problem that more modules cannot be inserted into a CPCI bus case and other functions cannot be expanded due to the fact that the slot positions of the CPCI bus case are limited.
In order to achieve the above purpose, the invention adopts the following technical scheme: a CPCI bus-based multifunctional real-time interactive system, comprising:
the communication protocol/level standard expansion module is used for transmitting standard data signals; the standard data signal comprises: a communication signal or a standard level signal;
The non-standard level signal expansion module is used for transmitting a non-standard level signal;
The FPGA (Field Programmable GATE ARRAY ) is connected with the communication protocol/level standard expansion module and the nonstandard level signal expansion module and is used for transmitting the standard data signals and the nonstandard level signals;
CPCI bus interface, connect with said FPGA and CPCI bus chassis separately, is used for transmitting the function setting parameter in the application program to the said FPGA;
And the FPGA determines the standard data signal according to the function setting parameters, and establishes data interaction between the communication protocol/level standard expansion module and the nonstandard level signal expansion module and the CPCI bus chassis.
As another embodiment of the present application, the communication protocol/level standard expansion module includes:
the first interface chip is used for transmitting an RS422 protocol signal or an RS422 level signal;
the second interface chip is used for transmitting LVDS protocol signals or LVDS level signals;
the communication signals comprise RS422 protocol signals and LVDS protocol signals; the standard level signals include an RS422 level signal and an LVDS level signal.
As another embodiment of the present application, the first interface chip is MAX14856; the second interface chip is DS90C387.
As another embodiment of the present application, the non-standard level signal expansion module includes:
the OC gate circuit chip is used for outputting a non-standard level signal;
The optical coupler circuit chip is used for receiving the nonstandard level signal;
and the Schmitt trigger is connected with the optocoupler circuit chip and used for shaping the nonstandard level signal and then transmitting the nonstandard level signal to the FPGA.
As another embodiment of the present application, the OC gate chip is MIC4423; the optocoupler circuit chip is TLP2768A; the schmitt trigger is 54LS14.
As another embodiment of the present application, the CPCI bus interface includes:
A memory for storing initialization configuration information;
And the third interface chip is respectively connected with the memory and the CPCI bus and is used for establishing data interaction with the CPCI bus according to the initialization configuration information.
As another embodiment of the application, the reservoir is 93C66B-I/P; the third interface chip is PLX9054.
As another embodiment of the present application, further comprising: and the power supply module is connected with the FPGA and used for providing power supply for the FPGA.
As another embodiment of the present application, further comprising:
and the Flash chip is connected with the FPGA and used for storing a logic program.
The multifunctional real-time interaction system based on the CPCI bus has the beneficial effects that: compared with the prior art, the invention can be externally connected with a plurality of modules required by a simulation system through the communication protocol/level standard expansion module and the non-standard level signal expansion module, and only occupies one slot of the CPCI bus chassis, thereby greatly saving the slot of the CPCI bus chassis and being convenient for expanding more functions in simulation. The invention realizes the modular scheme of information real-time interaction of various communication protocols and various level signals based on CPCI bus and FPGA logic, and has the characteristics of modularization, easy realization and high openness. The system is suitable for the scene that a user needs to control and access multiprotocol and multi-level standard signals in real time through application programs, and can meet the requirement of a simulation system on real-time performance.
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In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments or the description of the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a multifunctional real-time interaction system based on CPCI bus according to an embodiment of the present invention;
Fig. 2 is a schematic structural diagram of a CPCI bus-based multifunctional real-time interaction system according to an embodiment of the present invention;
fig. 3 is a logic flow diagram of a CPCI bus-based multifunctional real-time interaction system according to an embodiment of the present invention.
In the figure: 1. a communication protocol/level standard expansion module; 2. a non-standard level signal expansion module; 3. an FPGA; 4. CPCI bus interface.
Detailed Description
In order to make the technical problems, technical schemes and beneficial effects to be solved more clear, the invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Referring to fig. 1, a description will be given of a multifunctional real-time interactive system based on CPCI bus according to the present invention.
The multifunctional real-time interaction system based on the CPCI bus comprises a communication protocol/level standard expansion module 1, a non-standard level signal expansion module 2, an FPGA3 and a CPCI bus interface 4. The communication protocol/level standard expansion module 1 is used for transmitting standard data signals; the standard data signal includes: a communication signal or a standard level signal;
A non-standard level signal expansion module 2 for transmitting a non-standard level signal; the FPGA3 is connected with the communication protocol/level standard expansion module 1 and the non-standard level signal expansion module 2 and is used for transmitting standard data signals and non-standard level signals; CPCI bus interface 4 is connected with FPGA3 and CPCI bus chassis respectively, is used for transmitting the function setting parameter in the application program to FPGA 3.
The FPGA3 determines standard data signals according to the function setting parameters, and establishes data interaction between the communication protocol/level standard expansion module 1 and the nonstandard level signal expansion module 2 and the CPCI bus chassis.
The invention can be externally connected with a plurality of modules required by simulation through the communication protocol/level standard expansion module 1 and the non-standard level signal expansion module 2, thereby being convenient for expanding more functions during simulation.
Compared with the prior art, the multifunctional real-time interaction system based on the CPCI bus can support transmission of standard data signals and transmission of non-standard level signals, only occupies one slot of the CPCI bus case, saves the slot position of the CPCI bus case, is convenient for expanding other functions, and reduces equipment cost.
As an embodiment of the present invention, please refer to fig. 2. The communication protocol/level standard expansion module 1 in this embodiment includes: a first interface chip and a second interface chip. The first interface chip is used for transmitting an RS422 protocol signal or an RS422 level signal; the second interface chip is used for transmitting LVDS protocol signals or LVDS level signals; the communication signals comprise RS422 protocol signals and LVDS protocol signals; the standard level signals include an RS422 level signal and an LVDS level signal.
The RS422 communication protocol and the LVDS protocol are realized based on the internal logic of the FPGA3 and 422 level chips and LVDS level chips on the modules, and then the transmission of data among different protocols can be realized through the logic of the FPGA3, so that the communication among multiple devices is realized; if the two nonstandard protocols are needed to be realized, only the internal logic of the FPGA3 needs to be changed. The implementation greatly improves the functional compatibility of the module and reduces the design cost of the module. Meanwhile, the 422 level chip and the LVDS level chip can be used for receiving/transmitting the level, realizing signal interaction of different level standards among a plurality of devices and establishing signal interconnection channels among the plurality of devices.
The first interface chip model is MAX14856; the second interface chip model is DS90C387.MAX14856 is an interface chip meeting RS422 electrical specification, and realizes data and signal transmission/reception with FPGA 3; DS90C387 is an interface chip conforming to LVDS standard, and realizes transmission/reception of data and signals with FPGA 3.
As a specific implementation manner of the embodiment of the present invention, the non-standard level signal expansion module 2 includes: an OC gate chip and an OC gate chip. The OC gate circuit chip is used for outputting a non-standard level signal; the OC gate circuit chip is used for receiving the nonstandard level signal; the Schmitt trigger is connected with the optocoupler circuit chip and used for shaping the nonstandard level signal and then sending the nonstandard level signal to the FPGA3. The model of the OC gate circuit chip is preferably MIC4423; the model of the optical coupler circuit chip is preferably TLP2768A; the schmitt trigger model is preferably 54LS14.MIC4423 is an OC gate circuit chip, and the output current of the chip is up to 3A, so that the chip can drive a high-power load and can be connected with various voltages to realize the output of non-standard level signals; TLP2768A is an optical coupling circuit chip, can be connected with various voltages to receive nonstandard level signals, and the received signals are sent to FPGA3 after being shaped by a Schmitt trigger (54 LS 14). The OC gate circuit can expand the signal output of the nonstandard level, the optical coupler receiving circuit can receive the signal of the nonstandard level, the invention widens the level variety of sending/receiving by utilizing the OC gate circuit and the optical coupler receiving circuit, is compatible with more level signals, and improves the functionality and the universality of the module.
As a specific implementation of the embodiment of the present invention, the CPCI bus interface 4 includes: a memory and a third interface chip; a memory for storing initialization configuration information; and the third interface chip is respectively connected with the memory and the CPCI bus and is used for establishing data interaction with the CPCI bus according to the initialization configuration information. The type of the storage is preferably 93C66B-I/P; the third interface chip model is preferably PLX9054. The CPCI bus interface 4 is implemented using a PLX9054 chip and 93C66B-I/P (EEROM). The invention adopts the PLX chip and the EEROM memory to realize the 32-bit CPCI bus protocol, can process the complex CPCI protocol by the PLX chip, separate the logic of the CPCI bus protocol into PCI end logic and user end logic, and the user only needs to pay attention to the user end logic, thereby reducing the design work of the user and improving the design efficiency.
The PLX9054 chip carries out carding on complex CPCI protocol time sequences and converts the complex CPCI protocol time sequences into a local bus which is easy to operate by a user, and the PLX9054 is used as slave equipment of the CPCI bus and is used as host equipment of the local bus, so that an information path is established between the CPCI bus and the FPGA 3; the EEROM is used for the initialization configuration of PLX9054, and the main initialization configuration information includes PCI configuration registers (manufacturer ID number, device ID number, class subsystem 1D number and subsystem manufacturer ID number), local configuration registers (local address space attribute and local address bus attribute), power management registers, hot plug registers and VPD registers, and specific configuration calculation can refer to the instruction manual of PLX 9054.
The sending/receiving of various level signals is controlled by the on-board FPGA, and the on-board FPGA receives the control instruction sent by the CPCI bus to realize the control of the signals. In the invention, the FPGA model is preferably Xilinx XC7K70T-2FBG676I. The FPGA is used for transmitting data and control instructions between the CPCI bus and other protocols in real time and interacting with signals of various level standards in real time, so that a user can access and control other protocols and signals through an application program. Because the FPGA (Xilinx XC7K70T-2FBG 676I) is manufactured based on the SRAM technology, a Flash chip is needed to be connected with the FPGA for storing a logic program. The model of the plug-in Flash chip is preferably N25Q128A23ESE40.
As a specific implementation manner of the embodiment of the present invention, the method further includes: and the power supply module is connected with the FPGA and used for providing power supply for the FPGA. Because FPGA (Xilinx XC7K70T-2FBG 676I) has a requirement on power-on time sequence, the power module is preferably a chip with an output time sequence management function. A power module of model LTM4644IY is preferred in the present invention. The logic program in the invention can be downloaded to Flash (N25Q 128A23ESE 40) through a programming port P1, and the FPGA (Xilinx XC7K70T-2FBG 676I) reads the logic program from Flash (N25Q 128A23ESE 40) through an SPI bus after power is on, so that the function configuration of the FPGA3 is realized.
The modular structure of the multifunctional real-time interaction system based on the CPCI bus is a standard 3U European standard card, and the modular structure conforms to IEC 60297-3, IEC 60297-4 and IEEE 1101.10 standards, has the external dimension of 100 x 160mm and can be plugged in and pulled out of a CPCI bus chassis. The computer sends data and control instructions to the on-board FPGA3 of the module through the CPCI bus according to the requirements of the application program, so as to realize the configuration use of multiple protocols and the control of multi-level standard signals; the on-board FPGA3 also transmits back data and the like through the CPCI bus, establishes a real-time interaction channel between the CPCI protocol and other protocols, CPCI protocols and standard signals with different levels, and further realizes communication between application programs and modules.
In addition, XP1 (J29A-37 ZKWP 4), XP2 (J30J-37 TJWP) and XP3 (J29A-37 TJWP 4) are used as the interfaces of input/output data and signals of the multifunctional real-time interactive system based on CPCI bus. Data signals are input/output from the three interfaces respectively, so that the interference of functions among the modules can be reduced. The invention also adopts a standard CPCI compression joint part J1 (AMP-352068-1) for connecting the multifunctional real-time interaction system based on the CPCI bus with the CPCI bus.
As a specific implementation manner of the embodiment of the present invention, referring to fig. 3, the fpga3 logic is composed of a system initialization module, a CPCI bus module, a function selection module, a communication configuration module, a communication module, and a signal interaction module. After the multifunctional real-time interactive system based on the CPCI bus is powered on, the system initialization module is responsible for carrying out parameter initialization configuration on the multifunctional real-time interactive system based on the CPCI bus, then the CPCI bus module transmits function setting parameters in an application program to the FPGA3, and the function selection module determines whether an RS422 chip and an LVDS chip in the module carry out communication functions or signal interaction functions according to the setting parameters transmitted by the CPCI bus module. If the communication function is the communication function, the communication protocol configuration is carried out, then the data transmission and the signal interaction are carried out with the CPCI bus, and the access control of the RS422 protocol, the LVDS protocol and other level standard signals in the application program is realized. The module is controlled to be closed at the same time of CPCI bus data interaction, if the module is not closed, the module continuously carries out data interaction and signal interaction with CPCI bus data, and if the module is closed, the module is ended; if the communication function is not realized, the RS422 chip and the LVDS chip in the module perform the signal interaction function, then start to perform signal interaction with CPCI bus data, realize the access control of the application program on RS422 level signals, LVDS level signals and other level standard signals, and simultaneously control the closing of the module through CPCI bus data interaction, if the module is not closed, the module continuously performs data transmission, signal interaction and CPCI bus data interaction, and if the module is closed, the process is ended.
The invention discloses a CPCI bus-based multifunctional real-time interaction system, which is designed based on a CPCI standard board card, wherein supported communication protocols comprise an RS422 protocol and an LVDS protocol, supported level standards comprise a TTL level, a 422 level and an LVDS level, and simultaneously, more different level standard signals can be supported by an OC gate circuit and an optical coupler receiving circuit in an extensible manner, only one slot of a CPCI bus case is occupied, the slot of the CPCI bus case is greatly saved, and the real-time data transmission among various communication protocols and the real-time signal interaction of different level standards are realized.
The module design scheme for realizing the real-time information interaction of various communication protocols and various level standard signals based on CPCI bus and FPGA logic has the characteristics of modularization, easy realization and high openness. The system is suitable for the scene that a user needs to control and access multiprotocol and multi-level standard signals in real time through application programs, and can meet the requirement of a simulation system on real-time performance.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the invention.
Claims (6)
1. A CPCI bus-based multifunctional real-time interactive system, comprising:
the communication protocol/level standard expansion module is used for transmitting standard data signals; the standard data signal comprises: a communication signal or a standard level signal;
The non-standard level signal expansion module is used for transmitting a non-standard level signal;
the FPGA is connected with the communication protocol/level standard expansion module and the nonstandard level signal expansion module and is used for transmitting the standard data signals and the nonstandard level signals;
CPCI bus interface, connect with said FPGA and CPCI bus chassis separately, is used for transmitting the function setting parameter in the application program to the said FPGA;
The FPGA determines the standard data signal according to the function setting parameters, and establishes data interaction between a communication protocol/level standard expansion module and a non-standard level signal expansion module and the CPCI bus chassis;
The communication protocol/level standard expansion module comprises:
the first interface chip is used for transmitting an RS422 protocol signal or an RS422 level signal;
the second interface chip is used for transmitting LVDS protocol signals or LVDS level signals;
The communication signals comprise RS422 protocol signals and LVDS protocol signals; the standard level signal comprises an RS422 level signal and an LVDS level signal;
the first interface chip is MAX14856; the second interface chip is DS90C387;
The non-standard level signal expansion module comprises:
the OC gate circuit chip is used for outputting a non-standard level signal;
The optical coupler circuit chip is used for receiving the nonstandard level signal;
and the Schmitt trigger is connected with the optocoupler circuit chip and used for shaping the nonstandard level signal and then transmitting the nonstandard level signal to the FPGA.
2. The CPCI bus-based multifunctional real-time interactive system according to claim 1, wherein the OC gate chip is MIC4423; the optocoupler circuit chip is TLP2768A; the schmitt trigger is 54LS14.
3. The CPCI bus-based multifunctional real-time interactive system according to claim 1, wherein the CPCI bus interface comprises:
A memory for storing initialization configuration information;
And the third interface chip is respectively connected with the memory and the CPCI bus and is used for establishing data interaction with the CPCI bus according to the initialization configuration information.
4. The CPCI bus-based multifunctional real-time interactive system according to claim 3, wherein the memory is 93C66B-I/P; the third interface chip is PLX9054.
5. The CPCI bus-based multifunctional real-time interactive system according to claim 1, further comprising: and the power supply module is connected with the FPGA and used for providing power supply for the FPGA.
6. The CPCI bus-based multifunctional real-time interactive system according to claim 1, further comprising:
and the Flash chip is connected with the FPGA and used for storing a logic program.
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