CN210111019U - Novel double-ridge integrated substrate gap waveguide - Google Patents
Novel double-ridge integrated substrate gap waveguide Download PDFInfo
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- CN210111019U CN210111019U CN201921105503.XU CN201921105503U CN210111019U CN 210111019 U CN210111019 U CN 210111019U CN 201921105503 U CN201921105503 U CN 201921105503U CN 210111019 U CN210111019 U CN 210111019U
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Abstract
The utility model discloses a novel double-ridge integrated substrate gap waveguide, which comprises an upper dielectric plate, a lower dielectric plate and a spacing dielectric plate; the upper surface of the upper dielectric plate is printed with a first grounding metal layer, the lower surface of the upper dielectric plate is printed with a first microstrip line, the first microstrip line is provided with first metal via holes which are periodically arranged, the two sides of the first microstrip line are printed with first metal patches which are periodically arranged, each first metal patch is provided with a second metal via hole, and each second metal patch is provided with a second metal via hole; the lower surface of the lower-layer dielectric plate is printed with a second grounding metal layer, and the structure of the upper surface of the lower-layer dielectric plate is consistent with that of the lower surface of the upper-layer dielectric plate. The utility model discloses can realize the electromagnetic wave of lower loss and gating TEM mode.
Description
Technical Field
The utility model relates to a waveguide technical field especially relates to a novel integrated substrate clearance waveguide of two spines.
Background
The rectangular waveguide and the microstrip line circuit are devices commonly used for transmitting electromagnetic waves, the rectangular waveguide has low loss, the microstrip line circuit is cheap and simple to manufacture, and has high flexibility, so that the microstrip line circuit is widely applied to a communication system. However, both the rectangular waveguide and the microstrip line circuit are only suitable for the microwave frequency band, and in the millimeter wave frequency band, the rectangular waveguide has a problem of complicated manufacture, and the microstrip line circuit has a problem of high loss, so that a new transmission circuit needs to be sought and applied to the design of the millimeter wave frequency band.
In order to seek better development in the high frequency field, planar waveguides have been developed, and the concept of Substrate Integrated Waveguide (SIW) has been proposed. The Substrate Integrated Waveguide (SIW) provides a better solution to the above problems, and adopts a Printed Circuit Board (PCB) technology, a hollow rectangular Waveguide is fabricated on a dielectric plate, two rows of metal via arrays are used to replace the side walls of the rectangular Waveguide, and the upper and lower surfaces of the dielectric plate are covered with metal to form the upper and lower walls, so that the rectangular Waveguide is also reduced in size. However, substrate integrated waveguides still suffer from dielectric loss, performance degradation with increasing frequency, and metal vias are expensive to manufacture.
In 2009, the scholars of Per-Simon et al proposed a gap waveguide (gap waveguide, GW) more suitable for high frequency, the gap waveguide is composed of two conductive structures of a PEC (ideal electrical conductor) layer and a PEC/PMC (ideal magnetic conductor) layer, the two conductive structures are separated by a gap (which may also be filled with a dielectric medium) with a wavelength less than 1/4, the high impedance PMC structure of the PEC/PMC layer surrounds a metal ridge, only electromagnetic waves in a quasi-TEM mode can propagate in the air gap along the metal ridge, and waves in other modes and other directions are forbidden. The greatest advantage of gap waveguides is low loss and no electrical connections are required. To meet the requirement of miniaturization, microstrip gap waveguides have been proposed in 2012. The gap waveguide designed hereafter uses air as the gap, until 2016, the scholars of Zhang Jing et al propose to replace the air gap with a dielectric plate and to coat a layer of metal as PEC layer on the upper surface of the gap layer dielectric plate, and propose the substrate integrated gap waveguide technology, i.e. substrate integrated gap waveguide, which realizes more stable gap height and simpler manufacture.
In 2018, Nima Bayalt-Makou et al propose a double-ridge PRGW structure, which improves a PEC + (PEC + PMC) structure in a gap waveguide into (PEC + PMC) + (PEC + PMC), so that edge radiation on two sides of transmission is reduced, and loss is reduced. But the interstitial layer is still an air gap and there is instability.
SUMMERY OF THE UTILITY MODEL
The utility model discloses the technical problem of main solution provides a novel two spine integrated substrate clearance waveguides, can realize the electromagnetic wave of lower loss and gating TEM mode.
In order to solve the technical problem, the utility model discloses a technical scheme be: the novel double-ridge integrated substrate gap waveguide comprises an upper dielectric plate (1), a lower dielectric plate (3) and a spacing dielectric plate (2) arranged between the upper dielectric plate (1) and the lower dielectric plate (3); a first grounding metal layer (11) is printed on the upper surface of the upper-layer dielectric slab (1), a first microstrip line (12) is printed on the lower surface of the upper-layer dielectric slab (1), first metal through holes (121) which are periodically arranged are arranged on the first microstrip line (12), first metal patches (13) which are periodically arranged are printed on two sides of the first microstrip line (12), and a second metal through hole (131) is arranged on each first metal patch (13); a second grounding metal layer (31) is printed on the lower surface of the lower-layer dielectric plate (3), a second microstrip line (32) is printed on the upper surface of the lower-layer dielectric plate (3), third metal via holes (321) are formed in the second microstrip line (32), second metal patches (33) which are periodically arranged are printed on two sides of the second microstrip line (32), and a fourth metal via hole (331) is formed in each second metal patch (33); the upper-layer dielectric plate (1), the spacing dielectric plate (2) and the lower-layer dielectric plate (3) are bonded together or fixed together through screws.
Preferably, the first microstrip line (12) and the second microstrip line (32) have the same size and are aligned up and down.
Preferably, the first microstrip line (12) and the second microstrip line (32) are in a straight line or a curve which is bent once or for multiple times, and when the first microstrip line (12) and the second microstrip line (32) are in a curve, an inner corner and an outer corner of the curve need to be subjected to corner cutting, and the corner cutting is an arc-shaped corner cutting or a straight corner cutting.
Preferably, the first metal patch (13) and the second metal patch (33) have the same size and the same arrangement period.
Preferably, the first metal patch (13) and the second metal patch (33) are circular patches, square patches or triangular patches.
Preferably, the first metal via (121) and the third metal via (321) have the same size and the same arrangement period.
Preferably, the second metal via (131) and the fourth metal via (331) have the same size and the same arrangement period.
Preferably, the size of the first metal via (121) is smaller than the size of the second metal via (131).
Preferably, the upper dielectric plate (1) and the lower dielectric plate (3) are made of dielectric materials with a dielectric constant of 3.48 and a loss tangent of 0.004, and the spacing dielectric plate (2) is made of dielectric materials with a dielectric constant of 2.2 and a loss tangent of 0.0009.
Preferably, the length and the width of the upper dielectric plate (1), the spacing dielectric plate (2) and the lower dielectric plate (3) are the same.
Be different from prior art's condition, the beneficial effects of the utility model are that: by adopting the three-layer dielectric plate, wherein the upper surface of the upper dielectric plate is printed with the grounding metal layer, the lower surface is printed with the microstrip line, the outer side and the inner side of the microstrip line are both printed with the rectangular metal patches which are periodically arranged, the rectangular metal patches and the coupling microstrip line are provided with the circular metal via holes, the lower surface of the lower dielectric plate is printed with the grounding metal layer, the structure of the upper surface is consistent with that of the lower surface of the upper dielectric plate, the upper dielectric plate and the lower dielectric plate are separated by the spacing dielectric plate, and by the adoption of the mode, lower loss and electromagnetic waves in a gating TEM mode can be realized.
Drawings
Fig. 1 is a schematic structural diagram of a novel dual-ridge integrated substrate gap waveguide according to an embodiment of the present invention.
Fig. 2 is a schematic top view of the upper dielectric slab of the novel dual-ridge integrated substrate-gap waveguide shown in fig. 1.
Fig. 3 is a schematic bottom view of the upper dielectric slab of the novel dual-ridge integrated substrate-gap waveguide shown in fig. 1.
Fig. 4 is a top view of the lower dielectric slab of the novel dual-ridge integrated substrate-gap waveguide of fig. 1.
Fig. 5 is a schematic bottom view of the lower dielectric slab of the novel dual-ridge integrated substrate-gap waveguide shown in fig. 1.
Fig. 6 is a graph of the simulation results of the S-parameters of the novel dual-ridge integrated substrate-gap waveguide shown in fig. 1.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Referring to fig. 1 to 5, the novel double-ridge integrated substrate gap waveguide of the embodiment of the present invention includes an upper dielectric plate 1, a lower dielectric plate 3, and a spacing dielectric plate 2 disposed between the upper dielectric plate 1 and the lower dielectric plate 3.
The upper surface of the upper dielectric plate 1 is printed with a first grounding metal layer 11, the lower surface of the upper dielectric plate 1 is printed with a first microstrip line 12, the first microstrip line 12 is provided with first circular metal via holes 121 which are periodically arranged, the two sides of the first microstrip line 12 are printed with first metal patches 13 which are periodically arranged, and each first metal patch 13 is provided with a second metal via hole 131.
The lower surface of the lower dielectric plate 3 is printed with a second grounding metal layer 31, the upper surface of the lower dielectric plate 3 is printed with a second microstrip line 32, the second microstrip line 32 is provided with a third metal via hole 321, two sides of the second microstrip line 32 are printed with second metal patches 33 arranged periodically, and each second metal patch 33 is provided with a fourth metal via hole 331.
The first metal via 121 and the second metal via 131 both penetrate through the upper dielectric plate 1 and are connected to the first ground metal layer 11, and the third metal via 321 and the fourth metal via 331 both penetrate through the lower dielectric plate 3 and are connected to the second ground metal layer 31.
The spacing dielectric plate 2 is used for separating the upper dielectric plate 1 and the lower dielectric plate 3, so that a gap is formed between the upper dielectric plate 1 and the lower dielectric plate 3. The upper dielectric plate 1, the lower dielectric plate 3 and the spacing dielectric plate 2 are bonded together or fixed together by screws.
Each first metal patch 13 and the second metal via hole 131 thereon form a first mushroom-shaped EBG structure, and the first mushroom-shaped EBG structures arranged periodically are distributed on two sides of the first microstrip line 12; each second metal patch 33 and the fourth metal via 331 thereon form a second mushroom-type EBG structure, and the second mushroom-type EBG structures arranged periodically are distributed on two sides of the second microstrip line 32. Thus, mushroom-type EBG structures are formed on both the upper dielectric plate 1 and the lower dielectric plate 3 in a periodic arrangement.
The upper dielectric plate 1 is used as a via layer of the novel double-ridge integrated substrate gap waveguide, and the first microstrip line 12 and the first circular metal via hole 121 form a first conductive ridge; the lower dielectric plate 3 is also used as a via layer of the novel double-ridge integrated substrate gap waveguide, and the second microstrip line 32 and the third metal via hole 321 form a second conductive ridge; the spacing medium plate 2 is a novel spacing layer of a double-ridge integrated substrate spacing waveguide medium; the first conducting ridge and the second conducting ridge realize the transmission function of the novel double-ridge integrated substrate gap waveguide through the gap layer.
In the present embodiment, the first microstrip line 12 and the second microstrip line 32 have the same size and are aligned up and down, the first microstrip line 12 and the second microstrip line 32 may be a straight line or a curve that is bent once or many times, such as a wavy line, and when the first microstrip line 12 and the second microstrip line 32 are curved, an inner corner and an outer corner of the curve are chamfered, and the chamfer is an arc chamfer or a straight chamfer. The first metal patch 13 and the second metal patch 33 have the same size and the same arrangement period, and the first metal patch 13 and the second metal patch 33 may be circular, square, triangular or other patches. The first metal via 121 and the third metal via 321 have the same size and the same arrangement period, the second metal via 131 and the fourth metal via 331 have the same size and the same arrangement period, and the size of the first metal via 121 is smaller than that of the second metal via 131. The first and third metal vias 121 and 321 are arranged along the center lines of the first and second microstrip lines 12 and 32, respectively.
To illustrate the novel dual-ridge integrated substrate-gap waveguide of the present embodiment in detail, a specific example is given below. In this specific example, a dielectric material having a dielectric constant of 3.48 and a loss tangent of 0.004 is used for each of the upper dielectric plate 1 and the lower dielectric plate 3, and a dielectric material having a dielectric constant of 2.2 and a loss tangent of 0.0009 is used for the spacer dielectric plate 2. The length and the width of the upper dielectric plate 1, the spacing dielectric plate 2 and the lower dielectric plate 3 are the same. Through simulation and testing, it can be seen from the simulation result of the S11 parameter in fig. 6 that the return loss below-15 dB can be realized in the 20GHz-35GHz band, and from the simulation result of the S12 parameter, the loss is less than 0.3dB in the 20GHz-35GHz band. Where S11 denotes return loss and S12 denotes isolation.
The above only is the embodiment of the present invention, not limiting the patent scope of the present invention, all the equivalent structures or equivalent processes that are used in the specification and the attached drawings or directly or indirectly applied to other related technical fields are included in the patent protection scope of the present invention.
Claims (10)
1. A novel double-ridge integrated substrate gap waveguide is characterized by comprising an upper dielectric plate (1), a lower dielectric plate (3) and a spacing dielectric plate (2) arranged between the upper dielectric plate (1) and the lower dielectric plate (3);
a first grounding metal layer (11) is printed on the upper surface of the upper-layer dielectric slab (1), a first microstrip line (12) is printed on the lower surface of the upper-layer dielectric slab (1), first metal through holes (121) which are periodically arranged are arranged on the first microstrip line (12), first metal patches (13) which are periodically arranged are printed on two sides of the first microstrip line (12), and a second metal through hole (131) is arranged on each first metal patch (13);
a second grounding metal layer (31) is printed on the lower surface of the lower-layer dielectric plate (3), a second microstrip line (32) is printed on the upper surface of the lower-layer dielectric plate (3), third metal via holes (321) are formed in the second microstrip line (32), second metal patches (33) which are periodically arranged are printed on two sides of the second microstrip line (32), and a fourth metal via hole (331) is formed in each second metal patch (33);
the upper-layer dielectric plate (1), the spacing dielectric plate (2) and the lower-layer dielectric plate (3) are bonded together or fixed together through screws.
2. The novel double-ridge integrated substrate gap waveguide according to claim 1, characterized in that the first microstrip line (12) and the second microstrip line (32) are the same size and are aligned up and down.
3. The novel double-ridge integrated substrate gap waveguide according to claim 2, wherein the first microstrip line (12) and the second microstrip line (32) are in a straight line or a curve that is bent once or many times, and when the first microstrip line (12) and the second microstrip line (32) are in a curve, an inner corner and an outer corner of the curve are subjected to corner cutting, and the corner cutting is a circular arc corner cutting or a straight corner cutting.
4. The novel double-ridge integrated substrate gap waveguide as claimed in claim 1, wherein the first metal patch (13) and the second metal patch (33) have the same size and the same arrangement period.
5. The novel double-ridge integrated substrate gap waveguide according to claim 1 or 4, wherein the first metal patch (13) and the second metal patch (33) are circular, square or triangular patches.
6. The novel double-ridge integrated substrate-gap waveguide of claim 5, wherein the first metal via (121) and the third metal via (321) have the same size and the same arrangement period.
7. The novel double-ridge integrated substrate-gap waveguide of claim 6, wherein the second metal via (131) and the fourth metal via (331) have the same size and the same arrangement period.
8. The novel dual-ridge integrated substrate-gap waveguide of claim 7, wherein the first metal via (121) has a smaller size than the second metal via (131).
9. The novel double-ridge integrated substrate gap waveguide as claimed in claim 1, wherein the upper dielectric plate (1) and the lower dielectric plate (3) are made of dielectric materials with dielectric constants of 3.48 and loss tangent of 0.004, and the spacing dielectric plate (2) is made of dielectric materials with dielectric constants of 2.2 and loss tangent of 0.0009.
10. The novel double-ridge integrated substrate gap waveguide as claimed in claim 9, wherein the length and width of the upper dielectric plate (1), the spacing dielectric plate (2) and the lower dielectric plate (3) are the same.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201921105503.XU CN210111019U (en) | 2019-07-15 | 2019-07-15 | Novel double-ridge integrated substrate gap waveguide |
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| CN201921105503.XU CN210111019U (en) | 2019-07-15 | 2019-07-15 | Novel double-ridge integrated substrate gap waveguide |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110364799A (en) * | 2019-07-15 | 2019-10-22 | 云南大学 | Double ridge integral substrate gap waveguides |
| CN111668582A (en) * | 2020-06-15 | 2020-09-15 | 南京航空航天大学 | Semi-air filling substrate integrated groove gap waveguide and microstrip transition conversion device thereof |
| CN115411479A (en) * | 2022-08-16 | 2022-11-29 | 厦门大学 | Double-gap waveguide device based on glass substrate and manufacturing method |
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2019
- 2019-07-15 CN CN201921105503.XU patent/CN210111019U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110364799A (en) * | 2019-07-15 | 2019-10-22 | 云南大学 | Double ridge integral substrate gap waveguides |
| CN111668582A (en) * | 2020-06-15 | 2020-09-15 | 南京航空航天大学 | Semi-air filling substrate integrated groove gap waveguide and microstrip transition conversion device thereof |
| CN111668582B (en) * | 2020-06-15 | 2021-04-13 | 南京航空航天大学 | Semi-air filling substrate integrated groove gap waveguide and microstrip transition conversion device thereof |
| CN115411479A (en) * | 2022-08-16 | 2022-11-29 | 厦门大学 | Double-gap waveguide device based on glass substrate and manufacturing method |
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