CN209894923U

CN209894923U - Reliability test system for laser chip

Info

Publication number: CN209894923U
Application number: CN201920491391.XU
Authority: CN
Inventors: 徐鹏嵩; 罗跃浩; 赵山; 郭孝明; 王化发; 黄建军
Original assignee: Stelight Instrument Inc
Current assignee: Suzhou Lianxun Instrument Co ltd
Priority date: 2019-04-12
Filing date: 2019-04-12
Publication date: 2020-01-03
Anticipated expiration: 2029-04-12

Abstract

The utility model discloses a reliability test system for laser chip, including base plate, support plate and first PCB, it has the chip groove to open on the support plate, have the chip probe on the first PCB, install the TEC between base plate and the support plate, install the heat insulating board between base plate and the first PCB, open in this heat insulating board and have thermal-insulated logical groove; the second PCB is provided with a connecting contact, a testing contact, a welding contact and a power supply contact, the first PCB and the base plate are arranged on the base plate through a fixing screw, the base plate is also provided with a limiting rod, a limiting spring is sleeved on the limiting rod, a limiting hole for the limiting rod to be embedded in is formed in the base plate, a strip-shaped guide hole is communicated with the base plate on one side of the limiting hole, and the strip-shaped guide hole is positioned on one side, close to the chip, of the base plate; the welding contact is positioned on the bottom surface of the second PCB, and a welding through hole corresponding to the welding contact is formed in the bottom surface of the substrate. The utility model discloses it not only can improve the control by temperature change precision, can also a plurality of chips of single test, effectively improves efficiency of software testing.

Description

Reliability test system for laser chip

Technical Field

The utility model relates to a reliability testing system for laser chip belongs to chip processing technology field.

Background

Chip burn-in is an electrical stress test method that uses voltage and high temperature to accelerate device electrical failures, where the burn-in process essentially simulates running the entire life of the chip, since the electrical stimuli applied during the burn-in process reflect the worst case for the chip to work.

The aging test can be used for detecting the reliability of the device or finding the early failure of the device as a production window, the device generally used for the chip aging test works together with an external circuit board through a test socket, in the existing aging test fixture, a heating source for providing temperature is far away from the chip, the temperature control precision is poor, and only a single chip can be tested at a time, which is very troublesome.

SUMMERY OF THE UTILITY MODEL

The utility model aims at providing a reliability testing system for laser chip, it not only can improve the control by temperature change precision, can also a plurality of chips of single test, effectively improves efficiency of software testing.

In order to achieve the above purpose, the utility model adopts the technical scheme that: a reliability test system for a laser chip comprises a substrate, a carrier plate arranged on the substrate and a first PCB arranged on the carrier plate, wherein a chip groove for embedding a chip is formed in the carrier plate, a chip probe corresponding to the chip groove is arranged on the first PCB, a plurality of TECs are arranged between the substrate and the carrier plate, the TECs are positioned right below the chip groove, a heat insulation plate is arranged between the substrate and the first PCB, and a heat insulation through groove for embedding the TECs is formed in the heat insulation plate;

the first PCB is arranged on the heat insulation plate, a second PCB is arranged on the substrate, the second PCB is provided with a connecting contact, a testing contact communicated with the connecting contact, a welding contact and a power supply contact communicated with the welding contact, the first PCB is provided with a connecting probe corresponding to the connecting contact, the testing contact is used for connecting external equipment, and an electric connection pin of the TEC is welded on the welding contact;

a backing plate is arranged between the first PCB and the heat insulation plate, a probe through hole for a chip probe and a connecting probe to pass through is formed in the backing plate, the first PCB and the backing plate are arranged on a substrate through a fixing screw, a limiting rod is further arranged on the substrate, a limiting spring positioned between the backing plate and the carrier plate is sleeved on the limiting rod, a limiting hole for the limiting rod to be embedded in is formed in the backing plate, a strip-shaped guide hole is further communicated with the backing plate on one side of the limiting hole, and the strip-shaped guide hole is positioned on one side, close to the chip, of the backing plate;

the welding contact is positioned on the bottom surface of the second PCB, and a welding through hole corresponding to the welding contact is formed in the bottom surface of the substrate.

The further improved scheme in the technical scheme is as follows:

1. in the above scheme, the top surface of the substrate is provided with an installation groove for embedding the TEC.

2. In the above scheme, the mounting grooves are spaced by two, and the carrier plates are arranged in two and respectively located in the two mounting grooves.

3. In the above scheme, the number of the TECs in one of the slots is four, and two of the chip slots correspond to one TEC.

4. In the scheme, the side edge of the top surface of the substrate is provided with a heat insulation groove for embedding the heat insulation plate, and the mounting groove is formed in the bottom of the heat insulation groove.

5. In the scheme, the corners of the heat insulation grooves are provided with arc-shaped openings.

6. In the above scheme, the side edge of the top surface of the heat insulation plate is provided with a stepped groove for embedding the carrier plate.

7. In the above scheme, the base plate is provided with a positioning rod, and the heat insulation plate, the carrier plate and the base plate are provided with positioning holes for embedding the positioning rod.

Because of above-mentioned technical scheme's application, compared with the prior art, the utility model have the following advantage:

1. the utility model discloses reliability test system for laser chip installs a plurality of TEC between its base plate and support plate, and this TEC is located the chip groove under, through install the TEC additional between base plate and PCB, semiconductor cooler promptly, and install the support plate that is used for placing the chip on the TEC, directly place the chip on the TEC that is used for heating the accuse temperature, the TEC can directly heat the chip, not only the rate of heating is fast, efficient, and the temperature control precision is high, and the test result of each chip receives the undulant influence of temperature less; install a heat insulating board between its base plate and the first PCB, it has the thermal-insulated logical groove that supplies the TEC embedding to open in this heat insulating board, through installing the TEC in the thermal-insulated logical groove of the heat insulating board that has thermal-insulated effect, on the one hand, can prevent the heat that the TEC produced through the heat insulating board to the loss around, improve heating efficiency, on the other hand, through the setting of thermal-insulated logical groove with the restriction of the heating effect of TEC in the chip groove department of support plate, make the control by temperature change precision of TEC higher, and reduce the temperature fluctuation range that the energy lost to around and brought, further reduce the influence of temperature fluctuation to measuring accuracy.

2. The utility model discloses reliability test system for laser chip, its first PCB is installed on the heat insulating board, install a second PCB on the base plate, this second PCB has the connection contact, with the test contact of connection contact intercommunication, welding contact and with the power supply contact of welding contact intercommunication, first PCB has the connection probe corresponding with the connection contact point, the test contact is used for connecting external equipment, the electricity pin welding of TEC is on welding contact, because TEC subassembly needs external power supply, PCB not only need be connected with TEC and realize integrated power supply, still need communicate the chip when using, be convenient for the staff to carry out the chip test, but, when dismouting, need remove the contact of PCB probe and chip, on the one hand, the PCB that requires to communicate with the chip can move relative to the base plate, on the other hand, the PCB that requires to weld with TEC and fix can not move, the PCB is divided into a first PCB with a chip probe and a connection probe and a second PCB with a connection contact, a test contact, a welding contact and a power supply contact in a modularized manner, so that the first PCB can be connected with and disconnected from the chip, the chip can be tested by virtue of the connection of the first PCB and the second PCB, and further multiple requirements of power supply, testing, dismounting and the like are met, and the thermal control device is very convenient.

3. The utility model discloses a reliability test system for laser chip, its first PCB and backing plate are installed on the base plate through a set screw, still be equipped with the gag lever post on the base plate, cover on this gag lever post and be located the spacing spring between backing plate and the support plate, it has the spacing hole that supplies the gag lever post embedding to open on the backing plate of this spacing hole one side, still communicate to open on the backing plate of this spacing hole one side has a bar guiding hole, and this bar guiding hole is located the side that the backing plate is close to the chip, through the setting of set screw, make first PCB can be stably communicated with the chip, and spacing spring still has certain thickness after receiving the compression, thereby through spacing spring isolation support plate and backing plate of compression state, form the clearance of walking light, be convenient for the laser chip to accomplish the photoelectricity test, simultaneously, after unscrewing the set screw, spacing spring can jack-up the backing plate again automatically, make the chip probe of first PCB break, the staff of being convenient for operates the chip in the chip groove to, the gag lever post of wearing in spacing hole can slide along the bar guiding hole with spacing hole intercommunication, thereby makes backing plate and first PCB board keep away from the chip groove, avoids chip probe, backing plate and first PCB to influence the dismouting of chip.

4. The utility model discloses reliability test system for laser chip, its welding contact is located second PCB bottom surface, open the base plate bottom surface has the welding through-hole that corresponds with the welding contact, because need weld the electricity pin welding of TEC to the welding contact of second PCB on, therefore, in order to avoid the not good problem of quality to appear among the TEC welding process, lead to the TEC welding back that finishes, each TEC is difficult to maintain in same reference surface, lead to installing and have the gap of equidimension not between the support plate on a plurality of TEC and the TEC, be difficult to laminate completely, both can influence the installation of support plate, can be because of the existence in not equidimension gap, lead to the chip that different TEC correspond to be in different temperature intervals, single chip test accuracy is relatively poor, it is great to criticize chip test result difference with batching, thereby influence the use of anchor clamps, therefore, welding through-hole on the, The support plate and the TEC are assembled into a whole and are arranged in the heat insulation groove, so that a worker can directly weld the electric pins and the welding contacts, and the TEC can be prevented from deviating due to welding, and the uniformity of the heating and temperature control of the TEC is ensured.

5. The utility model discloses reliability testing system for laser chip, its mounting groove interval division has two, the support plate sets up to two and is located two mounting grooves here respectively, one the quantity of TEC is four in the dress groove, two the chip groove corresponds with a TEC, through the setting of a plurality of TEC in the mounting groove, further increases the heating efficiency and the intensity of heating source to make and to set up more chip grooves on the support plate, and utilize the intercommunication and the test of the integrated each chip of cooperation of first PCB and second PCB, thereby improve the efficiency of software testing of chip, reduce test cost.

Drawings

FIG. 1 is a schematic diagram of the overall structure of the reliability testing system for laser chip of the present invention;

FIG. 2 is a partial exploded view of a reliability testing system for a laser chip;

FIG. 3 is an exploded view of portion A of FIG. 2;

FIG. 4 is a partial exploded view of another perspective of a reliability testing system for a laser chip;

FIG. 5 is a schematic view of a bottom structure of a reliability testing system for a laser chip;

fig. 6 is an exploded view of the pad and the first PCB section.

In the above drawings: 1. a substrate; 11. a limiting rod; 12. a limiting spring; 16. welding the through hole; 101. mounting grooves; 106. positioning a rod; 107. positioning holes; 108. a heat insulation groove; 109. an arc-shaped opening; 2. a carrier plate; 201. a chip slot; 3. a first PCB; 31. a chip probe; 32. connecting a probe; 4. TEC; 41. connecting a power pin; 5. a heat insulation plate; 51. a heat insulation through groove; 501. a stepped groove; 6. a second PCB; 61. connecting the contacts; 62. testing the contact; 63. welding a contact; 64. a power supply contact; 7. a base plate; 71. fixing screws; 72. a limiting hole; 73. a strip-shaped guide hole; 701. and a probe through hole.

Detailed Description

Example 1: a reliability testing system for a laser chip, referring to fig. 1-6, including a substrate 1, a carrier 2 mounted on the substrate 1, and a first PCB3 mounted on the carrier 2, wherein a chip slot 201 for embedding a chip is formed on the carrier 2, a chip probe 31 corresponding to the chip slot 201 is provided on the first PCB3, a plurality of TECs 4 are installed between the substrate 1 and the carrier 2, the TEC4 is located right below the chip slot 201, a heat insulation board 5 is installed between the substrate 1 and the first PCB3, and a heat insulation through slot 51 for embedding a TEC4 is formed in the heat insulation board 5;

the first PCB3 is mounted on the heat insulation board 5, the substrate 1 is mounted with a second PCB6, the second PCB6 is provided with a connection contact 61, a test contact 62 communicated with the connection contact 61, a welding contact 63 and a power supply contact 63 communicated with the welding contact 63, the first PCB3 is provided with a connection probe 32 corresponding to the connection contact 61, the test contact 62 is used for connecting external equipment, and the electric connection pin 41 of the TEC4 is welded on the welding contact 63;

a backing plate 7 is arranged between the first PCB3 and the heat insulation plate 5, a probe through hole 701 for a chip probe 31 and a connecting probe 32 to pass through is arranged on the backing plate 7, the first PCB3 and the backing plate 7 are arranged on the substrate 1 through a fixing screw 71, a limiting rod 11 is further arranged on the substrate 1, a limiting spring 12 positioned between the backing plate 7 and the carrier plate 2 is sleeved on the limiting rod 11, a limiting hole 72 for the limiting rod 11 to be embedded is arranged on the backing plate 7, a strip-shaped guide hole 73 is further communicated on the backing plate 7 at one side of the limiting hole 72, and the strip-shaped guide hole 73 is positioned at one side of the backing plate 7 close to the chip;

the soldering contact 63 is located on the bottom surface of the second PCB6, and the bottom surface of the substrate 1 is provided with a soldering through hole 16 corresponding to the soldering contact 63.

The top surface of the substrate 1 is provided with a mounting groove 101 for embedding the TEC 4; two mounting grooves 101 are spaced apart, and two carrier plates 2 are disposed in the two mounting grooves 101; the number of the TECs 4 in one accommodating groove is four, and two chip grooves 201 correspond to one TEC 4.

A heat insulation groove 108 for embedding the heat insulation plate 5 is arranged at the side edge of the top surface of the substrate 1, and the mounting groove 101 is arranged at the bottom of the heat insulation groove 108; the heat insulation slot 108 has an arc opening 109 at a corner thereof.

A stepped groove 501 for embedding the carrier plate 2 is arranged at the side edge of the top surface of the heat insulation plate 5; the base plate 1 has a positioning rod 106, and the heat insulation plate 5, the carrier plate 2 and the backing plate 7 have a positioning hole 107 for the positioning rod 106 to be inserted.

Example 2: a reliability testing system for a laser chip, referring to fig. 1-6, including a substrate 1, a carrier 2 mounted on the substrate 1, and a first PCB3 mounted on the carrier 2, wherein a chip slot 201 for embedding a chip is formed on the carrier 2, a chip probe 31 corresponding to the chip slot 201 is provided on the first PCB3, a plurality of TECs 4 are installed between the substrate 1 and the carrier 2, the TEC4 is located right below the chip slot 201, a heat insulation board 5 is installed between the substrate 1 and the first PCB3, and a heat insulation through slot 51 for embedding a TEC4 is formed in the heat insulation board 5;

A heat insulation groove 108 for embedding the heat insulation plate 5 is arranged at the side edge of the top surface of the substrate 1, and the mounting groove 101 is arranged at the bottom of the heat insulation groove 108; the corner of the heat insulation groove 108 is provided with an arc-shaped opening 109, and the side edge of the top surface of the heat insulation plate 5 is provided with a step groove 501 for the carrier plate 2 to be embedded into.

When the reliability test system for the laser chip is adopted, the TEC, namely the semiconductor refrigerator, is additionally arranged between the substrate and the PCB, the carrier plate for placing the chip is arranged on the TEC, the chip is directly placed on the TEC for heating and controlling the temperature, and the TEC can directly heat the chip, so that the heating speed is high, the efficiency is high, the temperature control precision is high, and the test result of each chip is less influenced by temperature fluctuation; through installing the TEC into the thermal-insulated logical groove of the heat insulating board that has thermal-insulated effect, on the one hand, can prevent the heat that the TEC produced through the heat insulating board to the loss around, improve heating efficiency, on the other hand, through the setting of thermal-insulated logical groove with the heating effect restriction of TEC in the chip groove department of support plate for the control by temperature precision of TEC is higher, and reduces the temperature fluctuation range that the energy brought to the loss around, further reduces the influence of temperature fluctuation to measuring accuracy.

In addition, because the TEC component needs an external power supply, the PCB not only needs to be connected with the TEC to realize integrated power supply, but also needs to be communicated with the chip when in use, so that a worker can conveniently test the chip, but when the chip is disassembled and assembled, the PCB needs to be moved to remove the contact between the PCB probe and the chip, on one hand, the PCB communicated with the chip is required to be capable of moving relative to the substrate, on the other hand, the PCB fixedly welded with the TEC is required to be incapable of moving, so that the heating and temperature control functions of the TEC are prevented from being influenced, therefore, the PCB is modularly divided into a first PCB with the chip probe and the connecting probe and a second PCB with the connecting contact, the testing contact, the welding contact and the power supply contact, so that the first PCB can be communicated with and disconnected from the chip, the testing on the chip can be realized by virtue of the connection of the first PCB, is very convenient.

In addition, through the setting of fixed screw, make first PCB can be with the stable intercommunication of chip, and spacing spring still has certain thickness after receiving the compression, thereby spacing spring isolation support plate and backing plate through compression state, form and walk the light clearance, the laser chip of being convenient for accomplishes the photoelectric test, and simultaneously, after loosening the fixed screw, spacing spring can automatic jack-up backing plate again, make the chip probe of first PCB break away from the chip, the staff of being convenient for operates the chip in the chip groove, and, the gag lever post of wearing in spacing hole can slide along the bar guiding hole with spacing hole intercommunication, thereby make backing plate and first PCB board keep away from the chip groove, avoid the chip probe, backing plate and first PCB influence the dismouting of chip to the chip

In addition, because the power connection pin of the TEC needs to be soldered to the soldering contact of the second PCB, in order to avoid the problem of poor quality in the soldering process of the TEC, which results in that after the soldering of the TEC is completed, the TECs are difficult to maintain in the same reference surface, so that gaps with different sizes exist between the carrier boards mounted on the TECs and the TECs, and the carrier boards are difficult to completely attach, which not only affects the mounting of the carrier boards, but also causes the chips corresponding to different TECs to be in different temperature ranges due to the existence of the gaps with different sizes, the testing precision of a single chip is poor, the difference of the testing results of chips in the same batch is large, thereby affecting the use of the clamp, so that the soldering through holes on the substrate expose the soldering contacts, the heat insulation board, the carrier boards and the TECs are assembled into a whole in advance and mounted in the heat insulation groove, and the deviation of the TEC caused by welding can be avoided, so that the uniformity of the TEC in heating and temperature control is ensured.

In addition, through the arrangement of the plurality of TECs in the mounting groove, the heating efficiency and the density of the heating source are further increased, so that more chip grooves can be formed in the carrier plate, the communication and the test of each chip are integrated by utilizing the matching of the first PCB and the second PCB, the test efficiency of the chip is improved, and the test cost is reduced.

The above embodiments are only for illustrating the technical concept and features of the present invention, and the purpose of the embodiments is to enable people skilled in the art to understand the contents of the present invention and to implement the present invention, which cannot limit the protection scope of the present invention. All equivalent changes and modifications made according to the spirit of the present invention should be covered by the protection scope of the present invention.

Claims

1. A reliability test system for a laser chip is characterized in that: the chip-embedded heat insulation structure comprises a substrate (1), a carrier plate (2) arranged on the substrate (1) and a first PCB (3) arranged on the carrier plate (2), wherein a chip groove (201) for embedding a chip is formed in the carrier plate (2), a chip probe (31) corresponding to the chip groove (201) is arranged on the first PCB (3), a plurality of TECs (4) are arranged between the substrate (1) and the carrier plate (2), the TECs (4) are positioned under the chip groove (201), a heat insulation plate (5) is arranged between the substrate (1) and the first PCB (3), and a heat insulation through groove (51) for embedding the TECs (4) is formed in the heat insulation plate (5);

the first PCB (3) is mounted on the heat insulation plate (5), a second PCB (6) is mounted on the substrate (1), a connecting contact (61), a testing contact (62) communicated with the connecting contact (61), a welding contact (63) and a power supply contact (64) communicated with the welding contact (63) are arranged on the second PCB (6), a connecting probe (32) corresponding to the connecting contact (61) is arranged on the first PCB (3), the testing contact (62) is used for connecting external equipment, and an electric connection pin (41) of the TEC (4) is welded on the welding contact (63);

a backing plate (7) is arranged between the first PCB (3) and the heat insulation plate (5), a probe through hole (701) for a chip probe (31) and a connecting probe (32) to pass through is formed in the backing plate (7), the first PCB (3) and the backing plate (7) are arranged on the substrate (1) through a fixing screw (71), a limiting rod (11) is further arranged on the substrate (1), a limiting spring (12) positioned between the backing plate (7) and the carrier plate (2) is sleeved on the limiting rod (11), a limiting hole (72) for the limiting rod (11) to be embedded into is formed in the backing plate (7) on one side of the limiting hole (72), a strip-shaped guide hole (73) is further communicated with the backing plate (7) on one side of the limiting hole (72), and the strip-shaped guide hole (73) is positioned on one side, close to the chip, of the backing plate (7);

the welding contact (63) is positioned on the bottom surface of the second PCB (6), and a welding through hole (16) corresponding to the welding contact (63) is formed in the bottom surface of the substrate (1).

2. The reliability test system for a laser chip according to claim 1, wherein: the top surface of the substrate (1) is provided with a mounting groove (101) for embedding the TEC (4).

3. The reliability test system for a laser chip according to claim 2, wherein: the mounting grooves (101) are spaced by two, and the carrier plates (2) are arranged in two and are respectively positioned in the two mounting grooves (101).

4. The reliability test system for a laser chip according to claim 3, wherein: the number of the TECs (4) in one mounting groove is four, and the two chip grooves (201) correspond to one TEC (4).

5. The reliability test system for a laser chip according to claim 2, wherein: and a heat insulation groove (108) for embedding the heat insulation plate (5) is formed in the side edge of the top surface of the substrate (1), and the mounting groove (101) is formed in the bottom of the heat insulation groove (108).

6. The reliability test system for a laser chip according to claim 5, wherein: an arc-shaped opening (109) is formed at the corner of the heat insulation groove (108).

7. The reliability test system for a laser chip according to claim 1, wherein: and a step groove (501) for embedding the carrier plate (2) is formed in the side edge of the top surface of the heat insulation plate (5).

8. The reliability test system for a laser chip according to claim 1, wherein: the base plate (1) is provided with a positioning rod (106), and positioning holes (107) for embedding the positioning rod (106) are formed in the heat insulation plate (5), the carrier plate (2) and the base plate (7).