CN207818594U - A kind of N-type double-sided solar battery - Google Patents
A kind of N-type double-sided solar battery Download PDFInfo
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- CN207818594U CN207818594U CN201721762093.7U CN201721762093U CN207818594U CN 207818594 U CN207818594 U CN 207818594U CN 201721762093 U CN201721762093 U CN 201721762093U CN 207818594 U CN207818594 U CN 207818594U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The utility model discloses a kind of N-type double-sided solar batteries, the p type diffused layer of N-type double-sided solar battery includes the positive p-type lightly doped district of multiple p-type heavily doped regions for going deep into N-type silicon chip and covering N-type silicon chip, n type diffused layer includes the N-type lightly doped district at the back side of multiple N-type heavily doped regions for going deep into N-type silicon chip and covering N-type silicon chip, and form front gate line electrode corresponding with p-type heavily doped region position, with the formation back side corresponding with N-type heavily doped region position gate line electrode, the N-type double-sided solar battery with selective emitter is formed to prepare, and then improve the photoelectric conversion efficiency of N-type double-sided solar battery.
Description
Technical field
The utility model is related to technical field of solar batteries, more specifically, are related to a kind of N-type double-sided solar electricity
Pond.
Background technology
Conventional fossil fuel is increasingly depleted, in existing sustainable energy, solar energy be undoubtedly a kind of cleaning,
Universal and high potentiality alternative energy source.Solar cell, also referred to as photovoltaic cell are a kind of the luminous energy of the sun to be converted into electricity
The semiconductor devices of energy.Since it is green product, environmental pollution will not be caused, and solar energy is renewable resource,
So in the case of current energy shortage, solar cell be it is a kind of having the novel energy of broad based growth future, and receive
Extensive concern.
In the base material used in solar cell, N-type silicon has longer minority carrier life time, N-type silicon than P-type silicon
Attenuation performance it is then more stable, therefore, in N-type silicon chip carrying out battery makes the phases of the N type solar battery sheets to be formed
It is more larger than p-type solar battery sheet advantage.But the photoelectric conversion efficiency of existing N-type solar battery sheet is to be improved.
Utility model content
In view of this, the utility model provides a kind of N-type double-sided solar battery, wherein p type diffused layer includes multiple
Go deep into the positive p-type lightly doped district of the p-type heavily doped region and covering N-type silicon chip of N-type silicon chip, n type diffused layer includes multiple depths
Enter the N-type lightly doped district of the N-type heavily doped region of N-type silicon chip and the back side of covering N-type silicon chip, and is formed and p-type heavy doping position
Corresponding front gate line electrode is set, and forms the back side corresponding with N-type heavily doped region position gate line electrode, is had to prepare to be formed
The N-type double-sided solar battery of selective emitter, and then improve the photoelectric conversion efficiency of N-type double-sided solar battery.
To achieve the above object, the technical scheme that the utility model is provided is as follows：
A kind of N-type double-sided solar battery, including：
N-type silicon chip；
Positioned at the positive p type diffused layer of the N-type silicon chip, the p type diffused layer includes multiple going deep into the N-type silicon chip
P-type heavily doped region and cover the positive p-type lightly doped district of the N-type silicon chip；
N type diffused layer positioned at the back side of the N-type silicon chip, the n type diffused layer include multiple going deep into the N-type silicon chip
N-type heavily doped region and cover the N-type silicon chip the back side N-type lightly doped district；
Front passivated reflection reducing positioned at the p type diffused layer away from the N-type silicon chip side penetrates layer；
Deviate from the passivating back antireflection layer of the N-type silicon chip side positioned at the n type diffused layer；
And penetrate layer positioned at the front passivated reflection reducing and deviate from the front gate line electrode of the N-type silicon chip side, and be located at
The passivating back antireflection layer deviate from the N-type silicon chip side back side gate line electrode, wherein the front gate line electrode with
P-type heavily doped region position corresponds, and the back side gate line electrode is corresponded with N-type heavily doped region position.
Optionally, the sheet resistance of the p-type heavily doped region is 35~45 Ω/Squar, and, the sheet resistance of the p-type lightly doped district
For 150~180 Ω/Squar；
And the sheet resistance of the N-type heavily doped region is 30~50 Ω/Squar, and, the sheet resistance of the N-type lightly doped district is
180~200 Ω/Squar.
Optionally, the front passivated reflection reducing penetrate layer be included in the p type diffused layer away from the N-type silicon chip side successively
Formed the first silicon dioxide layer, alumina layer and the first silicon nitride layer lamination；Alternatively, the front passivated reflection reducing penetrates layer includes
The lamination of alumina layer and the first silicon nitride layer is sequentially formed away from the N-type silicon chip side in the p type diffused layer.
Optionally, the passivating back antireflection layer is included in the n type diffused layer and deviates from the N-type silicon chip side successively
Form the lamination of the second silicon dioxide layer and the second silicon nitride layer.
Optionally, the front of the N silicon chips is making herbs into wool face.
Compared to the prior art, technical solution provided by the utility model has at least the following advantages：
The utility model provides a kind of N-type double-sided solar battery, including：One N-type silicon chip is provided；In the N-type silicon
One p type diffused layer of front diffusion of piece, the p type diffused layer include multiple p-type heavily doped regions for going deep into the N-type silicon chip and cover
Cover the positive p-type lightly doped district of the N-type silicon chip；In one n type diffused layer of back side diffusion of the N-type silicon chip, the N-type expands
Scattered layer includes that the N-type at the back side of multiple N-type heavily doped regions for going deep into the N-type silicon chip and the covering N-type silicon chip is lightly doped
Area；Front passivated reflection reducing is formed in the front of the N-type silicon chip and penetrates layer, and forms passivating back at the back side of the N-type silicon chip
Antireflection layer；Layer is penetrated in the front passivated reflection reducing and forms multiple front gate line electrodes away from the N-type silicon chip side, and in institute
It states passivating back antireflection layer and forms multiple back side gate line electrodes away from the N-type silicon chip side, wherein the front gate line electricity
Pole is corresponded with p-type heavily doped region position, and the back side gate line electrode and N-type heavily doped region position one are a pair of
It answers.
As shown in the above, technical solution provided by the utility model, p type diffused layer include multiple going deep into N-type silicon chip
P-type heavily doped region and covering N-type silicon chip positive p-type lightly doped district, n type diffused layer includes multiple N for going deep into N-type silicon chip
The N-type lightly doped district at the back side of type heavily doped region and covering N-type silicon chip, and form front corresponding with p-type heavily doped region position
Gate line electrode, and the back side corresponding with N-type heavily doped region position gate line electrode is formed, there is selective emitter to prepare to be formed
N-type double-sided solar battery, and then can effectively reduce the contact resistance between gate line electrode and N-type silicon chip and prepare good
Good Ohmic contact, and the short circuit current and open-circuit voltage of N-type double-side cell can be improved, and then improve the two-sided sun of N-type
The photoelectric conversion efficiency of energy battery.
Description of the drawings
In order to illustrate the embodiment of the utility model or the technical proposal in the existing technology more clearly, below will be to embodiment
Or attached drawing needed to be used in the description of the prior art is briefly described, it should be apparent that, the accompanying drawings in the following description is only
It is the embodiments of the present invention, for those of ordinary skill in the art, without creative efforts, also
Other attached drawings can be obtained according to the attached drawing of offer.
Fig. 1 is a kind of flow chart of the production method of N-type double-side cell provided by the embodiments of the present application；
Fig. 2 is a kind of structural schematic diagram of N-type double-side cell provided by the embodiments of the present application.
Specific implementation mode
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model
Clearly and completely describe, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole
Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are without making creative work
The every other embodiment obtained, shall fall within the protection scope of the present invention.
As described in background, in the base material used in solar cell, N-type silicon has longer than P-type silicon
Minority carrier life time, the attenuation performance of N-type silicon is then more stable, therefore, in N-type silicon chip carry out battery make the N-type to be formed
Solar battery sheet compared to p-type solar battery sheet advantage it is larger.But the photoelectricity of existing N-type solar battery sheet turns
It is to be improved to change efficiency.
Based on this, the embodiment of the present application provides a kind of N-type double-sided solar battery and preparation method thereof, wherein p-type expands
Scattered layer includes the positive p-type lightly doped district of multiple p-type heavily doped regions for going deep into N-type silicon chip and covering N-type silicon chip, N-type diffusion
Layer includes multiple N-type heavily doped regions for going deep into N-type silicon chip and covers the N-type lightly doped district at the back side of N-type silicon chip, and formation and P
The corresponding front gate line electrode in type heavily doped region position, and the back side corresponding with N-type heavily doped region position gate line electrode is formed, with
It prepares and forms the N-type double-sided solar battery with selective emitter, and then the photoelectricity for improving N-type double-sided solar battery turns
Change efficiency.To achieve the above object, technical solution provided by the embodiments of the present application is as follows, specifically combines Fig. 1 to Fig. 2 to the application
The technical solution that embodiment provides is described in detail.
A kind of production method of N-type double-sided solar battery piece, including：
S1, a N-type silicon chip is provided；
S2, one p type diffused layer of front diffusion in the N-type silicon chip, the p type diffused layer includes multiple going deep into the N
The p-type heavily doped region of type silicon chip and the positive p-type lightly doped district for covering the N-type silicon chip；
S3, one n type diffused layer of back side diffusion in the N-type silicon chip, the n type diffused layer include multiple going deep into the N
The N-type lightly doped district of the N-type heavily doped region of type silicon chip and the back side of the covering N-type silicon chip；
S4, it forms front passivated reflection reducing in the front of the N-type silicon chip and penetrates layer, and formed at the back side of the N-type silicon chip
Passivating back antireflection layer；
S5, it penetrates layer in the front passivated reflection reducing and forms multiple front gate line electrodes away from the N-type silicon chip side, and
The passivating back antireflection layer forms multiple back side gate line electrodes away from the N-type silicon chip side, wherein the front gate line
Electrode is corresponded with p-type heavily doped region position, and the back side gate line electrode and N-type heavily doped region position are one by one
It is corresponding.
As shown in the above, technical solution provided by the embodiments of the present application, p type diffused layer include multiple going deep into N-type silicon
The positive p-type lightly doped district of the p-type heavily doped region of piece and covering N-type silicon chip, n type diffused layer include multiple going deep into N-type silicon chip
N-type heavily doped region and covering N-type silicon chip the back side N-type lightly doped district, and formed it is corresponding with p-type heavily doped region position just
Face gate line electrode, and the back side corresponding with N-type heavily doped region position gate line electrode is formed, there is selectivity transmitting to prepare to be formed
The N-type double-sided solar battery of pole, and then can effectively reduce the contact resistance between gate line electrode and N-type silicon chip and prepare
Good Ohmic contact, and the short circuit current and open-circuit voltage of N-type double-side cell can be improved, and then it is two-sided too to improve N-type
The photoelectric conversion efficiency of positive energy battery.
In one embodiment of the application, the front diffusion one p type diffused layer packet provided by the present application in the N-type silicon chip
It includes：
Multiple areas Peng Jiang are printed in the front of the N-type silicon chip, the areas Peng Jiang are a pair of with the p-type heavily doped region one
It answers；
Boron DIFFUSION TREATMENT is carried out to the front of the N-type silicon chip using boron source, forms the p type diffused layer, wherein described
P type diffused layer includes that multiple p-type heavily doped regions for going deep into the N-type silicon chip are gently mixed with the positive p-type for covering the N-type silicon chip
Miscellaneous area.
The embodiment of the present application needs in the front areas printing Peng Jiang of N-type silicon chip, subsequently to obtain P when carrying out boron diffusion
Type heavily doped region, wherein the doping concentration of p-type heavily doped region is more than the doping concentration of p-type lightly doped district.The embodiment of the present application carries
The boron of confession, which starches its material can be, to be included nano silica fume, boron material (boron, boron oxide, silicon boride), solvent (terpinol, santal) and adds
Add agent (ethyl cellulose).
And it is optional, carrying out boron DIFFUSION TREATMENT to the front of the N-type silicon chip using boron source includes：
Boron tribromide is used to carry out boron DIFFUSION TREATMENT to the front of the N-type silicon chip for boron source, wherein to carry out first first
Secondary boron DIFFUSION TREATMENT, corresponding diffusion time is 8min~15min, including endpoint value, and diffusion temperature is 890 DEG C~910 DEG C,
Including endpoint value；Then carrying out second of boron DIFFUSION TREATMENT, corresponding diffusion time is 20min~30min, including endpoint value,
And diffusion temperature is 950 DEG C~990 DEG C, including endpoint value.Wherein, by above-mentioned DIFFUSION TREATMENT, the p-type heavily doped region is controlled
Sheet resistance be 35~45 Ω/Squar, and, the sheet resistance of the p-type lightly doped district is 150~180 Ω/Squar.
It should be noted that the embodiment of the present application does not limit the concrete numerical value of above-mentioned numberical range, such as the first time
The diffusion time of boron DIFFUSION TREATMENT can be 9min, 11min, 14min etc., and the diffusion temperature of first time boron DIFFUSION TREATMENT can be
900 DEG C, 905 DEG C etc., the diffusion time of second of boron DIFFUSION TREATMENT can be 22min, 25min, 28min etc., and first time boron expands
The diffusion temperature for dissipating processing can be 960 DEG C, 980 DEG C etc., and the sheet resistance of p-type heavily doped region can be 40 Ω/Squar, 43
The sheet resistance of Ω/Squar etc. and P type lightly doped districts is 160 Ω/Squar, 170 Ω/Squar etc., to this needs according to actually answering
With specifically being chosen.In addition, after carrying out p-type DIFFUSION TREATMENT, need to be removed unnecessary structure, such as uses hydrofluoric acid
The structures such as the back side and edge PN junction are removed with salpeter solution, it is same as the prior art to this, therefore extra repeat is not done.
In one embodiment of the application, the back side diffusion one n type diffused layer packet provided by the present application in the N-type silicon chip
It includes：
In the multiple areas Lin Jiang of the back up of the N-type silicon chip, the areas Lin Jiang are a pair of with the N-type heavily doped region one
It answers；
Phosphorus diffusion process is carried out to the back side of the N-type silicon chip using phosphorus source, forms the n type diffused layer, wherein described
N type diffused layer includes that the N-type at the back side of multiple N-type heavily doped regions for going deep into the N-type silicon chip and the covering N-type silicon chip is gently mixed
Miscellaneous area.
The embodiment of the present application needs in the areas back up Lin Jiang of N-type silicon chip, subsequently to obtain N when carrying out phosphorus diffusion
Type heavily doped region, wherein the doping concentration of N-type heavily doped region is more than the doping concentration of N-type lightly doped district.The embodiment of the present application carries
The phosphorus of confession starch its material and can be include quality accounting be the nano silica fume of 10~20 (including endpoint values), quality accounting is 10
The additive (polyphosphoric acid trimethyl silicane, terpinol) and quality accounting of~20 (including endpoint values) are 40~70 (including endpoint values)
Organic solvent (santal, terpinol).
And it is optional, carrying out phosphorus diffusion process to the back side of the N-type silicon chip using phosphorus source includes：
Phosphorus oxychloride is used to carry out phosphorus diffusion process to the back side of the N-type silicon chip for phosphorus source, wherein to carry out first first
Secondary phosphorus diffusion process, corresponding diffusion time is 5min~15min, including endpoint value, and diffusion temperature is 850 DEG C~870 DEG C,
Including endpoint value；Then carrying out second of phosphorus diffusion process, corresponding diffusion time is 25min~35min, including endpoint value,
And diffusion temperature is 890 DEG C~950 DEG C, including endpoint value.Wherein, by above-mentioned DIFFUSION TREATMENT, the N-type heavily doped region is controlled
Sheet resistance be 30~50 Ω/Squar, and, the sheet resistance of the N-type lightly doped district is 180~200 Ω/Squar.
It should be noted that the embodiment of the present application does not limit the concrete numerical value of above-mentioned numberical range, such as the first time
The diffusion time of phosphorus diffusion process can be 6min, 10min, 14min etc., and the diffusion temperature of first time phosphorus diffusion process can be
860 DEG C, 865 DEG C etc., the diffusion time of second of phosphorus diffusion process can be 26min, 30min, 34min etc., and first time phosphorus expands
The diffusion temperature for dissipating processing can be 900 DEG C, 930 DEG C etc., and the sheet resistance of N-type heavily doped region can be 40 Ω/Squar, 45
The sheet resistance of Ω/Squar etc. and P type lightly doped districts is 185 Ω/Squar, 190 Ω/Squar etc., to this needs according to actually answering
With specifically being chosen.In addition, before carrying out N-type DIFFUSION TREATMENT, the front in N-type silicon chip is needed to form a protection film layer, such as
Form silicon oxynitride film.And it after carrying out N-type DIFFUSION TREATMENT, needs to be removed unnecessary structure, such as removes dephosphorization silicon
Glass and removal protection film layer etc., it is same as the prior art to this, therefore extra repeat is not done.
In one embodiment of the application, the front formation front passivated reflection reducing provided by the present application in the N-type silicon chip is penetrated
Layer include：
In the p type diffused layer the first silicon dioxide layer, alumina layer and are sequentially formed away from the N-type silicon chip side
The lamination of one silicon nitride layer forms the front passivated reflection reducing and penetrates layer；Alternatively, deviating from the N-type silicon chip in the P types diffusion layer
The lamination that side sequentially forms alumina layer and the first silicon nitride layer forms the front passivated reflection reducing and penetrates layer.
The thickness range of first silicon dioxide layer provided by the embodiments of the present application can be 1nm~2nm, including endpoint value；
The thickness range of alumina layer can be 6nm~10nm, including endpoint value；And first the thickness range of silicon nitride layer can be with
For 70nm~100nm, including endpoint value, reflectivity may be controlled to 2%~5%, including endpoint value, and the first silicon nitride
Layer may be used PECVD and deposit to be formed.
It is provided by the present application to form passivating back antireflective at the back side of the N-type silicon chip in one embodiment of the application
Layer include：
In the n type diffused layer the second silicon dioxide layer and the second silicon nitride are sequentially formed away from the N-type silicon chip side
The lamination of layer forms the passivating back antireflection layer.
The thickness range of passivating back antireflection layer provided by the embodiments of the present application can be 75nm~90nm, including endpoint
Value, and reflectivity may be controlled to 2%~5%, including endpoint value, and the second silicon nitride layer may be used PECVD and deposit to be formed.
Further, production method provided by the embodiments of the present application after providing the N-type silicon chip and is forming the P
Before type diffusion layer, further include：
Making herbs into wool processing is carried out to the front of the N silicon chips, to form making herbs into wool face in the front of N-type silicon chip, and then controls N-type
The positive reflectivity of silicon chip is in 11%~14%, including endpoint value.
Correspondingly, the embodiment of the present application also provides a kind of N-type double-sided solar battery, N-type double-sided solar battery is adopted
The production method provided with above-mentioned any one embodiment is prepared.Refering to what is shown in Fig. 2, being one kind provided by the embodiments of the present application
The structural schematic diagram of N-type double-sided solar battery, wherein N-type double-sided solar battery includes：
N-type silicon chip 100；
Positioned at the positive p type diffused layer 200 of the N-type silicon chip 100, the p type diffused layer 200 includes multiple deep
The p-type heavily doped region P++ of the N-type silicon chip 100 and positive p-type lightly doped district P+ for covering the N-type silicon chip 100；
N type diffused layer 300 positioned at the back side of the N-type silicon chip 100, the n type diffused layer include multiple going deep into the N
The N-type lightly doped district N+ of the N-type heavily doped region N++ of type silicon chip 100 and the back side for covering the N-type silicon chip 100；
Front passivated reflection reducing positioned at the p type diffused layer 200 away from 100 side of the N-type silicon chip penetrates layer 400；
Deviate from the passivating back antireflection layer 500 of 100 side of the N-type silicon chip positioned at the n type diffused layer 300；
And penetrate the front gate line electrode that layer 400 deviates from 100 side of the N-type silicon chip positioned at the front passivated reflection reducing
600, and positioned at the passivating back antireflection layer 500 deviate from 100 side of the N-type silicon chip back side gate line electrode 700,
In, the front gate line electrode 600 is corresponded with the positions p-type heavily doped region P++, and the back side gate line electrode 700
It is corresponded with the positions N-type heavily doped region N++.
In one embodiment of the application, the front passivated reflection reducing penetrates layer and is included in the p type diffused layer away from the N-type
Silicon chip side sequentially form the first silicon dioxide layer, alumina layer and the first silicon nitride layer lamination；Alternatively, the front passivation
Antireflection layer is included in the p type diffused layer and sequentially forms alumina layer and the first silicon nitride layer away from the N-type silicon chip side
Lamination.
In one embodiment of the application, the passivating back antireflection layer is included in the n type diffused layer and deviates from the N-type
Silicon chip side sequentially forms the lamination of the second silicon dioxide layer and the second silicon nitride layer.
And in one embodiment of the application, the front of the N silicon chips is making herbs into wool face.
Refering to what is shown in Fig. 2, N-type double-sided solar battery provided by the embodiments of the present application, front passivated reflection reducing penetrate layer 400
May include the first silicon dioxide layer 410 being sequentially overlapped, the lamination of alumina layer 420 and the first silicon nitride layer 430；And
Passivating back antireflection layer 500 includes the lamination of the second silicon dioxide layer 510 and the second silicon nitride layer 520 that are sequentially overlapped.
It should be noted that front passivated reflection reducing provided by the embodiments of the present application penetrate in layer the first silicon dioxide layer can be with
Removal, is not particularly limited this application.And N-type double-sided solar battery provided by the embodiments of the present application, forming grid
It needs to be sintered when line electrode so that gate line electrode forms Ohmic contact with diffusion layer.
Optionally, the sheet resistance of the p-type heavily doped region provided by the embodiments of the present application is 35~45 Ω/Squar, and, institute
The sheet resistance for stating p-type lightly doped district is 150~180 Ω/Squar；
And the sheet resistance of the N-type heavily doped region is 30~50 Ω/Squar, and, the sheet resistance of the N-type lightly doped district is
180~200 Ω/Squar.
The embodiment of the present application provides a kind of N-type double-sided solar battery and preparation method thereof, including：One N-type silicon is provided
Piece；In one p type diffused layer of front diffusion of the N-type silicon chip, the p type diffused layer includes multiple P for going deep into the N-type silicon chip
Type heavily doped region and the positive P types lightly doped district for covering the N-type silicon chip；In one N-type of back side diffusion of the N-type silicon chip
Diffusion layer, the n type diffused layer include multiple N-type heavily doped regions for going deep into the N-type silicon chip and cover the back of the body of the N-type silicon chip
The N-type lightly doped district in face；Front passivated reflection reducing is formed in the front of the N-type silicon chip and penetrates layer, and at the back side of the N-type silicon chip
Form passivating back antireflection layer；Layer, which is penetrated, in the front passivated reflection reducing forms multiple front grid away from the N-type silicon chip side
Line electrode, and in the passivating back antireflection layer multiple back side gate line electrodes are formed away from the N-type silicon chip side, wherein
The front gate line electrode is corresponded with p-type heavily doped region position, and the back side gate line electrode and the N-type are heavily doped
Miscellaneous zone position corresponds.
As shown in the above, technical solution provided by the embodiments of the present application, p type diffused layer include multiple going deep into N-type silicon
The positive p-type lightly doped district of the p-type heavily doped region of piece and covering N-type silicon chip, n type diffused layer include multiple going deep into N-type silicon chip
N-type heavily doped region and covering N-type silicon chip the back side N-type lightly doped district, and formed it is corresponding with p-type heavily doped region position just
Face gate line electrode, and the back side corresponding with N-type heavily doped region position gate line electrode is formed, there is selectivity transmitting to prepare to be formed
The N-type double-sided solar battery of pole, and then can effectively reduce the contact resistance between gate line electrode and N-type silicon chip and prepare
Good Ohmic contact, and the short circuit current and open-circuit voltage of N-type double-side cell can be improved, and then it is two-sided too to improve N-type
The photoelectric conversion efficiency of positive energy battery.
The foregoing description of the disclosed embodiments enables professional and technical personnel in the field to realize or use this practicality new
Type.Various modifications to these embodiments will be apparent to those skilled in the art, and determine herein
The General Principle of justice can be realized in other embodiments without departing from the spirit or scope of the present utility model.Cause
This, the utility model is not intended to be limited to the embodiments shown herein, and is to fit to and principles disclosed herein
The widest range consistent with features of novelty.
Claims (5)
1. a kind of N-type double-sided solar battery, which is characterized in that including：
N-type silicon chip；
Positioned at the positive p type diffused layer of the N-type silicon chip, the p type diffused layer includes multiple P for going deep into the N-type silicon chip
Type heavily doped region and the positive p-type lightly doped district for covering the N-type silicon chip；
N type diffused layer positioned at the back side of the N-type silicon chip, the n type diffused layer include multiple N for going deep into the N-type silicon chip
The N-type lightly doped district at the back side of type heavily doped region and the covering N-type silicon chip；
Front passivated reflection reducing positioned at the p type diffused layer away from the N-type silicon chip side penetrates layer；
Deviate from the passivating back antireflection layer of the N-type silicon chip side positioned at the n type diffused layer；
And the front gate line electrode that layer deviates from the N-type silicon chip side is penetrated positioned at the front passivated reflection reducing, and positioned at described
Passivating back antireflection layer deviate from the N-type silicon chip side back side gate line electrode, wherein the front gate line electrode with it is described
P-type heavily doped region position corresponds, and the back side gate line electrode is corresponded with N-type heavily doped region position.
2. N-type double-sided solar battery according to claim 1, which is characterized in that the sheet resistance of the p-type heavily doped region is
35~45 Ω/Squar, and, the sheet resistance of the p-type lightly doped district is 150~180 Ω/Squar；
And the sheet resistance of the N-type heavily doped region is 30~50 Ω/Squar, and, the sheet resistance of the N-type lightly doped district is 180
~200 Ω/Squar.
3. N-type double-sided solar battery piece according to claim 1, which is characterized in that the front passivated reflection reducing penetrates layer
It is included in the p type diffused layer and sequentially forms the first silicon dioxide layer, alumina layer and the first nitrogen away from the N-type silicon chip side
The lamination of SiClx layer；Alternatively, the front passivated reflection reducing, which penetrates layer, is included in the p type diffused layer away from the N-type silicon chip side
Sequentially form the lamination of alumina layer and the first silicon nitride layer.
4. N-type double-sided solar battery piece according to claim 1, which is characterized in that the passivating back antireflection layer
It is included in the n type diffused layer and sequentially forms the second silicon dioxide layer and the second silicon nitride layer away from the N-type silicon chip side
Lamination.
5. N-type double-sided solar battery piece according to claim 1, which is characterized in that the front of the N silicon chips is making herbs into wool
Face.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107887478A (en) * | 2017-12-15 | 2018-04-06 | 浙江晶科能源有限公司 | A kind of N-type double-sided solar battery and preparation method thereof |
| CN114038921A (en) * | 2021-11-05 | 2022-02-11 | 晶科能源(海宁)有限公司 | Solar cell and photovoltaic module |
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2017
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107887478A (en) * | 2017-12-15 | 2018-04-06 | 浙江晶科能源有限公司 | A kind of N-type double-sided solar battery and preparation method thereof |
| CN107887478B (en) * | 2017-12-15 | 2019-09-06 | 浙江晶科能源有限公司 | A kind of N-type double-sided solar battery and preparation method thereof |
| CN114038921A (en) * | 2021-11-05 | 2022-02-11 | 晶科能源(海宁)有限公司 | Solar cell and photovoltaic module |
| CN114038921B (en) * | 2021-11-05 | 2024-03-29 | 晶科能源(海宁)有限公司 | Solar cell and photovoltaic module |
| US11949038B2 (en) | 2021-11-05 | 2024-04-02 | Jinko Solar (Haining) Co., Ltd. | Solar cell and photovoltaic module |
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