CN209471975U - A kind of back junction solar battery - Google Patents
A kind of back junction solar battery Download PDFInfo
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- CN209471975U CN209471975U CN201920061857.2U CN201920061857U CN209471975U CN 209471975 U CN209471975 U CN 209471975U CN 201920061857 U CN201920061857 U CN 201920061857U CN 209471975 U CN209471975 U CN 209471975U
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Abstract
The utility model provides a kind of back junction solar battery, back junction solar battery includes P-type silicon matrix, the front of silicon substrate is formed with the local front-surface field of iii group element doping, front is equipped with front passivation layer, passivated reflection reducing layer from the inside to the outside, front is equipped with front electrode, the back side is equipped with tunnel oxide, the doped silicon layer of group V element doping, backside passivation layer from the inside to the outside, and the back side is equipped with rear electrode.Preparation method includes: to form tunnel oxide at the P-type silicon matrix back side, the doped silicon layer that formation is adulterated with V group element on tunnel oxide, front passivation layer, passivated reflection reducing layer and backside passivation layer are formed, silver grating line is overleaf printed, passivated reflection reducing layer print metal grid lines are simultaneously sintered.The above method can obtain back junction solar battery, and the few son for reducing metal-semiconductor contact area is compound, avoids boron doping or fluting, avoid high-temperature damage silicon substrate, superposition silver wire reduces grid line resistance in metal grid lines.
Description
Technical field
The utility model relates to technical field of solar batteries, in particular to a kind of back junction solar battery and its preparation side
Method.
Background technique
The survival and development of the mankind be unable to do without the energy, solar energy be the renewable of most advantage, amount be big, clean energy resource it
One.Crystal silicon solar energy battery is a kind of semiconductor devices for luminous energy being converted into electric energy, efficient optoelectronic transformation efficiency and
Lower use cost is craving of the mankind to crystal silicon solar energy battery.At this stage, limitation crystal silicon solar batteries photoelectricity turns
Change efficiency an important factor for first is that in device minority carrier it is compound, compound bury in oblivion of minority carrier will cause in battery
The loss of device voltage and electric current, the final photoelectric conversion efficiency for reducing battery.It is intended to reduce back surface minority carrier recombination
PERC (Passivated Emitterand Rear Cell) battery structure, be now silica-based solar cell technology development
Main flow direction.For PERC battery technology, back surface aluminum oxide film cooperates the collaboration of Al-BSF at partially perforation blunt
Change keeps it very outstanding to the response of long wave light, and photoelectric conversion efficiency is up to 22% or more.At this point, cell piece light-receiving surface gold
Therefore the compound bottleneck just further increased as limitation battery efficiency of the serious few son of category electrode and silicon wafer contact position is tried
Reduction even is eliminated the direction that the area that light-receiving surface metal is contacted with semi-conductor silicon chip is PERC solar cell design and optimization
One of.
PERC battery front side is to reduce front metal-semiconductors coupling rate one of effective means using passivation contact.
Tunnelling passivation contact P-type crystal silicon solar cells concepts are also following.The structure of tunnelling passivation contact P-type crystal silicon battery
Including P-type crystal silicon matrix, battery light-receiving surface (front) is followed successively by P-N junction, ultra-thin tunnel oxide, doped silicon from inside to outside
Layer, antireflective passivation dielectric layer and conductive metal electrode.This crystal silicon battery front side conductive slurry and doped silicon layer are contacted.
Since the band structure of this stack-design of tunnel oxide/doped silicon layer can make majority carrier be transferred to doped silicon layer
And minority carrier is tunneled over oxide layer substantially and is stopped, therefore does not have gold substantially when metal electrode and doped silicon layer contact
The shortcomings that voltage of solar battery greatly improved in the loss of category-semiconductors coupling, and this p-type passivation contacts battery is to mix
Miscellaneous silicon layer for incident light inhalation effects than more serious, the electron-hole pair of generation is largely compound in doped silicon layer, affects
The electric current collection of solar battery.Also, when forming back surface field, the step of high temperature or laser slotting can be related to, meeting
Influence the performance of solar battery.
Utility model content
In view of this, the present invention provides a kind of back junction solar batteries.
The utility model also provides a kind of preparation method of back junction solar battery.
In order to solve the above technical problems, the utility model uses following technical scheme:
According to the back junction solar battery of the utility model first aspect embodiment, including silicon substrate, the silicon substrate is P
Type silicon substrate, wherein the front of the silicon substrate is formed with the local front-surface field of iii group element doping, the silicon substrate
Front be successively arranged front passivation layer, passivated reflection reducing layer from the inside to the outside, the front of the silicon substrate be equipped with before the part
The front electrode of surface field connection, the back side of the silicon substrate is successively arranged tunnel oxide, group V element doping from the inside to the outside
Doped silicon layer and backside passivation layer, the back side of the silicon substrate be equipped with the rear electrode connecting with the doped silicon layer.
Further, the local front-surface field includes multiple and multiple local spaced apart parallel point of front-surface fields
Cloth.
Further, the local front-surface field is the local front-surface field of aluminium doping, and the front electrode is formed as aluminium
Metal grid lines.
Further, silver metal grid line is additionally provided on the aluminum metal grid line.
Further, the local front-surface field and the front electrode are respectively formed as strip.
Further, the rear electrode is formed as silver metal grid line.
Further, the passivated reflection reducing layer is formed as SiNx, SiOxNy, SiOx, SiCx, Al2O3One of or it is a variety of
Combination, and the passivated reflection reducing layer with a thickness of 60-150nm.
Further, the front passivation layer and the backside passivation layer are respectively formed as silicon nitride or alumina layer.
Further, the doped layer with a thickness of 1-1000nm.
Further, the doped source of the doped silicon layer is phosphonium ion, and doping concentration is 5 × 1018-9×1020atoms/
cm3。
Further, the tunnel oxide is formed as in silica, silicon oxynitride or hydrogenated amorphous silica material
It is at least one.
According to the preparation method of the back junction solar battery of the utility model second aspect embodiment, comprising the following steps:
Step S1 chooses P-type silicon matrix, forms tunnel oxide at the back side of the P-type silicon matrix；
Step S2 forms doped silicon layer on the tunnel oxide；
Step S3 forms front passivation layer in the front of the P-type silicon matrix；
Step S4 forms passivated reflection reducing layer on the front passivation layer, forms passivating back on the doped silicon layer
Layer；
Step S5 prints the silver grating line for being used to form rear electrode using silver paste in the backside passivation layer, uses
Group-III element metal pulp prints the metal grid lines for being used to form front electrode on the passivated reflection reducing layer；
Step S6, is sintered, so that silver paste, which burns the backside passivation layer, contacts simultaneously shape with the doped layer
At rear electrode, and the iii group element metal pulp burns the passivated reflection reducing layer and the front passivation layer, and described
P-type silicon matrix is doped reaction and forms the local front-surface field of iii group element doping and form front electrode.
Further, in step sl, the P-type silicon matrix is placed in oxidation boiler tube and grows tunnel oxide, given birth to
Long temperature is 610 DEG C, growth time 20min.
Further, in step sl, the tunnel oxide is formed as silica, silicon oxynitride or hydrogenated amorphous oxidation
At least one of silicon materials.
Further, in step s 2, on the tunnel oxide formed doped silicon layer deposition method be LPCVD,
One of PECVD or APCVD.
Further, in step s 2, phosphonium ion is adulterated on the doped silicon layer, the doping concentration of phosphonium ion after doping
It is 5 × 1018-9×1020atoms/cm3。
Further, in step s 2, the doped silicon layer with a thickness of 1-1000nm.
Further, in step s3, in the positive silicon nitride film or pellumina of the P-type silicon matrix as institute
State front passivation layer.
Further, in step s 4, the passivated reflection reducing layer is formed as SiNx, SiOxNy, SiOx, SiCx, Al2O3In
One or more combinations, and the passivated reflection reducing layer with a thickness of 60-150nm.
Further, in step s 5, the iii group element metal pulp is aluminium paste, and the metal grid lines are alum gate line,
It is printed on the alum gate line using silver paste, to form aluminium-silver lamination grid line.
Further, in step s 6, the local front-surface field includes between multiple and multiple local front-surface fields
Spaced-apart parallel distribution, the front electrode are formed as aluminum metal grid line.
The above-mentioned technical proposal of the utility model one of at least has the advantages that:
Back junction solar battery according to the present utility model is formed with iii group element doping in the front of P-type silicon matrix
Local front-surface field, the back side of silicon substrate is arranged in the doped silicon layer of tunnel oxide and group V element doping, can subtract
Small front metal-semiconductors coupling, reduces positive Metal-Semiconductor Contact Resistance, avoids doped silicon layer for incident light
Inhalation effects improve the current collection efficiency of solar battery；It can be obtained by the preparation method of the utility model above-mentioned
Back junction solar battery directly burns front passivation layer using burn-through type iii group element metal pulp, avoids high-temperature damage p-type
Silicon substrate extends the matrix service life, forms the local front-surface field of iii group element doping in the front of P-type silicon matrix, effectively drops
Few son of low metal semiconductor contact regions is compound, does not need to increase additional step on the basis of existing cell metallization technique
Suddenly, avoid using boron doping or laser slotting and etc., metal is superimposed above metal grid lines in the way of secondary printing
Silver wire greatly reduces the line resistance on grid line, reduces optical loss caused by front gate line, improves battery efficiency.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the back junction solar battery of the utility model embodiment；
Fig. 2 is the cross-sectional view of the back junction solar battery of the utility model embodiment.
Appended drawing reference:
Silicon substrate 1；Local front-surface field 2；Front passivation layer 3；Passivated reflection reducing layer 4；Front electrode 5；Tunnel oxide 6；
Doped silicon layer 7；Backside passivation layer 8；Rear electrode 9.
Specific embodiment
It is practical new below in conjunction with this to keep the objectives, technical solutions, and advantages of the embodiments of the present invention clearer
The technical solution of the utility model embodiment is clearly and completely described in the attached drawing of type embodiment.
The back junction solar battery according to the utility model embodiment is specifically described in conjunction with attached drawing first below.
As shown in Figure 1 to Figure 2, according to the back junction solar battery of the utility model embodiment, including silicon substrate 1, silicon substrate
Body 1 is P-type silicon matrix, wherein the front of silicon substrate 1 is formed with the local front-surface field 2 of iii group element doping, silicon substrate 1
Front be successively arranged front passivation layer 3, passivated reflection reducing layer 4 from the inside to the outside, the front of silicon substrate 1 is equipped with and local front-surface field
The front electrode 5 of 2 connections, the back side of silicon substrate 1 is successively arranged the doping of tunnel oxide 6, group V element doping from the inside to the outside
Silicon layer 7 and backside passivation layer 8, the back side of silicon substrate 1 are equipped with the rear electrode 9 connecting with doped layer 7.
That is, back junction solar battery is mainly made of silicon substrate 1, wherein silicon substrate 1 can be P-type silicon matrix,
Its body resistivity can be 2.0 Ω cm, and the front of silicon substrate 1 could be formed with the local front surface of iii group element doping
Field 2, iii group element can be aluminium, and the few son that can be effectively reduced metal-semiconductor contact region is compound, and silicon substrate 1 is just
Face is successively arranged front passivation layer 3, passivated reflection reducing layer 4 from the inside to the outside, and the front of silicon substrate 1 is equipped with to be connected with local front-surface field 2
The front electrode 5 connect, that is to say, the front electrode 5 connecting with local front-surface field 2, front electricity are equipped on passivated reflection reducing layer 4
Pole 5 can pass through front passivation layer 3 and connect with passivated reflection reducing layer 4 and local front-surface field 2, and front electrode 5 can be used for collecting
Series welding uses when electric current and package assembling.The back side of silicon substrate 1 is successively arranged tunnel oxide 6, group V element from the inside to the outside
The doped silicon layer 7 and backside passivation layer 8 of doping, group V element can be phosphorus, and doped silicon layer 7 is located at tunnel oxide 6 and the back side
Between passivation layer 8, the back side of silicon substrate 1 is equipped with the rear electrode 9 connecting with doped silicon layer 7, that is to say and sets in backside passivation layer 8
There is the rear electrode 9 connecting with doped silicon layer 7, rear electrode 9 passes through backside passivation layer 8 and doped silicon layer 7 connects.Front electrode
5, which pass through front passivation layer 3 and passivated reflection reducing, penetrates layer 4 and P-type silicon matrix Ohmic contact, rear electrode 9 pass through backside passivation layer 8 with
7 Ohmic contact of doped silicon layer.It may include aluminium element, P-type silicon front side of matrix area corresponding with front electrode 5 in front electrode 5
Domain could be formed with the local front-surface field 2 for being adulterated and being formed by aluminium element.Doped silicon layer 7 can be formed as group V element doping
Polycrystalline or amorphous silicon layer, can also be microcrystal silicon, group V element can be phosphorus, it is good using doped polycrystalline or amorphous silicon
Field passivation significantly improves minority carrier life time.The back side of silicon substrate 1 is arranged in tunnel oxide 6 and polycrystalline or amorphous silicon, can
Reduce front metal-semiconductors coupling, reduces positive Metal-Semiconductor Contact Resistance, doped silicon layer 7 is located at the back of silicon substrate
Face can be avoided doped silicon layer for the inhalation effects of incident light.
Back junction solar battery according to the present utility model is formed with iii group element doping in the front of P-type silicon matrix
Local front-surface field 2, the back side of silicon substrate 1 is arranged in the doped silicon layer of tunnel oxide 6 and group V element doping, can
Reduce front metal-semiconductors coupling, reduces positive Metal-Semiconductor Contact Resistance, avoid doped silicon layer for incident light
Inhalation effects, improve the current collection efficiency of solar battery.
In some embodiments of the utility model, local front-surface field 2 may include multiple, and multiple local front surfaces
Field 2 spaced apart parallel can be distributed, can be evenly-spaced.Local front-surface field can be the local front-surface field of aluminium doping,
Front electrode 5 can be formed as aluminum metal grid line, can reduce contact resistance, reduce optical loss caused by front gate line, mention
High cell photoelectric transfer efficiency.
In other embodiments of the utility model, in order to reduce aluminum steel width and grid line resistance, on aluminum metal grid line
It is also provided with silver metal grid line, silver metal grid line can extend along the length direction of aluminum metal grid line, can be using relatively thin
Aluminum metal grid line and silver metal grid line, reduce grid line resistance, improve fill factor FF, fill factor FF indicate maximum work output
The ratio between rate ImVm and limited output power IscVoc, so that optical loss caused by front gate line is greatly reduced, it is final to improve electricity
Pond photoelectric conversion efficiency.
According to some embodiments, local front-surface field 2 can be respectively formed as strip, table before part with front electrode 5
Face 2 can be disposed in parallel relation to one another with front electrode 5, and local front-surface field 2 can be equal with the quantity of front electrode 5, each
Front electrode 5 can be located on corresponding local front-surface field 2.
In some preferred embodiments, rear electrode 9 can be formed as silver metal grid line, and resistance is smaller, conductive good, so that
Electric current is easy to export from doped silicon layer 7.
In some embodiments, passivated reflection reducing layer 4 can be formed as SiNx, SiOxNy, SiOx, SiCx, Al2O3In one
Kind or multiple combinations, for example, can be silicon nitride, and the thickness of passivated reflection reducing layer 4 can be 60-150nm, for example, can be
80nm。
In further embodiments, front passivation layer 3 and backside passivation layer 8 can be respectively formed as silicon nitride or aluminium oxide
Layer, that is to say, front passivation layer 3 can be formed as silicon nitride or alumina layer, backside passivation layer 8 can be formed as silicon nitride or
Alumina layer.
According to some embodiments, the thickness of doped silicon layer 7 can be 1-1000nm, for example, the thickness of doped silicon layer 7 can be with
For 200nm.
In certain embodiments, the doped source of doped silicon layer 7 can be phosphonium ion, doping concentration can for 5 ×
1018-9×1020atoms/cm3, for example, doping concentration can be 6 × 1020atoms/cm3。
According to some embodiments, tunnel oxide 6 can be formed as silica, silicon oxynitride or hydrogenated amorphous silica material
At least one of material, tunnel oxide 6 can be the material that electronics is easy to be tunneled through, at high temperature to group V element
Diffusion has certain barrier effect, i.e., diffusion rate of the group V element in tunnelling passivation layer 6 is being mixed much smaller than it under high temperature
Diffusion rate in miscellaneous silicon layer 7, tunnel oxide 6 may include but be not limited only to silica, silicon oxynitride or hydrogenated amorphous oxygen
SiClx.
Back junction solar battery according to the present utility model is formed with iii group element doping in the front of P-type silicon matrix
Local front-surface field, the doped silicon layer of tunnel oxide and group V element doping is arranged in the back side of silicon substrate, can reduce
Front metal-semiconductors coupling reduces positive Metal-Semiconductor Contact Resistance, avoids suction of the doped silicon layer for incident light
Receiving influences, and improves the current collection efficiency of solar battery.
The utility model provides a kind of preparation method of back junction solar battery, comprising the following steps:
Step S1 chooses P-type silicon matrix, forms tunnel oxide 6 at the back side of P-type silicon matrix.In step sl, p-type
The resistivity of silicon substrate can be 2.0 Ω cm, before forming tunnel oxide 6, can complete silicon wafer table in surface wool manufacturing
Wheat flour suede, silicon chip surface reflectivity can be 12%.It is smooth that back side wet etching can be carried out after the completion of making herbs into wool, nitric acid, sulfuric acid and
Corrode back surface in the mixed liquor of hydrofluoric acid, reduce the specific surface area of silicon wafer back surface, front can be removed with hydrofluoric acid solution
Phosphorosilicate glass layer (PSG) can form tunnel oxide 6 at the back side of P-type silicon matrix after cleaning silicon chip, tunnel oxide 6
Thickness can be 0.5-5nm.
Step S2, forms doped silicon layer 7 on tunnel oxide 6, and doped silicon layer 7 can be formed as the polysilicon layer of doping
Or amorphous silicon layer and microcrystal silicon layer.In the forming process of doped silicon layer, it can be initially formed undoped silicon layer, then carry out to it
Doping, can also be passed through the atmosphere containing doped source and directly form doped silicon layer during forming silicon layer.In step s 2,
The silicon wafer of the good tunnel oxide 6 of length can be placed in LPCVD (Low with deposit polycrystalline silicon layer on tunnel oxide 6
Pressure Chemical Vapor Deposition, low-pressure chemical vapour deposition technique) deposit polycrystalline silicon layer in system, sinks
Accumulated temperature degree can be 610 DEG C, and the thickness of polysilicon layer can be 200nm, then be mixed using group V element polysilicon layer
Reason is lived together to form doped silicon layer.
Polysilicon layer or amorphous silicon layer can be formed on tunnel oxide 6, and V is utilized to polysilicon layer or amorphous silicon layer
Race's element is doped processing, forms doped silicon layer 7.Doping method can be injected plus be annealed for phosphonium ion, be adulterated after doping dense
Degree can be 6 × 1020atoms/cm3。
Step S3 forms front passivation layer 3 in the front of P-type silicon matrix.In step s3, front passivation layer 3 is being formed
Before, it needs the front oxide layer of P-type silicon matrix, can be in chain equipment, front face HF acid solution, removal front
Oxide layer.The polysilicon layer that silicon chip edge comes around plating can also be removed in the front of silicon substrate, can be cleaned using slot type, it is molten
Liquid can be ammonia spirit, and liquor capacity proportion can be ammonium hydroxide: water is equal to 1:5, and scavenging period can reasonably select, such as can
Think 5 minutes.Front can be cleaned before forming front passivation layer 3, is dried after being cleaned with used hydrofluoric acid solution, then
Use ALD form in front deposited oxide aluminium film as front passivation layer 3, thickness can be 10nm.
Step S4 forms passivated reflection reducing layer 4 on front passivation layer 3, and backside passivation layer 8 is formed on doped silicon layer 7.?
In step S4, PECVD (Plasma can be used in front cvd nitride silicon thin film as passivated reflection reducing layer 4
Enhanced Chemical Vapor Deposition, plasma enhanced chemical vapor deposition method) front deposited silicon nitride
Film, the thickness of passivated reflection reducing layer 4 can be 80nm, can overleaf for cvd nitride silicon thin film as backside passivation layer 8, the back side is blunt
Change layer 8 with a thickness of 90nm.
Step S5 is used to form the silver grating line of rear electrode 9 using printing in silver paste overleaf passivation layer 8, uses Section III
The printing on passivated reflection reducing layer 4 of race's metal element slurry is used to form the metal grid lines of front electrode 5.In step s 5, Ke Yiyong
Silver paste overleaf printed back silver grating line and electrode, export electric current from doped silicon layer 7.III-th family can be printed in front
Metal element slurry, for example, aluminium paste can be printed, can use can burn SiNx, SiO2Aluminium paste, so as to aluminium paste burn passivation subtract
Anti- layer 4 and front passivation layer 3 are doped with P-type silicon matrix to react the local front-surface field 2 to form aluminium doping and is formed just
Face electrode 5.
Step S6, is sintered, and contacts with doped silicon layer 7 so that silver paste burns backside passivation layer 8 and forms back side electricity
Pole 9, and iii group element metal pulp burns passivated reflection reducing layer 4 and front passivation layer 3, is doped and reacts with P-type silicon matrix
It forms the local front-surface field 2 of iii group element doping and forms front electrode 5, for example, iii group element can be aluminium.No
It needs boron to spread high-temperature technology, avoids high-temperature damage P-type silicon matrix, extend the matrix service life, but pass through aluminium paste and silver paste cofiring
One step process of knot can form local front-surface field 2, not need laser slotting process.
In step s 6, can be with fast front and back metal slurry co-sintering, being sintered peak temperature can be 800 DEG C,
Back side silver paste is burnt backside passivation layer 8 (silicon nitride film) and is contacted with the good doped silicon layer completion of electric conductivity after sintering, just
Face aluminium paste burns passivated reflection reducing layer 4 and front passivation layer 3 contacts with silicon substrate 1 and forms local front-surface field 2.
Above-mentioned back junction solar battery can be obtained by the preparation method of the utility model, utilizes burn-through type III-th family
Metal element slurry directly burns front passivation layer 3, the table before the part that the front of P-type silicon matrix forms iii group element doping
Face 2, few son that metal-semiconductor contact region is effectively reduced is compound, does not need on the basis of existing cell metallization technique
Increase additional step, avoid using boron doping or laser slotting and etc., high-temperature damage P-type silicon matrix is avoided, base is extended
Body life time reduces the line resistance on grid line, reduces optical loss caused by front gate line, improves battery efficiency.
In some embodiments, in step sl, P-type silicon matrix can be placed in oxidation boiler tube and grows tunnel oxide
Layer, growth temperature can be 610 DEG C, and growth time can be 20min, can also rationally change growth temperature according to actual needs
Degree and time.
In some embodiments, in step sl, tunnel oxide 6 can be formed as silica, silicon oxynitride or hydrogenation
At least one of amorphous oxide silicon materials.
According to some embodiments, in step s 2, the deposition method that doped silicon layer is formed on tunnel oxide 6 is
One of LPCVD, PECVD or APCVD (Films Prepared by APCVD), for example, can be deposited by LPCVD.
In some preferred embodiments, in step s 2, phosphonium ion is adulterated on doped silicon layer 7, doping concentration can be 5
×1018-9×1020atoms/cm3, for example, the doping concentration of phosphonium ion can be 6 × 10 after doping20atoms/cm3。
In further embodiments, in step s 2, doped silicon layer 7 with a thickness of 1-1000nm for example, doped silicon layer 7
Thickness can be 200nm.
It specifically, in step s3, can be in the positive silicon nitride film or pellumina of P-type silicon matrix as front
Passivation layer 3.
Optionally, in step s 4, passivated reflection reducing layer 4 can be formed as SiNx, SiOxNy, SiOx, SiCx, Al2O3In
One or more combinations, can be silicon nitride, and passivated reflection reducing layer 4 with a thickness of 60-150nm, for example, can be 80nm.
In some preferred embodiments, in step s 5, iii group element metal pulp can be aluminium paste, and metal grid lines can
Think alum gate line, by secondary printing, printed on alum gate line using silver paste, to form aluminium-silver lamination grid line, convenient for collecting electricity
Series welding uses when stream and package assembling.
Specifically, in step s 6, local front-surface field 2 may include that multiple and multiple local front-surface fields 2 are spaced apart
Parallelly distribute on, can be evenly-spaced, and local front-surface field can be the local front-surface field of aluminium doping, the formation of front electrode 5
For aluminum metal grid line, contact resistance can reduce, reduce optical loss caused by front gate line, improve cell photoelectric conversion effect
Rate.
In some embodiments, local front-surface field 2 can be respectively formed as strip, table before part with front electrode 5
Face 2 can be disposed in parallel relation to one another with front electrode 5, and local front-surface field 2 can be equal with the quantity of front electrode 5, each
Front electrode 5 can be located on corresponding local front-surface field 2.
Optionally, front passivation layer 3 and backside passivation layer 8 can be respectively formed as silicon nitride or alumina layer.
Above-mentioned back junction solar battery can be obtained by the preparation method of the utility model, utilizes burn-through type III-th family
Metal element slurry directly burns front passivation layer 3, the table before the part that the front of P-type silicon matrix forms iii group element doping
Face 2, few son that metal-semiconductor contact region is effectively reduced is compound, does not need on the basis of existing cell metallization technique
Increase additional step, avoid using boron doping or laser slotting and etc., high-temperature damage P-type silicon matrix is avoided, base is extended
Body life time is superimposed metal silver wire above metal grid lines in the way of secondary printing, greatly reduces the line resistance on grid line,
Optical loss caused by front gate line is reduced, battery efficiency is improved, improves the fill factor of solar battery.
The above is preferred embodiments of the present invention, it is noted that for the ordinary skill of the art
For personnel, under the premise of not departing from principle described in the utility model, it can also make several improvements and retouch, these improvement
It also should be regarded as the protection scope of the utility model with retouching.
Claims (6)
1. a kind of back junction solar battery, which is characterized in that including silicon substrate, the silicon substrate is P-type silicon matrix, wherein institute
State silicon substrate front be formed with iii group element doping local front-surface field, the silicon substrate front from the inside to the outside according to
Secondary to be equipped with front passivation layer, passivated reflection reducing layer, the front of the silicon substrate is equipped with the front connecting with the local front-surface field
Electrode, the back side of the silicon substrate are successively arranged tunnel oxide, the doped silicon layer of group V element doping and the back side from the inside to the outside
Passivation layer, the back side of the silicon substrate are equipped with the rear electrode connecting with the doped silicon layer.
2. back junction solar battery according to claim 1, which is characterized in that it is described part front-surface field include it is multiple and
The distribution spaced apart parallel of multiple local front-surface fields.
3. back junction solar battery according to claim 1, which is characterized in that the part front-surface field is aluminium doping
Local front-surface field, the front electrode are formed as aluminum metal grid line.
4. back junction solar battery according to claim 3, which is characterized in that be additionally provided with silver-colored gold on the aluminum metal grid line
Belong to grid line.
5. back junction solar battery according to claim 3, which is characterized in that the part front-surface field and the front
Electrode is respectively formed as strip.
6. back junction solar battery according to claim 1, which is characterized in that the doped source of the doped silicon layer be phosphorus from
Son, doping concentration are 5 × 1018-9×1020atoms/cm3。
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| CN109585578A (en) * | 2019-01-15 | 2019-04-05 | 晶澳（扬州）太阳能科技有限公司 | A kind of back junction solar battery and preparation method thereof |
| CN115132851A (en) * | 2021-08-26 | 2022-09-30 | 上海晶科绿能企业管理有限公司 | Solar cell, manufacturing method thereof and photovoltaic module |
| CN115188833A (en) * | 2021-09-06 | 2022-10-14 | 上海晶科绿能企业管理有限公司 | Solar cell, manufacturing method thereof and photovoltaic module |
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