CN207166882U - 复合器件 - Google Patents

复合器件 Download PDF

Info

Publication number
CN207166882U
CN207166882U CN201590001036.XU CN201590001036U CN207166882U CN 207166882 U CN207166882 U CN 207166882U CN 201590001036 U CN201590001036 U CN 201590001036U CN 207166882 U CN207166882 U CN 207166882U
Authority
CN
China
Prior art keywords
thermoplastic resin
resin layer
substrate
installing component
multiple device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201590001036.XU
Other languages
English (en)
Inventor
加藤登
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Application granted granted Critical
Publication of CN207166882U publication Critical patent/CN207166882U/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/0775Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
    • G06K19/07756Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna the connection being non-galvanic, e.g. capacitive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/145Organic substrates, e.g. plastic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383Multilayer substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5386Geometry or layout of the interconnection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/66High-frequency adaptations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/17Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/19Manufacturing methods of high density interconnect preforms
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/12Supports; Mounting means
    • H01Q1/22Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/2208Supports; Mounting means by structural association with other equipment or articles associated with components used in interrogation type services, i.e. in systems for information exchange between an interrogator/reader and a tag/transponder, e.g. in Radio Frequency Identification [RFID] systems
    • H01Q1/2225Supports; Mounting means by structural association with other equipment or articles associated with components used in interrogation type services, i.e. in systems for information exchange between an interrogator/reader and a tag/transponder, e.g. in Radio Frequency Identification [RFID] systems used in active tags, i.e. provided with its own power source or in passive tags, i.e. deriving power from RF signal
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/36Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith
    • H01Q1/38Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith formed by a conductive layer on an insulating support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/40Radiating elements coated with or embedded in protective material
    • H01Q1/405Radome integrated radiating elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q7/00Loop antennas with a substantially uniform current distribution around the loop and having a directional radiation pattern in a plane perpendicular to the plane of the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/38Impedance-matching networks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4632Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating thermoplastic or uncured resin sheets comprising printed circuits without added adhesive materials between the sheets
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64Impedance arrangements
    • H01L2223/66High-frequency adaptations
    • H01L2223/6661High-frequency adaptations for passive devices
    • H01L2223/6677High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/12105Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/13198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/13298Fillers
    • H01L2224/13299Base material
    • H01L2224/133Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13339Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/165Material
    • H01L2224/16501Material at the bonding interface
    • H01L2224/16503Material at the bonding interface comprising an intermetallic compound
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73267Layer and HDI connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5385Assembly of a plurality of insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5387Flexible insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • H01L2924/141Analog devices
    • H01L2924/142HF devices
    • H01L2924/1421RF devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15313Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19102Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0104Properties and characteristics in general
    • H05K2201/0129Thermoplastic polymer, e.g. auto-adhesive layer; Shaping of thermoplastic polymer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09509Blind vias, i.e. vias having one side closed
    • H05K2201/09527Inverse blind vias, i.e. bottoms outwards in multilayer PCB; Blind vias in centre of PCB having opposed bottoms
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10098Components for radio transmission, e.g. radio frequency identification [RFID] tag, printed or non-printed antennas

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Theoretical Computer Science (AREA)
  • Geometry (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

复合器件(101)具备基板(10)和安装在基板(10)的表面或内部的安装部件(20)。基板(10)具有第一热塑性树脂层,安装部件(20)在表面具有与第一热塑性树脂层为同种材料的至少第二热塑性树脂层,在第二热塑性树脂层与第一热塑性树脂层之间,形成有第二热塑性树脂与第一热塑性树脂的接合层(30)。

Description

复合器件
技术领域
本实用新型涉及具备如芯片部件、半导体模块部件那样的安装部件和安装有该安装部件的基板的复合器件。
背景技术
在将如芯片部件、半导体模块部件那样的安装部件安装到印刷布线板(PrintedCircuit Board)等基板时,通常使用导电性接合材料。一般来说,安装部件的端子电极与基板的连接盘经由焊料而被电接合且机械接合。
作为上述导电性接合材料,在专利文献1中示出了Sn-Cu-Ni合金类的材料。如果使用该导电性接合材料,则通过300℃左右的加热,可促进向400℃以上的高熔点的金属间化合物的变化,不会残留低熔点成分。因此,例如,在半导体装置的制造工序中,在经过进行焊接的工序而制造了半导体装置之后,通过回流焊法将该半导体装置安装到基板那样的情况下,由前面的导电性接合材料构成的焊接部分因为在耐热强度的方面优异,所以在回流焊工序中也不会再熔融,可进行可靠性高的安装。
在先技术文献
专利文献
专利文献1:国际公开第2013/132942号
实用新型内容
实用新型要解决的课题
近年来,安装部件越来越小型化,与此相伴地,为了对安装部件进行安装,基板上的连接盘的尺寸也小型化。因此,在经由焊料来进行安装的构造中,难以充分确保安装部的机械强度。
因此,本实用新型的目的在于,在具备安装部件和安装有该安装部件的基板的复合器件中,提供一种使得也能够应用于更小型化的安装部件的复合器件。
用于解决课题的技术方案
(1)本实用新型的复合器件的特征在于,具备:
基板;以及
安装部件,安装在所述基板的表面,
所述基板具有第一热塑性树脂层,
所述安装部件至少在表面具有与所述第一热塑性树脂层为同种材料的第二热塑性树脂层,
在所述第二热塑性树脂层与所述第一热塑性树脂层之间,形成有由导电性接合材料构成的导电性接合部,并且形成有所述第二热塑性树脂层与所述第一热塑性树脂层的接合层。
通过上述结构,安装部件经由接合层对基板进行机械性(构造性)接合。因此,即使安装部件是小型的,也可确保安装部件的端子与基板侧的连接盘的电接合的稳定性。
(2)优选是,在上述(1)中,所述第一热塑性树脂层或所述第二热塑性树脂层中的至少一方具有可挠性。由此,所述第二热塑性树脂与所述第一热塑性树脂的接合面形成接合层时的密接性高,可容易形成接合层。
(3)优选是,在上述(1)或(2)中,所述安装部件是在由所述第二热塑性树脂层构成的基材的表面搭载有IC芯片的部件。通过该结构,可简化具有热塑性树脂层的安装部件(半导体封装件)的制造工序。
(4)优选是,在上述(3)中,所述安装部件在所述IC芯片的周围具有保护层,所述保护层由与所述第二热塑性树脂层为同种材料的第三热塑性树脂层构成。通过该结构,能够容易地构成在上下表面均具有热塑性树脂层的安装部件(半导体封装件)。
(5)可以是,所述安装部件在所述IC芯片的周围具有由热固化性树脂层构成的保护层。
(6)优选是,在上述(1)或(2)中,所述安装部件是在由所述第二热塑性树脂层构成的基材内置有IC芯片的部件(半导体封装件)。通过该结构,安装部件为薄型且IC芯片的周围具有热塑性树脂层,因此能够构成薄型的复合器件。
(7)优选是,在上述(1)或(2)中,所述安装部件是在所述IC芯片的一部分粘附有所述第二热塑性树脂层的部件。通过该结构,可简化具有热塑性树脂层的安装部件(半导体封装件)的制造工序。
(8)优选是,在上述(1)或(2)中,所述基板具有层叠有包含所述第一热塑性树脂层的多个热塑性树脂层的构造。通过该结构,在基板也能够构成电路,能够与安装部件一起构成更高功能的复合器件。
(9)优选是,在上述(1)或(2)中,所述基板是具有多个子基板区域的集合基板,所述安装部件是RFIC封装件,搭载在所述集合基板的边缘部(边区域)的导体图案的一部分。通过该结构,能够在以集合基板状态制造复合器件的工序中对集合基板进行RFID管理。
(10)优选是,在上述(1)或(2)中,在所述第二热塑性树脂层与所述第一热塑性树脂层之间,除所述导电性接合部以外的全部接合区域由所述接合层构成。
(11)优选是,在上述(1)或(2)中,所述导电性接合部以陷入到所述基板侧的形状形成。
实用新型效果
根据本实用新型,安装部件经由接合层对基板进行机械性(构造性)接合。因此,即使安装部件是小型的,也可确保安装部件的端子与基板侧的连接盘的电接合的稳定性。
附图说明
图1A是第一实施方式涉及的复合器件101的立体图。
图1B是复合器件101的部分放大立体图。
图2是安装部件20的剖视图。
图3是安装部件20的电路图。
图4是复合器件101的主要部分的剖视图。
图5是示出基板10与埋设在基板10内的安装部件20的接合部所形成的接合层30的剖视图。
图6是示出第二实施方式涉及的复合器件所安装的安装部件20的构造的图。
图7是第二实施方式的复合器件102的主要部分的剖视图。
图8A是第三实施方式涉及的复合器件103的立体图。
图8B是复合器件103的部分放大立体图。
图9是示出安装部件20相对于基板10的安装构造的图。
图10是示出第四实施方式涉及的复合器件104的、安装部件20相对于基板10的安装构造的图。
图11是第五实施方式涉及的复合器件105的剖视图。
图12是第六实施方式涉及的复合器件所设置的带热塑性树脂的安装部件60的剖视图。
图13是第六实施方式的复合器件106的剖视图。
图14是关于第七实施方式涉及的复合器件107的剖视图。
具体实施方式
以下,参照图并举几个具体的例子示出用于实施本实用新型的多个方式。在各图中,对相同部分标注相同的附图标记。在第二实施方式以后,省略关于与第一实施方式共同的事项的记述,只对不同点进行说明。特别是,对于相同的结构所带来的相同的作用效果,将不在每个实施方式中逐一提及。
《第一实施方式》
图1A是第一实施方式涉及的复合器件101的立体图,图1B是复合器件101的部分放大立体图。
复合器件101具备基板10和安装在基板10的内部的安装部件20,构成UHF频段的无线通信器件。
基板10是具有配置为格子状的多个子基板区域11的集合基板(母基板)。基板10具有层叠LCP(Liquid Crystal Polymer:液晶聚合物)、PI(polyimide:聚酰亚胺)等热塑性树脂层(第一热塑性树脂层)而成的多层构造,在形成于基板10周围的边缘部(边区域、余边区域),形成有环状的边缘部导体图案12。各热塑性树脂层具有可挠性,基板10具有可挠性。在该边缘部导体图案12的下部(基板10的内部)安装有安装部件20。在导体图案12的一部分形成有环部12L。
如图1B所示,安装部件20连接至导体图案12的环部12L。即,安装部件20的两个端子连接至环部12L的两个端部。边缘部的导体图案12作为辐射体发挥作用,环部12L作为用于使安装部件与导体图案12的阻抗匹配的阻抗匹配部发挥作用。另外,设置在基板10端部的导体图案不限定于环状,例如,也可以构成偶极子型的辐射体。
图2是安装部件20的剖视图。图3是安装部件20的电路图。该安装部件20用作对RFIC芯片进行封装而成的RFIC封装件。安装部件20具有在基材21的表面搭载有IC芯片(RFIC芯片)24的构造。在IC芯片24的周围形成有保护层25。
基材21是与基板10的热塑性树脂层(第一热塑性树脂层)为同种材料的热塑性树脂层(第二热塑性树脂层)的层叠体。在基材21的内部形成有电路图案22,在基材21的下表面形成有端子电极23。电路图案22包括由面内导体图案、层间导体图案等构成的电感器和/或电容器。该电路图案22包括具有给定的谐振频率的谐振电路,构成能够在宽频带进行阻抗匹配的宽频带匹配电路。
在基材21的上表面经由导电性接合材料26而安装有IC芯片24。IC芯片24例如通过利用了Ag纳米粒子的接合而安装到基材21。保护层25是与基板10的热塑性树脂层(第一热塑性树脂层)为同种材料的热塑性树脂层(第三热塑性树脂层)。在此,“同种材料的热塑性树脂”是指,各热塑性树脂层的界面能够通过给定温度下的热处理而熔融、一体化的树脂,更具体地,是指以相同的聚合物成分为主成分的热塑性树脂层。例如,如果第一热塑性树脂为LCP,则第二热塑性树脂也为LCP,如果第一热塑性树脂为PI,则第二热塑性树脂也为PI。但是,各热塑性树脂层的熔融温度可以不同。在熔融温度不同的情况下,其范围优选在±50℃的范围内。
端子电极23与母基板10的端子电极部(环部12L的两个端部)直接(以DC方式)连接,或者经由电容进行电连接。在电路图案22包括线圈图案的情况下,RFIC芯片24也可以经由该线圈图案与环部12L的磁场耦合进行电连接。
在本例子中,基材21是与基板10的热塑性树脂(第一热塑性树脂) 相同种类的热塑性树脂(第二热塑性树脂层),保护层25是与基板10的热塑性树脂(第一热塑性树脂)相同种类的热塑性树脂(第三热塑性树脂层),但是也可以只有基材21或者只有保护层25是与基板10的热塑性树脂相同种类的热塑性树脂。例如,保护层25也可以是与热塑性树脂(第一热塑性树脂)不同种类的环氧树脂等热固化性树脂。
如图3所示,在IC芯片(RFIC)24与端子电极23之间形成有包括电感器L1、L2以及电容器C1、C2的匹配电路。电感器L1***到IC芯片24的一个端子与一个端子电极23之间,电感器L2***到IC芯片24的一个端子与另一个端子之间(在图3的例子中,电感器L2经由电感器L1而***到IC芯片24的一个端子与另一个端子之间。)。电感器L1和电感器L2经由磁场M进行耦合。电容器C1***到IC芯片24的一个端子与一个端子电极23之间(在图3的例子中,电容器C1经由电感器L1而***到IC芯片24的一个端子与一个端子电力23之间。)。电容器C2***到IC芯片24的另一个端子与另一个端子电极23之间。由这些电容器、电感器构成具有多个谐振频率的供电电路,可谋求宽频带化。该谐振电路的谐振频率实质上相当于无线通信器件的通信频率。
图4是复合器件101的主要部分的剖视图。图4(1)是示出基板10层叠之前的、各第一热塑性树脂层和安装部件20的结构的剖视图,图4(2)是层叠后的剖视图。
基板10是层叠有包括第一热塑性树脂层10A、10B、10C、10D、10E、10F的多个热塑性树脂层的构造。安装部件20内置于基板10。在第一热塑性树脂层10B、10C形成有腔14。在第一热塑性树脂层10A的上表面形成有边缘部导体图案12,在第一热塑性树脂层10A的内部形成有过孔导体13。
如上所述,第一热塑性树脂层10A~10F是与安装部件20的基材21和保护层25的热塑性树脂层为同种材料的热塑性树脂层。
通过与第一热塑性树脂层10A~10F一同层叠安装部件20并进行加热加压,从而在第一热塑性树脂层10A~10F中,相邻的层间被热压接。此外,树脂层10A、10B与安装部件20的基材21被热压接,树脂层10C、10D与安装部件20的保护层25被热压接。进而,过孔导体13与安装部件20的端子电极23导通。上述热压接时的温度例如为300℃。
图5是示出基板10与埋设在基板10内的安装部件20的接合部所形成的接合层的剖视图。
关于安装部件20的基材21和保护层25,通过对它们进行热压接,从而在基板10的第一热塑性树脂与安装部件20的第二热塑性树脂层之间形成接合层30。接合层30是第一热塑性树脂层的聚合物成分与第二热塑性树脂层的聚合物成分的混合层,树脂(聚合物)的密度与其他部分(不是界面的部分)不同。
由于基板10具有可挠性,因此基板10的热塑性树脂层与安装部件20的热塑性树脂层的接合面形成接合层时的密接性高,可容易形成接合层30。
过孔导体13是将导电性膏进行金属化而成的。该导电性膏例如是包含低熔点金属粉末(Sn)和能够在该低熔点金属粉末的熔融温度以上与低熔点金属粉末形成金属间化合物的合金粉末(Cu-Ni合金、Cu-Mn合金)的膏。该膏在不经过熔融状态的情况下通过加热而固化。
材料的细节公开在国际公开第2012/066795号、国际公开第2012/086745号、国际公开第2012/108395号等。
固化的金属体是具有400℃以上的熔点的金属间化合物。即,安装部件20的端子电极和基板10的框状的导体图案12经由该过孔导体13而电连接。另外,过孔导体13的端面和端子电极23可以经由固溶体相而连接,也可以通过单纯的物理接触而连接。特别是,如果基材21和基板10由同种材料的热固化性树脂形成,则其界面可牢固地接合,因此未必一定要在基板10侧的电极与基材21侧的电极之间形成金属固溶体相。
根据本实施方式,可实现如下的效果。
(a)即使基板10和安装部件20是热塑性树脂层也可进行接合,因此基板10和安装部件20的坯体彼此机械接合。因此,即使基板10的连接盘、安装部件20的端子电极小,也能够确保基板10与安装部件20的机械强度。
(b)因为基板10和安装部件20将相同种类的热塑性树脂层作为基底,所以热膨胀系数差小,不易在基板10与安装部件20之间产生分层等。
(c)特别是,如果作为热塑性树脂层使用LCP(Liquid Crystal Polymer:液晶聚合物),则这些材料的相对介电常数小且Q值高,因此能够构成处理高频信号的高频用复合器件。
《第二实施方式》
在第二实施方式中,示出安装部件20的另一个构成例。与在第一实施方式中图2等所示的安装部件不同,IC芯片埋设在基材的内部。
图6是示出第二实施方式涉及的复合器件所安装的安装部件20的构造的图。图6(1)是示出安装部件20层叠之前的状态的剖视图,图6(2)是示出层叠后的状态的剖视图。安装部件20具备基材21A、21B、21C、21D、21E和IC芯片24。在基材21C、21D形成有腔,在该腔内容纳有IC芯片24,通过与IC芯片24一同层叠基材21A、21B、21C、21D、21E,从而构成安装部件20。像这样,IC芯片24埋设在基材21的内部,从而不需要图2所示的保护层25。
图7是第二实施方式的复合器件102的主要部分的剖视图。通过进行热压接,从而在基板10的第一热塑性树脂与安装部件20的第二热塑性树脂层之间形成接合层30。接合层30是各热塑性树脂层进行了熔融、混合的层。
《第三实施方式》
图8A是第三实施方式涉及的复合器件103的立体图,图8B是复合器件103的部分放大立体图。
复合器件103具备基板10和安装部件20。安装部件20的安装构造与第一实施方式不同。在本实施方式中,安装部件20安装在基板10的上表面。
图9是示出安装部件20相对于基板10的安装构造的图。图9(1)是示出将要对基板10安装安装部件20之前的状态的剖视图,图9(2)是示出安装中途的状态的剖视图,图9(3)是示出对基板10安装了安装部件20之后的状态的剖视图。
安装部件20(RFIC封装件)的基底材料为热塑性树脂(例如,LCP、PI等)。
如图9(1)所示,在基板10的连接盘印刷有导电性接合材料31(导电性接合材料膏)。如第一实施方式所示,该膏例如是包含低熔点金属粉末(Sn)和能够在该低熔点金属粉末的熔融温度以上与低熔点金属粉末形成金属间化合物的合金粉末(Cu-Ni合金、Cu-Mn合金)的膏。该膏在不经过熔融状态的情况下通过加热而固化。
此后,实施热处理,从而如图9(2)所示,使导电性接合材料31固化。即,通过加热为低熔点金属粉末的熔融温度以上(230℃以上),从而使Sn与Cu-Ni(或Cu-Mn)反应,形成其金属间化合物。该金属间化合物具有400℃左右以上的熔融温度。
接下来,如图9(3)所示,一边从上侧对安装部件20施加压力一边实施热处理。由此,热塑性树脂会软化、流动,成为固化的导电性接合材料31陷入到基板10侧的形状(侵入的形状)。之所以陷入到基板10侧,是因为基板10侧的导体密度小。在安装部件20的基材21层叠有多个导体图案,因此刚性比较高,不会向基材21侧陷入。此外,此时安装部件20侧的热塑性树脂层和基板10侧的热塑性树脂层在其界面开始熔融,从而在该部分形成接合层30。
另外,使用在端子电极23具有Au凸块的安装部件20的情况下,也可以在对基板10的连接盘进行加热的同时进行超声波接合。
《第四实施方式》
图10是示出第四实施方式涉及的复合器件104的、安装部件20相对于基板10的安装构造的图。图10(1)是示出将要对基板10安装安装部件20之前的状态的剖视图,图10(2)是示出对基板10安装了安装部件20之后的状态的剖视图。
安装部件20和基板10的结构与在第三实施方式中示出的相同。但是,在本实施方式中,在安装部件20的基材21的下表面粘附有热塑性树脂层(热塑性树脂片)27。另外,热塑性树脂层27不限于热塑性树脂片,例如,也可以通过将膏状的热塑性树脂涂敷在基材21的下表面而形成。
如图10(1)所示,在基板10的连接盘印刷有导电性接合材料31(导电性接合材料膏)。此后,实施热处理,从而如图10(2)所示,使导电性接合材料31固化。即,通过加热为低熔点金属粉末的熔融温度以上(230℃以上),从而使Sn与Cu-Ni合金(或Cu-Mn合金)反应,形成其金属间化合物。此外,热塑性树脂层27和基板10侧的热塑性树脂层在其界面开始熔融,从而在该部分形成接合层30。
根据本实施方式,即使安装部件20的基材21不是热塑性树脂,也可经由热塑性树脂层彼此的接合层进行接合。
《第五实施方式》
本实施方式的复合器件是构成为模块部件的例子。图11是第五实施方式涉及的复合器件105的剖视图。复合器件105例如用作高频模块、电源模块等。模块基板50是多个热塑性树脂层(例如,LCP、PI等)的层叠体。
在模块基板50的内部安装有安装部件20A、20B。安装部件20A、20B是与在第二实施方式中示出的安装部件20(参照图6(2))同样的安装部件。但是,在本实施方式中,在安装部件20A、20B的尤其是上表面和下表面形成有接合层30。
优选模块基板50和安装部件20A、20B双方均具有可挠性,但是也可以只有一方具有可挠性。例如,即使在模块基板50为刚性且安装部件20A、20B为柔性的情况下,模块基板50的热塑性树脂层与安装部件20A、20B的热塑性树脂层的接合面形成接合层时的密接性也高,也可容易形成接合层30。
安装在模块基板50的上表面的表面安装部件41是RFIC封装件等半导体封装件。但是,表面安装部件41的外表面由环氧树脂等热塑性树脂构成。此外,在模块基板50的上表面安装有陶瓷电容器等无源部件的表面安装部件42等。
在模块基板50的安装面(按图11所示的方向为下表面)形成有端子电极54。复合器件104通过端子电极54连接到主板的连接盘而进行安装。
《第六实施方式》
图12是第六实施方式涉及的复合器件所设置的带热塑性树脂的安装部件60的剖视图。图12(1)是制造中途的状态下的剖视图,图12(2)是完成的带热塑性树脂的安装部件60的剖视图。IC芯片61例如是被CSP(Chip Size Package:芯片尺寸封装)化的IC芯片。在该IC芯片61的电路形成面侧,例如经由300℃以上的耐热性粘接剂粘附有热塑性树脂层63。或者,也可以对IC芯片61的电路形成面侧的表面进行粗面化处理而直接粘附热塑性树脂层63。
图13是第六实施方式的复合器件106的剖视图。模块基板50是多个热塑性树脂层(例如,LCP、PI等)的层叠体。在模块基板50的内部安装有带热塑性树脂的安装部件60。在带热塑性树脂的安装部件60的、尤其是热塑性树脂层63与模块基板50的热塑性树脂层的接合部形成有接合层30。
在模块基板50的上表面安装有表面安装部件41、42、43等。在模块基板50的安装面(按图13所示的方向为下表面)形成有端子电极54。复合器件105通过端子电极54连接到主板的连接盘而进行安装。
《第七实施方式》
第七实施方式是经由热塑性树脂层的接合层对表面安装部件和模块基板的接合面进行接合的例子。
图14是关于第七实施方式涉及的复合器件107的剖视图。图14(1)、图14(2)是制造中途的状态下的剖视图,图14(3)是完成的复合器件106的剖视图。安装部件20安装到模块基板50内的结构与第四实施方式所示的结构相同。
如图14(1)所示,在模块基板50的上表面粘附有热塑性树脂层51。该热塑性树脂层51是与构成基板50的热塑性树脂层相同种类的热塑性树脂层,是熔点比较低(与构成基板50的热塑性树脂层相比,熔点低)的聚合物,厚度例如为20~30μm。在该热塑性树脂层51,在以后形成导电性接合材料53的位置预先形成有开口52。然后,如图14(2)所示,在开口52形成有导电性接合材料53。该导电性接合材料53的组成如上述几个实施方式所示。此后,如图14(3)所示,搭载表面安装部件70、42并进行加热。由此,使导电性接合材料53固化。即,通过加热为低熔点金属粉末的熔融温度以上(230℃以上),从而使Sn与Cu-Ni合金(或Cu-Mn合金)反应,形成其金属间化合物。此外,在表面安装部件70、42的下表面与热塑性树脂层51的接合部形成接合层30。
像这样,也能够应用于经由热塑性树脂层的接合层对表面安装部件与基板的接合面进行接合的结构。
最后,上述的实施方式的说明在所有的方面都是例示,不是限制性的。显然,对本领域技术人员而言,能够适宜地进行变形和变更。例如,能够进行在不同的实施方式中示出的结构的部分置换或组合是不言而喻的。本实用新型的范围不是由上述的实施方式示出,而是由权利要求书示出。进而,本实用新型的范围还包括与权利要求书等同的意思以及范围内的所有的变更。
附图标记说明
10:基板;
10A:第一热塑性树脂层;
10A、10B、10C、10D、10E、10F:第一热塑性树脂层;
11:子基板区域;
12:边缘部导体图案;
12L:环部;
13:过孔导体;
14:腔;
20、20A、20B:安装部件;
21、21A、21B、21C、21D、21E:基材;
22:电路图案;
23:端子电极;
24:IC芯片;
25:保护层;
26:导电性接合材料;
30:接合层;
31:导电性接合材料;
41、42、43:表面安装部件;
50:模块基板;
51:热塑性树脂层;
52:开口;
53:导电性接合材料;
54:端子电极;
60:安装部件;
61:IC芯片;
63:热塑性树脂层;
70:表面安装部件;
101~106:复合器件。

Claims (11)

1.一种复合器件,其特征在于,具备:
基板;以及
安装部件,安装在所述基板的表面,
所述基板具有第一热塑性树脂层,
所述安装部件至少在表面具有与所述第一热塑性树脂层为同种材料的第二热塑性树脂层,
在所述第二热塑性树脂层与所述第一热塑性树脂层之间,形成有由导电性接合材料构成的导电性接合部,并且形成有所述第二热塑性树脂层与所述第一热塑性树脂层的接合层。
2.根据权利要求1所述的复合器件,其特征在于,
所述第一热塑性树脂层或所述第二热塑性树脂层中的至少一方具有可挠性。
3.根据权利要求1或2所述的复合器件,其特征在于,
所述安装部件是在由所述第二热塑性树脂层构成的基材的表面搭载有IC芯片的部件。
4.根据权利要求3所述的复合器件,其特征在于,
所述安装部件在所述IC芯片的周围具有保护层,所述保护层由与所述第二热塑性树脂层为同种材料的第三热塑性树脂层构成。
5.根据权利要求3所述的复合器件,其特征在于,
所述安装部件在所述IC芯片的周围具有由热固化性树脂层构成的保护层。
6.根据权利要求1或2所述的复合器件,其特征在于,
所述安装部件是在由所述第二热塑性树脂层构成的基材内置有IC芯片的部件。
7.根据权利要求1或2所述的复合器件,其特征在于,
所述安装部件是在IC芯片的一部分粘附有所述第二热塑性树脂层的部件。
8.根据权利要求1或2所述的复合器件,其特征在于,
所述基板具有层叠有包含所述第一热塑性树脂层的多个热塑性树脂层的构造。
9.根据权利要求1或2所述的复合器件,其特征在于,
所述基板是具有多个子基板区域的集合基板,所述安装部件是RFIC封装件,且与所述集合基板的边缘部的导体图案的一部分连接。
10.根据权利要求1或2所述的复合器件,其特征在于,
在所述第二热塑性树脂层与所述第一热塑性树脂层之间,除所述导电性接合部以外的全部接合区域由所述接合层构成。
11.根据权利要求1或2所述的复合器件,其特征在于,
所述导电性接合部以陷入到所述基板侧的形状形成。
CN201590001036.XU 2014-10-16 2015-10-09 复合器件 Active CN207166882U (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2014211502 2014-10-16
JP2014-211502 2014-10-16
PCT/JP2015/078717 WO2016060073A1 (ja) 2014-10-16 2015-10-09 複合デバイス

Publications (1)

Publication Number Publication Date
CN207166882U true CN207166882U (zh) 2018-03-30

Family

ID=55746619

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201590001036.XU Active CN207166882U (zh) 2014-10-16 2015-10-09 复合器件

Country Status (4)

Country Link
US (1) US9960122B2 (zh)
JP (1) JP6380548B2 (zh)
CN (1) CN207166882U (zh)
WO (1) WO2016060073A1 (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11426818B2 (en) 2018-08-10 2022-08-30 The Research Foundation for the State University Additive manufacturing processes and additively manufactured products
GB2581149B (en) * 2019-02-05 2021-11-10 Pragmatic Printing Ltd Flexible interposer
GB2584106B (en) * 2019-05-21 2024-03-27 Pragmatic Printing Ltd Flexible electronic structure
DE102020111996A1 (de) * 2020-05-04 2021-11-04 Unimicron Germany GmbH Verfahren zur Herstellung einer Leiterplatte und Leiterplatte mit mindestens einem eingebetteten elektronischen Bauteil

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3619395B2 (ja) * 1999-07-30 2005-02-09 京セラ株式会社 半導体素子内蔵配線基板およびその製造方法
JP2003298234A (ja) * 2002-04-01 2003-10-17 Hitachi Cable Ltd 多層配線板及びその製造方法、ならびに配線基板
US7549220B2 (en) * 2003-12-17 2009-06-23 World Properties, Inc. Method for making a multilayer circuit
CN100508701C (zh) * 2004-10-22 2009-07-01 株式会社村田制作所 复合多层基板及其制造方法
JP4424449B2 (ja) * 2007-05-02 2010-03-03 株式会社村田製作所 部品内蔵モジュール及びその製造方法
JP2008288433A (ja) * 2007-05-18 2008-11-27 Yaskawa Electric Corp 実装基板の樹脂モールド方法とその装置および樹脂モールド実装基板
JP2009289802A (ja) * 2008-05-27 2009-12-10 Tdk Corp 電子部品内蔵モジュール及びその製造方法
JP5287991B2 (ja) * 2009-10-01 2013-09-11 株式会社村田製作所 回路基板及びその製造方法
US8217272B2 (en) * 2009-12-18 2012-07-10 Intel Corporation Apparatus and method for embedding components in small-form-factor, system-on-packages
JP5077448B2 (ja) * 2010-04-02 2012-11-21 株式会社デンソー 半導体チップ内蔵配線基板及びその製造方法
JP5423897B2 (ja) 2010-08-10 2014-02-19 株式会社村田製作所 プリント配線板及び無線通信システム
CN103141164B (zh) * 2010-10-08 2016-06-08 株式会社村田制作所 元器件内置基板及其制造方法
JP5725152B2 (ja) 2011-03-10 2015-05-27 株式会社村田製作所 電気素子内蔵型多層基板およびその製造方法
JP5610064B2 (ja) 2011-04-01 2014-10-22 株式会社村田製作所 部品内蔵樹脂基板およびその製造方法
JPWO2013132942A1 (ja) 2012-03-05 2015-07-30 株式会社村田製作所 接合方法、接合構造体およびその製造方法
WO2013168539A1 (ja) * 2012-05-09 2013-11-14 株式会社村田製作所 樹脂多層基板およびその製造方法
JP5583828B1 (ja) * 2013-08-05 2014-09-03 株式会社フジクラ 電子部品内蔵多層配線基板及びその製造方法
US9209151B2 (en) * 2013-09-26 2015-12-08 General Electric Company Embedded semiconductor device package and method of manufacturing thereof
US9698124B2 (en) * 2015-03-03 2017-07-04 Microsemi Semiconductor Limited Embedded circuit package

Also Published As

Publication number Publication date
US20170194263A1 (en) 2017-07-06
JPWO2016060073A1 (ja) 2017-04-27
JP6380548B2 (ja) 2018-08-29
US9960122B2 (en) 2018-05-01
WO2016060073A1 (ja) 2016-04-21

Similar Documents

Publication Publication Date Title
JP6929321B2 (ja) 電気素子および電気素子の製造方法
CN207166882U (zh) 复合器件
JP3709882B2 (ja) 回路モジュールとその製造方法
JP5421863B2 (ja) 半導体パッケージの製造方法
JP4042785B2 (ja) 電子部品及びその製造方法
JP7471770B2 (ja) インダクタ、及びインダクタの製造方法
US10083887B2 (en) Chip component-embedded resin multilayer substrate and manufacturing method thereof
TWI330951B (en) Electronic apparatus
US11289265B2 (en) Inductor having conductive line embedded in magnetic material
CN107210271A (zh) 电子部件及其制造方法和制造装置
US7179687B2 (en) Semiconductor device and its manufacturing method, and semiconductor device manufacturing system
CN212752742U (zh) 基板接合构造
CN102231382B (zh) 图像传感器的陶瓷封装及其封装方法
TW571434B (en) Semiconductor device and the manufacturing method of the same
TWI220307B (en) Thermal enhanced package structure and its formation method
CN102956575A (zh) 封装结构及制造方法
US9699908B2 (en) Component-embedded board and communication terminal device
WO2008026335A1 (en) Electronic part device and method of manufacturing it and electronic part assembly and method of manufacturing it
JP5708903B2 (ja) 回路基板およびその製造方法
US20070132595A1 (en) Transponder device with mega pads
JP2001521649A (ja) 非接触技術を用いたチップカードの製造方法
JP6070290B2 (ja) 樹脂多層部品およびその製造方法
EP3349553A1 (en) Component carrier with pad covered by surface finish-solder structure
US9143114B2 (en) Bonding type crystal controlled oscillator
JP2014157857A (ja) 部品内蔵樹脂多層基板およびその製造方法

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant